Struct efm32gg11b::can1::status::LEC_W

pub struct LEC_W<'a> { /* fields omitted */ }

Write proxy for field LEC

Implementations

impl<'a> LEC_W<'a>

pub fn variant(self, variant: LEC_A) -> &'a mut W

Writes variant to the field

pub fn none(self) -> &'a mut W

No error occurred during last CAN bus event.

pub fn stuff(self) -> &'a mut W

More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed.

pub fn form(self) -> &'a mut W

A fixed format part of a received frame has the wrong format.

pub fn ack(self) -> &'a mut W

The message this CAN Core transmitted was not acknowledged by another node.

pub fn bit1(self) -> &'a mut W

During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant.

pub fn bit0(self) -> &'a mut W

During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed).

pub fn crc(self) -> &'a mut W

The CRC check sum was incorrect in the message received; the CRC received for an incoming message does not match with the calculated CRC for the received data.

pub fn unused(self) -> &'a mut W

When the LEC shows the value ‘7’, no CAN bus event was detected since the CPU wrote this value to the LEC.

pub fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field