Type Definition efm32gg11b::can1::mir1_cmdmask::R[][src]

type R = R<u32, MIR1_CMDMASK>;
Expand description

Reader of register MIR1_CMDMASK

Implementations

Bit 0 - CC Channel Mode

Bit 1 - Access Data Bytes 0-3

Bit 2 - Transmission Request Bit/ New Data Bit

Bit 3 - Clear Interrupt Pending Bit

Bit 4 - Access Control Bits

Bit 5 - Access Arbitration Bits

Bit 6 - Access Mask Bits

Bit 7 - Write/Read RAM