Type Definition efm32gg11b::can1::mir0_ctrl::W[][src]

type W = W<u32, MIR0_CTRL>;
Expand description

Writer for register MIR0_CTRL

Implementations

Bits 0:3 - Data Length Code

Bit 7 - End of Buffer

Bit 8 - Transmit Request

Bit 9 - Remote Enable

Bit 10 - Receive Interrupt Enable

Bit 11 - Transmit Interrupt Enable

Bit 12 - Use Acceptance Mask

Bit 13 - Interrupt Pending

Bit 14 - Message Lost (only Valid for Message Objects With Direction = Receive)

Bit 15 - New Data