efm32gg11b/ldma/
ch18_reqsel.rs

1#[doc = "Reader of register CH18_REQSEL"]
2pub type R = crate::R<u32, super::CH18_REQSEL>;
3#[doc = "Writer for register CH18_REQSEL"]
4pub type W = crate::W<u32, super::CH18_REQSEL>;
5#[doc = "Register CH18_REQSEL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CH18_REQSEL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type { 0 }
10}
11#[doc = "Reader of field `SIGSEL`"]
12pub type SIGSEL_R = crate::R<u8, u8>;
13#[doc = "Write proxy for field `SIGSEL`"]
14pub struct SIGSEL_W<'a> {
15    w: &'a mut W,
16}
17impl<'a> SIGSEL_W<'a> {
18    #[doc = r"Writes raw bits to the field"]
19    #[inline(always)]
20    pub unsafe fn bits(self, value: u8) -> &'a mut W {
21        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
22        self.w
23    }
24}
25#[doc = "Source Select\n\nValue on reset: 0"]
26#[derive(Clone, Copy, Debug, PartialEq)]
27#[repr(u8)]
28pub enum SOURCESEL_A {
29    #[doc = "0: No source selected"]
30    NONE = 0,
31    #[doc = "1: Peripheral Reflex System"]
32    PRS = 1,
33    #[doc = "8: Analog to Digital Converter 0"]
34    ADC0 = 8,
35    #[doc = "9: Analog to Digital Converter 0"]
36    ADC1 = 9,
37    #[doc = "10: Digital to Analog Converter 0"]
38    VDAC0 = 10,
39    #[doc = "12: Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
40    USART0 = 12,
41    #[doc = "13: Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
42    USART1 = 13,
43    #[doc = "14: Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
44    USART2 = 14,
45    #[doc = "15: Universal Synchronous/Asynchronous Receiver/Transmitter 3"]
46    USART3 = 15,
47    #[doc = "16: Universal Synchronous/Asynchronous Receiver/Transmitter 4"]
48    USART4 = 16,
49    #[doc = "17: Universal Synchronous/Asynchronous Receiver/Transmitter 5"]
50    USART5 = 17,
51    #[doc = "18: Universal Asynchronous Receiver/Transmitter 0"]
52    UART0 = 18,
53    #[doc = "19: Universal Asynchronous Receiver/Transmitter 1"]
54    UART1 = 19,
55    #[doc = "20: Low Energy UART 0"]
56    LEUART0 = 20,
57    #[doc = "21: Low Energy UART 1"]
58    LEUART1 = 21,
59    #[doc = "22: I2C 0"]
60    I2C0 = 22,
61    #[doc = "23: I2C 1"]
62    I2C1 = 23,
63    #[doc = "24: I2C 2"]
64    I2C2 = 24,
65    #[doc = "25: Timer 0"]
66    TIMER0 = 25,
67    #[doc = "26: Timer 1"]
68    TIMER1 = 26,
69    #[doc = "27: Timer 2"]
70    TIMER2 = 27,
71    #[doc = "28: Timer 3"]
72    TIMER3 = 28,
73    #[doc = "29: Timer 4"]
74    TIMER4 = 29,
75    #[doc = "30: Timer 5"]
76    TIMER5 = 30,
77    #[doc = "31: Timer 6"]
78    TIMER6 = 31,
79    #[doc = "32: Wide Timer 0"]
80    WTIMER0 = 32,
81    #[doc = "33: Wide Timer 0"]
82    WTIMER1 = 33,
83    #[doc = "34: Wide Timer 2"]
84    WTIMER2 = 34,
85    #[doc = "35: Wide Timer 3"]
86    WTIMER3 = 35,
87    #[doc = "48: Memory System Controller"]
88    MSC = 48,
89    #[doc = "49: Advanced Encryption Standard Accelerator"]
90    CRYPTO0 = 49,
91    #[doc = "50: External Bus Interface"]
92    EBI = 50,
93    #[doc = "61: Capacitive touch sense module"]
94    CSEN = 61,
95    #[doc = "62: Low Energy Sensor Interface"]
96    LESENSE = 62,
97}
98impl From<SOURCESEL_A> for u8 {
99    #[inline(always)]
100    fn from(variant: SOURCESEL_A) -> Self { variant as _ }
101}
102#[doc = "Reader of field `SOURCESEL`"]
103pub type SOURCESEL_R = crate::R<u8, SOURCESEL_A>;
104impl SOURCESEL_R {
105    #[doc = r"Get enumerated values variant"]
106    #[inline(always)]
107    pub fn variant(&self) -> crate::Variant<u8, SOURCESEL_A> {
108        use crate::Variant::*;
109        match self.bits {
110            0 => Val(SOURCESEL_A::NONE),
111            1 => Val(SOURCESEL_A::PRS),
112            8 => Val(SOURCESEL_A::ADC0),
113            9 => Val(SOURCESEL_A::ADC1),
114            10 => Val(SOURCESEL_A::VDAC0),
115            12 => Val(SOURCESEL_A::USART0),
116            13 => Val(SOURCESEL_A::USART1),
117            14 => Val(SOURCESEL_A::USART2),
118            15 => Val(SOURCESEL_A::USART3),
119            16 => Val(SOURCESEL_A::USART4),
120            17 => Val(SOURCESEL_A::USART5),
121            18 => Val(SOURCESEL_A::UART0),
122            19 => Val(SOURCESEL_A::UART1),
123            20 => Val(SOURCESEL_A::LEUART0),
124            21 => Val(SOURCESEL_A::LEUART1),
125            22 => Val(SOURCESEL_A::I2C0),
126            23 => Val(SOURCESEL_A::I2C1),
127            24 => Val(SOURCESEL_A::I2C2),
128            25 => Val(SOURCESEL_A::TIMER0),
129            26 => Val(SOURCESEL_A::TIMER1),
130            27 => Val(SOURCESEL_A::TIMER2),
131            28 => Val(SOURCESEL_A::TIMER3),
132            29 => Val(SOURCESEL_A::TIMER4),
133            30 => Val(SOURCESEL_A::TIMER5),
134            31 => Val(SOURCESEL_A::TIMER6),
135            32 => Val(SOURCESEL_A::WTIMER0),
136            33 => Val(SOURCESEL_A::WTIMER1),
137            34 => Val(SOURCESEL_A::WTIMER2),
138            35 => Val(SOURCESEL_A::WTIMER3),
139            48 => Val(SOURCESEL_A::MSC),
140            49 => Val(SOURCESEL_A::CRYPTO0),
141            50 => Val(SOURCESEL_A::EBI),
142            61 => Val(SOURCESEL_A::CSEN),
143            62 => Val(SOURCESEL_A::LESENSE),
144            i => Res(i),
145        }
146    }
147    #[doc = "Checks if the value of the field is `NONE`"]
148    #[inline(always)]
149    pub fn is_none(&self) -> bool { *self == SOURCESEL_A::NONE }
150    #[doc = "Checks if the value of the field is `PRS`"]
151    #[inline(always)]
152    pub fn is_prs(&self) -> bool { *self == SOURCESEL_A::PRS }
153    #[doc = "Checks if the value of the field is `ADC0`"]
154    #[inline(always)]
155    pub fn is_adc0(&self) -> bool { *self == SOURCESEL_A::ADC0 }
156    #[doc = "Checks if the value of the field is `ADC1`"]
157    #[inline(always)]
158    pub fn is_adc1(&self) -> bool { *self == SOURCESEL_A::ADC1 }
159    #[doc = "Checks if the value of the field is `VDAC0`"]
160    #[inline(always)]
161    pub fn is_vdac0(&self) -> bool { *self == SOURCESEL_A::VDAC0 }
162    #[doc = "Checks if the value of the field is `USART0`"]
163    #[inline(always)]
164    pub fn is_usart0(&self) -> bool { *self == SOURCESEL_A::USART0 }
165    #[doc = "Checks if the value of the field is `USART1`"]
166    #[inline(always)]
167    pub fn is_usart1(&self) -> bool { *self == SOURCESEL_A::USART1 }
168    #[doc = "Checks if the value of the field is `USART2`"]
169    #[inline(always)]
170    pub fn is_usart2(&self) -> bool { *self == SOURCESEL_A::USART2 }
171    #[doc = "Checks if the value of the field is `USART3`"]
172    #[inline(always)]
173    pub fn is_usart3(&self) -> bool { *self == SOURCESEL_A::USART3 }
174    #[doc = "Checks if the value of the field is `USART4`"]
175    #[inline(always)]
176    pub fn is_usart4(&self) -> bool { *self == SOURCESEL_A::USART4 }
177    #[doc = "Checks if the value of the field is `USART5`"]
178    #[inline(always)]
179    pub fn is_usart5(&self) -> bool { *self == SOURCESEL_A::USART5 }
180    #[doc = "Checks if the value of the field is `UART0`"]
181    #[inline(always)]
182    pub fn is_uart0(&self) -> bool { *self == SOURCESEL_A::UART0 }
183    #[doc = "Checks if the value of the field is `UART1`"]
184    #[inline(always)]
185    pub fn is_uart1(&self) -> bool { *self == SOURCESEL_A::UART1 }
186    #[doc = "Checks if the value of the field is `LEUART0`"]
187    #[inline(always)]
188    pub fn is_leuart0(&self) -> bool { *self == SOURCESEL_A::LEUART0 }
189    #[doc = "Checks if the value of the field is `LEUART1`"]
190    #[inline(always)]
191    pub fn is_leuart1(&self) -> bool { *self == SOURCESEL_A::LEUART1 }
192    #[doc = "Checks if the value of the field is `I2C0`"]
193    #[inline(always)]
194    pub fn is_i2c0(&self) -> bool { *self == SOURCESEL_A::I2C0 }
195    #[doc = "Checks if the value of the field is `I2C1`"]
196    #[inline(always)]
197    pub fn is_i2c1(&self) -> bool { *self == SOURCESEL_A::I2C1 }
198    #[doc = "Checks if the value of the field is `I2C2`"]
199    #[inline(always)]
200    pub fn is_i2c2(&self) -> bool { *self == SOURCESEL_A::I2C2 }
201    #[doc = "Checks if the value of the field is `TIMER0`"]
202    #[inline(always)]
203    pub fn is_timer0(&self) -> bool { *self == SOURCESEL_A::TIMER0 }
204    #[doc = "Checks if the value of the field is `TIMER1`"]
205    #[inline(always)]
206    pub fn is_timer1(&self) -> bool { *self == SOURCESEL_A::TIMER1 }
207    #[doc = "Checks if the value of the field is `TIMER2`"]
208    #[inline(always)]
209    pub fn is_timer2(&self) -> bool { *self == SOURCESEL_A::TIMER2 }
210    #[doc = "Checks if the value of the field is `TIMER3`"]
211    #[inline(always)]
212    pub fn is_timer3(&self) -> bool { *self == SOURCESEL_A::TIMER3 }
213    #[doc = "Checks if the value of the field is `TIMER4`"]
214    #[inline(always)]
215    pub fn is_timer4(&self) -> bool { *self == SOURCESEL_A::TIMER4 }
216    #[doc = "Checks if the value of the field is `TIMER5`"]
217    #[inline(always)]
218    pub fn is_timer5(&self) -> bool { *self == SOURCESEL_A::TIMER5 }
219    #[doc = "Checks if the value of the field is `TIMER6`"]
220    #[inline(always)]
221    pub fn is_timer6(&self) -> bool { *self == SOURCESEL_A::TIMER6 }
222    #[doc = "Checks if the value of the field is `WTIMER0`"]
223    #[inline(always)]
224    pub fn is_wtimer0(&self) -> bool { *self == SOURCESEL_A::WTIMER0 }
225    #[doc = "Checks if the value of the field is `WTIMER1`"]
226    #[inline(always)]
227    pub fn is_wtimer1(&self) -> bool { *self == SOURCESEL_A::WTIMER1 }
228    #[doc = "Checks if the value of the field is `WTIMER2`"]
229    #[inline(always)]
230    pub fn is_wtimer2(&self) -> bool { *self == SOURCESEL_A::WTIMER2 }
231    #[doc = "Checks if the value of the field is `WTIMER3`"]
232    #[inline(always)]
233    pub fn is_wtimer3(&self) -> bool { *self == SOURCESEL_A::WTIMER3 }
234    #[doc = "Checks if the value of the field is `MSC`"]
235    #[inline(always)]
236    pub fn is_msc(&self) -> bool { *self == SOURCESEL_A::MSC }
237    #[doc = "Checks if the value of the field is `CRYPTO0`"]
238    #[inline(always)]
239    pub fn is_crypto0(&self) -> bool { *self == SOURCESEL_A::CRYPTO0 }
240    #[doc = "Checks if the value of the field is `EBI`"]
241    #[inline(always)]
242    pub fn is_ebi(&self) -> bool { *self == SOURCESEL_A::EBI }
243    #[doc = "Checks if the value of the field is `CSEN`"]
244    #[inline(always)]
245    pub fn is_csen(&self) -> bool { *self == SOURCESEL_A::CSEN }
246    #[doc = "Checks if the value of the field is `LESENSE`"]
247    #[inline(always)]
248    pub fn is_lesense(&self) -> bool { *self == SOURCESEL_A::LESENSE }
249}
250#[doc = "Write proxy for field `SOURCESEL`"]
251pub struct SOURCESEL_W<'a> {
252    w: &'a mut W,
253}
254impl<'a> SOURCESEL_W<'a> {
255    #[doc = r"Writes `variant` to the field"]
256    #[inline(always)]
257    pub fn variant(self, variant: SOURCESEL_A) -> &'a mut W { unsafe { self.bits(variant.into()) } }
258    #[doc = "No source selected"]
259    #[inline(always)]
260    pub fn none(self) -> &'a mut W { self.variant(SOURCESEL_A::NONE) }
261    #[doc = "Peripheral Reflex System"]
262    #[inline(always)]
263    pub fn prs(self) -> &'a mut W { self.variant(SOURCESEL_A::PRS) }
264    #[doc = "Analog to Digital Converter 0"]
265    #[inline(always)]
266    pub fn adc0(self) -> &'a mut W { self.variant(SOURCESEL_A::ADC0) }
267    #[doc = "Analog to Digital Converter 0"]
268    #[inline(always)]
269    pub fn adc1(self) -> &'a mut W { self.variant(SOURCESEL_A::ADC1) }
270    #[doc = "Digital to Analog Converter 0"]
271    #[inline(always)]
272    pub fn vdac0(self) -> &'a mut W { self.variant(SOURCESEL_A::VDAC0) }
273    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
274    #[inline(always)]
275    pub fn usart0(self) -> &'a mut W { self.variant(SOURCESEL_A::USART0) }
276    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
277    #[inline(always)]
278    pub fn usart1(self) -> &'a mut W { self.variant(SOURCESEL_A::USART1) }
279    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
280    #[inline(always)]
281    pub fn usart2(self) -> &'a mut W { self.variant(SOURCESEL_A::USART2) }
282    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 3"]
283    #[inline(always)]
284    pub fn usart3(self) -> &'a mut W { self.variant(SOURCESEL_A::USART3) }
285    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 4"]
286    #[inline(always)]
287    pub fn usart4(self) -> &'a mut W { self.variant(SOURCESEL_A::USART4) }
288    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 5"]
289    #[inline(always)]
290    pub fn usart5(self) -> &'a mut W { self.variant(SOURCESEL_A::USART5) }
291    #[doc = "Universal Asynchronous Receiver/Transmitter 0"]
292    #[inline(always)]
293    pub fn uart0(self) -> &'a mut W { self.variant(SOURCESEL_A::UART0) }
294    #[doc = "Universal Asynchronous Receiver/Transmitter 1"]
295    #[inline(always)]
296    pub fn uart1(self) -> &'a mut W { self.variant(SOURCESEL_A::UART1) }
297    #[doc = "Low Energy UART 0"]
298    #[inline(always)]
299    pub fn leuart0(self) -> &'a mut W { self.variant(SOURCESEL_A::LEUART0) }
300    #[doc = "Low Energy UART 1"]
301    #[inline(always)]
302    pub fn leuart1(self) -> &'a mut W { self.variant(SOURCESEL_A::LEUART1) }
303    #[doc = "I2C 0"]
304    #[inline(always)]
305    pub fn i2c0(self) -> &'a mut W { self.variant(SOURCESEL_A::I2C0) }
306    #[doc = "I2C 1"]
307    #[inline(always)]
308    pub fn i2c1(self) -> &'a mut W { self.variant(SOURCESEL_A::I2C1) }
309    #[doc = "I2C 2"]
310    #[inline(always)]
311    pub fn i2c2(self) -> &'a mut W { self.variant(SOURCESEL_A::I2C2) }
312    #[doc = "Timer 0"]
313    #[inline(always)]
314    pub fn timer0(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER0) }
315    #[doc = "Timer 1"]
316    #[inline(always)]
317    pub fn timer1(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER1) }
318    #[doc = "Timer 2"]
319    #[inline(always)]
320    pub fn timer2(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER2) }
321    #[doc = "Timer 3"]
322    #[inline(always)]
323    pub fn timer3(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER3) }
324    #[doc = "Timer 4"]
325    #[inline(always)]
326    pub fn timer4(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER4) }
327    #[doc = "Timer 5"]
328    #[inline(always)]
329    pub fn timer5(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER5) }
330    #[doc = "Timer 6"]
331    #[inline(always)]
332    pub fn timer6(self) -> &'a mut W { self.variant(SOURCESEL_A::TIMER6) }
333    #[doc = "Wide Timer 0"]
334    #[inline(always)]
335    pub fn wtimer0(self) -> &'a mut W { self.variant(SOURCESEL_A::WTIMER0) }
336    #[doc = "Wide Timer 0"]
337    #[inline(always)]
338    pub fn wtimer1(self) -> &'a mut W { self.variant(SOURCESEL_A::WTIMER1) }
339    #[doc = "Wide Timer 2"]
340    #[inline(always)]
341    pub fn wtimer2(self) -> &'a mut W { self.variant(SOURCESEL_A::WTIMER2) }
342    #[doc = "Wide Timer 3"]
343    #[inline(always)]
344    pub fn wtimer3(self) -> &'a mut W { self.variant(SOURCESEL_A::WTIMER3) }
345    #[doc = "Memory System Controller"]
346    #[inline(always)]
347    pub fn msc(self) -> &'a mut W { self.variant(SOURCESEL_A::MSC) }
348    #[doc = "Advanced Encryption Standard Accelerator"]
349    #[inline(always)]
350    pub fn crypto0(self) -> &'a mut W { self.variant(SOURCESEL_A::CRYPTO0) }
351    #[doc = "External Bus Interface"]
352    #[inline(always)]
353    pub fn ebi(self) -> &'a mut W { self.variant(SOURCESEL_A::EBI) }
354    #[doc = "Capacitive touch sense module"]
355    #[inline(always)]
356    pub fn csen(self) -> &'a mut W { self.variant(SOURCESEL_A::CSEN) }
357    #[doc = "Low Energy Sensor Interface"]
358    #[inline(always)]
359    pub fn lesense(self) -> &'a mut W { self.variant(SOURCESEL_A::LESENSE) }
360    #[doc = r"Writes raw bits to the field"]
361    #[inline(always)]
362    pub unsafe fn bits(self, value: u8) -> &'a mut W {
363        self.w.bits = (self.w.bits & !(0x3f << 16)) | (((value as u32) & 0x3f) << 16);
364        self.w
365    }
366}
367impl R {
368    #[doc = "Bits 0:3 - Signal Select"]
369    #[inline(always)]
370    pub fn sigsel(&self) -> SIGSEL_R { SIGSEL_R::new((self.bits & 0x0f) as u8) }
371    #[doc = "Bits 16:21 - Source Select"]
372    #[inline(always)]
373    pub fn sourcesel(&self) -> SOURCESEL_R { SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8) }
374}
375impl W {
376    #[doc = "Bits 0:3 - Signal Select"]
377    #[inline(always)]
378    pub fn sigsel(&mut self) -> SIGSEL_W { SIGSEL_W { w: self } }
379    #[doc = "Bits 16:21 - Source Select"]
380    #[inline(always)]
381    pub fn sourcesel(&mut self) -> SOURCESEL_W { SOURCESEL_W { w: self } }
382}