efm32gg11b/lesense/
ch9_interact.rs

1#[doc = "Reader of register CH9_INTERACT"]
2pub type R = crate::R<u32, super::CH9_INTERACT>;
3#[doc = "Writer for register CH9_INTERACT"]
4pub type W = crate::W<u32, super::CH9_INTERACT>;
5#[doc = "Register CH9_INTERACT `reset()`'s with value 0"]
6impl crate::ResetValue for super::CH9_INTERACT {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type { 0 }
10}
11#[doc = "Reader of field `THRES`"]
12pub type THRES_R = crate::R<u16, u16>;
13#[doc = "Write proxy for field `THRES`"]
14pub struct THRES_W<'a> {
15    w: &'a mut W,
16}
17impl<'a> THRES_W<'a> {
18    #[doc = r"Writes raw bits to the field"]
19    #[inline(always)]
20    pub unsafe fn bits(self, value: u16) -> &'a mut W {
21        self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff);
22        self.w
23    }
24}
25#[doc = "Select Sample Mode\n\nValue on reset: 0"]
26#[derive(Clone, Copy, Debug, PartialEq)]
27#[repr(u8)]
28pub enum SAMPLE_A {
29    #[doc = "0: Counter output will be used in evaluation"]
30    ACMPCOUNT = 0,
31    #[doc = "1: ACMP output will be used in evaluation"]
32    ACMP = 1,
33    #[doc = "2: ADC output will be used in evaluation"]
34    ADC = 2,
35    #[doc = "3: Differential ADC output will be used in evaluation"]
36    ADCDIFF = 3,
37}
38impl From<SAMPLE_A> for u8 {
39    #[inline(always)]
40    fn from(variant: SAMPLE_A) -> Self { variant as _ }
41}
42#[doc = "Reader of field `SAMPLE`"]
43pub type SAMPLE_R = crate::R<u8, SAMPLE_A>;
44impl SAMPLE_R {
45    #[doc = r"Get enumerated values variant"]
46    #[inline(always)]
47    pub fn variant(&self) -> SAMPLE_A {
48        match self.bits {
49            0 => SAMPLE_A::ACMPCOUNT,
50            1 => SAMPLE_A::ACMP,
51            2 => SAMPLE_A::ADC,
52            3 => SAMPLE_A::ADCDIFF,
53            _ => unreachable!(),
54        }
55    }
56    #[doc = "Checks if the value of the field is `ACMPCOUNT`"]
57    #[inline(always)]
58    pub fn is_acmpcount(&self) -> bool { *self == SAMPLE_A::ACMPCOUNT }
59    #[doc = "Checks if the value of the field is `ACMP`"]
60    #[inline(always)]
61    pub fn is_acmp(&self) -> bool { *self == SAMPLE_A::ACMP }
62    #[doc = "Checks if the value of the field is `ADC`"]
63    #[inline(always)]
64    pub fn is_adc(&self) -> bool { *self == SAMPLE_A::ADC }
65    #[doc = "Checks if the value of the field is `ADCDIFF`"]
66    #[inline(always)]
67    pub fn is_adcdiff(&self) -> bool { *self == SAMPLE_A::ADCDIFF }
68}
69#[doc = "Write proxy for field `SAMPLE`"]
70pub struct SAMPLE_W<'a> {
71    w: &'a mut W,
72}
73impl<'a> SAMPLE_W<'a> {
74    #[doc = r"Writes `variant` to the field"]
75    #[inline(always)]
76    pub fn variant(self, variant: SAMPLE_A) -> &'a mut W {
77        {
78            self.bits(variant.into())
79        }
80    }
81    #[doc = "Counter output will be used in evaluation"]
82    #[inline(always)]
83    pub fn acmpcount(self) -> &'a mut W { self.variant(SAMPLE_A::ACMPCOUNT) }
84    #[doc = "ACMP output will be used in evaluation"]
85    #[inline(always)]
86    pub fn acmp(self) -> &'a mut W { self.variant(SAMPLE_A::ACMP) }
87    #[doc = "ADC output will be used in evaluation"]
88    #[inline(always)]
89    pub fn adc(self) -> &'a mut W { self.variant(SAMPLE_A::ADC) }
90    #[doc = "Differential ADC output will be used in evaluation"]
91    #[inline(always)]
92    pub fn adcdiff(self) -> &'a mut W { self.variant(SAMPLE_A::ADCDIFF) }
93    #[doc = r"Writes raw bits to the field"]
94    #[inline(always)]
95    pub fn bits(self, value: u8) -> &'a mut W {
96        self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
97        self.w
98    }
99}
100#[doc = "Enable Interrupt Generation\n\nValue on reset: 0"]
101#[derive(Clone, Copy, Debug, PartialEq)]
102#[repr(u8)]
103pub enum SETIF_A {
104    #[doc = "0: No interrupt is generated"]
105    NONE = 0,
106    #[doc = "1: Set interrupt flag if the sensor triggers."]
107    LEVEL = 1,
108    #[doc = "2: Set interrupt flag on positive edge of the sensor state"]
109    POSEDGE = 2,
110    #[doc = "3: Set interrupt flag on negative edge of the sensor state"]
111    NEGEDGE = 3,
112    #[doc = "4: Set interrupt flag on both edges of the sensor state"]
113    BOTHEDGES = 4,
114}
115impl From<SETIF_A> for u8 {
116    #[inline(always)]
117    fn from(variant: SETIF_A) -> Self { variant as _ }
118}
119#[doc = "Reader of field `SETIF`"]
120pub type SETIF_R = crate::R<u8, SETIF_A>;
121impl SETIF_R {
122    #[doc = r"Get enumerated values variant"]
123    #[inline(always)]
124    pub fn variant(&self) -> crate::Variant<u8, SETIF_A> {
125        use crate::Variant::*;
126        match self.bits {
127            0 => Val(SETIF_A::NONE),
128            1 => Val(SETIF_A::LEVEL),
129            2 => Val(SETIF_A::POSEDGE),
130            3 => Val(SETIF_A::NEGEDGE),
131            4 => Val(SETIF_A::BOTHEDGES),
132            i => Res(i),
133        }
134    }
135    #[doc = "Checks if the value of the field is `NONE`"]
136    #[inline(always)]
137    pub fn is_none(&self) -> bool { *self == SETIF_A::NONE }
138    #[doc = "Checks if the value of the field is `LEVEL`"]
139    #[inline(always)]
140    pub fn is_level(&self) -> bool { *self == SETIF_A::LEVEL }
141    #[doc = "Checks if the value of the field is `POSEDGE`"]
142    #[inline(always)]
143    pub fn is_posedge(&self) -> bool { *self == SETIF_A::POSEDGE }
144    #[doc = "Checks if the value of the field is `NEGEDGE`"]
145    #[inline(always)]
146    pub fn is_negedge(&self) -> bool { *self == SETIF_A::NEGEDGE }
147    #[doc = "Checks if the value of the field is `BOTHEDGES`"]
148    #[inline(always)]
149    pub fn is_bothedges(&self) -> bool { *self == SETIF_A::BOTHEDGES }
150}
151#[doc = "Write proxy for field `SETIF`"]
152pub struct SETIF_W<'a> {
153    w: &'a mut W,
154}
155impl<'a> SETIF_W<'a> {
156    #[doc = r"Writes `variant` to the field"]
157    #[inline(always)]
158    pub fn variant(self, variant: SETIF_A) -> &'a mut W { unsafe { self.bits(variant.into()) } }
159    #[doc = "No interrupt is generated"]
160    #[inline(always)]
161    pub fn none(self) -> &'a mut W { self.variant(SETIF_A::NONE) }
162    #[doc = "Set interrupt flag if the sensor triggers."]
163    #[inline(always)]
164    pub fn level(self) -> &'a mut W { self.variant(SETIF_A::LEVEL) }
165    #[doc = "Set interrupt flag on positive edge of the sensor state"]
166    #[inline(always)]
167    pub fn posedge(self) -> &'a mut W { self.variant(SETIF_A::POSEDGE) }
168    #[doc = "Set interrupt flag on negative edge of the sensor state"]
169    #[inline(always)]
170    pub fn negedge(self) -> &'a mut W { self.variant(SETIF_A::NEGEDGE) }
171    #[doc = "Set interrupt flag on both edges of the sensor state"]
172    #[inline(always)]
173    pub fn bothedges(self) -> &'a mut W { self.variant(SETIF_A::BOTHEDGES) }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub unsafe fn bits(self, value: u8) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x07 << 14)) | (((value as u32) & 0x07) << 14);
178        self.w
179    }
180}
181#[doc = "Set GPIO Mode\n\nValue on reset: 0"]
182#[derive(Clone, Copy, Debug, PartialEq)]
183#[repr(u8)]
184pub enum EXMODE_A {
185    #[doc = "0: Disabled"]
186    DISABLE = 0,
187    #[doc = "1: Push Pull, GPIO is driven high"]
188    HIGH = 1,
189    #[doc = "2: Push Pull, GPIO is driven low"]
190    LOW = 2,
191    #[doc = "3: VDAC output"]
192    DACOUT = 3,
193}
194impl From<EXMODE_A> for u8 {
195    #[inline(always)]
196    fn from(variant: EXMODE_A) -> Self { variant as _ }
197}
198#[doc = "Reader of field `EXMODE`"]
199pub type EXMODE_R = crate::R<u8, EXMODE_A>;
200impl EXMODE_R {
201    #[doc = r"Get enumerated values variant"]
202    #[inline(always)]
203    pub fn variant(&self) -> EXMODE_A {
204        match self.bits {
205            0 => EXMODE_A::DISABLE,
206            1 => EXMODE_A::HIGH,
207            2 => EXMODE_A::LOW,
208            3 => EXMODE_A::DACOUT,
209            _ => unreachable!(),
210        }
211    }
212    #[doc = "Checks if the value of the field is `DISABLE`"]
213    #[inline(always)]
214    pub fn is_disable(&self) -> bool { *self == EXMODE_A::DISABLE }
215    #[doc = "Checks if the value of the field is `HIGH`"]
216    #[inline(always)]
217    pub fn is_high(&self) -> bool { *self == EXMODE_A::HIGH }
218    #[doc = "Checks if the value of the field is `LOW`"]
219    #[inline(always)]
220    pub fn is_low(&self) -> bool { *self == EXMODE_A::LOW }
221    #[doc = "Checks if the value of the field is `DACOUT`"]
222    #[inline(always)]
223    pub fn is_dacout(&self) -> bool { *self == EXMODE_A::DACOUT }
224}
225#[doc = "Write proxy for field `EXMODE`"]
226pub struct EXMODE_W<'a> {
227    w: &'a mut W,
228}
229impl<'a> EXMODE_W<'a> {
230    #[doc = r"Writes `variant` to the field"]
231    #[inline(always)]
232    pub fn variant(self, variant: EXMODE_A) -> &'a mut W {
233        {
234            self.bits(variant.into())
235        }
236    }
237    #[doc = "Disabled"]
238    #[inline(always)]
239    pub fn disable(self) -> &'a mut W { self.variant(EXMODE_A::DISABLE) }
240    #[doc = "Push Pull, GPIO is driven high"]
241    #[inline(always)]
242    pub fn high(self) -> &'a mut W { self.variant(EXMODE_A::HIGH) }
243    #[doc = "Push Pull, GPIO is driven low"]
244    #[inline(always)]
245    pub fn low(self) -> &'a mut W { self.variant(EXMODE_A::LOW) }
246    #[doc = "VDAC output"]
247    #[inline(always)]
248    pub fn dacout(self) -> &'a mut W { self.variant(EXMODE_A::DACOUT) }
249    #[doc = r"Writes raw bits to the field"]
250    #[inline(always)]
251    pub fn bits(self, value: u8) -> &'a mut W {
252        self.w.bits = (self.w.bits & !(0x03 << 17)) | (((value as u32) & 0x03) << 17);
253        self.w
254    }
255}
256#[doc = "Reader of field `EXCLK`"]
257pub type EXCLK_R = crate::R<bool, bool>;
258#[doc = "Write proxy for field `EXCLK`"]
259pub struct EXCLK_W<'a> {
260    w: &'a mut W,
261}
262impl<'a> EXCLK_W<'a> {
263    #[doc = r"Sets the field bit"]
264    #[inline(always)]
265    pub fn set_bit(self) -> &'a mut W { self.bit(true) }
266    #[doc = r"Clears the field bit"]
267    #[inline(always)]
268    pub fn clear_bit(self) -> &'a mut W { self.bit(false) }
269    #[doc = r"Writes raw bits to the field"]
270    #[inline(always)]
271    pub fn bit(self, value: bool) -> &'a mut W {
272        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
273        self.w
274    }
275}
276#[doc = "Reader of field `SAMPLECLK`"]
277pub type SAMPLECLK_R = crate::R<bool, bool>;
278#[doc = "Write proxy for field `SAMPLECLK`"]
279pub struct SAMPLECLK_W<'a> {
280    w: &'a mut W,
281}
282impl<'a> SAMPLECLK_W<'a> {
283    #[doc = r"Sets the field bit"]
284    #[inline(always)]
285    pub fn set_bit(self) -> &'a mut W { self.bit(true) }
286    #[doc = r"Clears the field bit"]
287    #[inline(always)]
288    pub fn clear_bit(self) -> &'a mut W { self.bit(false) }
289    #[doc = r"Writes raw bits to the field"]
290    #[inline(always)]
291    pub fn bit(self, value: bool) -> &'a mut W {
292        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
293        self.w
294    }
295}
296#[doc = "Reader of field `ALTEX`"]
297pub type ALTEX_R = crate::R<bool, bool>;
298#[doc = "Write proxy for field `ALTEX`"]
299pub struct ALTEX_W<'a> {
300    w: &'a mut W,
301}
302impl<'a> ALTEX_W<'a> {
303    #[doc = r"Sets the field bit"]
304    #[inline(always)]
305    pub fn set_bit(self) -> &'a mut W { self.bit(true) }
306    #[doc = r"Clears the field bit"]
307    #[inline(always)]
308    pub fn clear_bit(self) -> &'a mut W { self.bit(false) }
309    #[doc = r"Writes raw bits to the field"]
310    #[inline(always)]
311    pub fn bit(self, value: bool) -> &'a mut W {
312        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
313        self.w
314    }
315}
316impl R {
317    #[doc = "Bits 0:11 - ACMP Threshold or VDAC Data"]
318    #[inline(always)]
319    pub fn thres(&self) -> THRES_R { THRES_R::new((self.bits & 0x0fff) as u16) }
320    #[doc = "Bits 12:13 - Select Sample Mode"]
321    #[inline(always)]
322    pub fn sample(&self) -> SAMPLE_R { SAMPLE_R::new(((self.bits >> 12) & 0x03) as u8) }
323    #[doc = "Bits 14:16 - Enable Interrupt Generation"]
324    #[inline(always)]
325    pub fn setif(&self) -> SETIF_R { SETIF_R::new(((self.bits >> 14) & 0x07) as u8) }
326    #[doc = "Bits 17:18 - Set GPIO Mode"]
327    #[inline(always)]
328    pub fn exmode(&self) -> EXMODE_R { EXMODE_R::new(((self.bits >> 17) & 0x03) as u8) }
329    #[doc = "Bit 19 - Select Clock Used for Excitation Timing"]
330    #[inline(always)]
331    pub fn exclk(&self) -> EXCLK_R { EXCLK_R::new(((self.bits >> 19) & 0x01) != 0) }
332    #[doc = "Bit 20 - Select Clock Used for Timing of Sample Delay"]
333    #[inline(always)]
334    pub fn sampleclk(&self) -> SAMPLECLK_R { SAMPLECLK_R::new(((self.bits >> 20) & 0x01) != 0) }
335    #[doc = "Bit 21 - Use Alternative Excite Pin"]
336    #[inline(always)]
337    pub fn altex(&self) -> ALTEX_R { ALTEX_R::new(((self.bits >> 21) & 0x01) != 0) }
338}
339impl W {
340    #[doc = "Bits 0:11 - ACMP Threshold or VDAC Data"]
341    #[inline(always)]
342    pub fn thres(&mut self) -> THRES_W { THRES_W { w: self } }
343    #[doc = "Bits 12:13 - Select Sample Mode"]
344    #[inline(always)]
345    pub fn sample(&mut self) -> SAMPLE_W { SAMPLE_W { w: self } }
346    #[doc = "Bits 14:16 - Enable Interrupt Generation"]
347    #[inline(always)]
348    pub fn setif(&mut self) -> SETIF_W { SETIF_W { w: self } }
349    #[doc = "Bits 17:18 - Set GPIO Mode"]
350    #[inline(always)]
351    pub fn exmode(&mut self) -> EXMODE_W { EXMODE_W { w: self } }
352    #[doc = "Bit 19 - Select Clock Used for Excitation Timing"]
353    #[inline(always)]
354    pub fn exclk(&mut self) -> EXCLK_W { EXCLK_W { w: self } }
355    #[doc = "Bit 20 - Select Clock Used for Timing of Sample Delay"]
356    #[inline(always)]
357    pub fn sampleclk(&mut self) -> SAMPLECLK_W { SAMPLECLK_W { w: self } }
358    #[doc = "Bit 21 - Use Alternative Excite Pin"]
359    #[inline(always)]
360    pub fn altex(&mut self) -> ALTEX_W { ALTEX_W { w: self } }
361}
efm32gg11b/lesense/ch9_interact.rs

efm32gg11b/lesense/
ch9_interact.rs
