Struct efm32gg11b_pac::efm32gg11b840::lesense::decctrl::W
source · pub struct W(_);
Expand description
Register DECCTRL
writer
Implementations§
source§impl W
impl W
sourcepub fn intmap(&mut self) -> INTMAP_W<'_, 2>
pub fn intmap(&mut self) -> INTMAP_W<'_, 2>
Bit 2 - Enable Decoder to Channel Interrupt Mapping
sourcepub fn hystprs0(&mut self) -> HYSTPRS0_W<'_, 3>
pub fn hystprs0(&mut self) -> HYSTPRS0_W<'_, 3>
Bit 3 - Enable Decoder Hysteresis on PRS0 Output
sourcepub fn hystprs1(&mut self) -> HYSTPRS1_W<'_, 4>
pub fn hystprs1(&mut self) -> HYSTPRS1_W<'_, 4>
Bit 4 - Enable Decoder Hysteresis on PRS1 Output
sourcepub fn hystprs2(&mut self) -> HYSTPRS2_W<'_, 5>
pub fn hystprs2(&mut self) -> HYSTPRS2_W<'_, 5>
Bit 5 - Enable Decoder Hysteresis on PRS2 Output
sourcepub fn hystirq(&mut self) -> HYSTIRQ_W<'_, 6>
pub fn hystirq(&mut self) -> HYSTIRQ_W<'_, 6>
Bit 6 - Enable Decoder Hysteresis on Interrupt Requests
sourcepub fn prscnt(&mut self) -> PRSCNT_W<'_, 7>
pub fn prscnt(&mut self) -> PRSCNT_W<'_, 7>
Bit 7 - Enable Count Mode on Decoder PRS Channels 0 and 1
sourcepub fn prssel0(&mut self) -> PRSSEL0_W<'_, 10>
pub fn prssel0(&mut self) -> PRSSEL0_W<'_, 10>
Bits 10:14 - LESENSE Decoder PRS Input 0 Configuration
sourcepub fn prssel1(&mut self) -> PRSSEL1_W<'_, 15>
pub fn prssel1(&mut self) -> PRSSEL1_W<'_, 15>
Bits 15:19 - LESENSE Decoder PRS Input 1 Configuration
sourcepub fn prssel2(&mut self) -> PRSSEL2_W<'_, 20>
pub fn prssel2(&mut self) -> PRSSEL2_W<'_, 20>
Bits 20:24 - LESENSE Decoder PRS Input 2 Configuration