#[repr(C)]
pub struct RegisterBlock {
Show 38 fields pub sdmasysaddr: SDMASYSADDR, pub blksize: BLKSIZE, pub cmdarg1: CMDARG1, pub tfrmode: TFRMODE, pub resp0: RESP0, pub resp2: RESP2, pub resp4: RESP4, pub resp6: RESP6, pub bufdatport: BUFDATPORT, pub prsstat: PRSSTAT, pub hostctrl1: HOSTCTRL1, pub clockctrl: CLOCKCTRL, pub ifcr: IFCR, pub ifenc: IFENC, pub ien: IEN, pub ac12errstat: AC12ERRSTAT, pub capab0: CAPAB0, pub capab2: CAPAB2, pub maxcurcapab: MAXCURCAPAB, pub fevterrstat: FEVTERRSTAT, pub admaes: ADMAES, pub adsaddr: ADSADDR, pub prstval0: PRSTVAL0, pub prstval2: PRSTVAL2, pub prstval4: PRSTVAL4, pub prstval6: PRSTVAL6, pub boottoctrl: BOOTTOCTRL, pub slotintstat: SLOTINTSTAT, pub ctrl: CTRL, pub cfg0: CFG0, pub cfg1: CFG1, pub cfgpresetval0: CFGPRESETVAL0, pub cfgpresetval1: CFGPRESETVAL1, pub cfgpresetval2: CFGPRESETVAL2, pub cfgpresetval3: CFGPRESETVAL3, pub routeloc0: ROUTELOC0, pub routeloc1: ROUTELOC1, pub routepen: ROUTEPEN, /* private fields */
}
Expand description

Register block

Fields§

§sdmasysaddr: SDMASYSADDR

0x00 - SDMA System Address Register

§blksize: BLKSIZE

0x04 - Block Size and Block Count Register

§cmdarg1: CMDARG1

0x08 - SD Command Argument Register

§tfrmode: TFRMODE

0x0c - Transfer Mode and Command Register

§resp0: RESP0

0x10 - Response0 and Response1 Register

§resp2: RESP2

0x14 - Response2 and Response3 Register

§resp4: RESP4

0x18 - Response4 and Response5 Register

§resp6: RESP6

0x1c - Response6 and Response7 Register

§bufdatport: BUFDATPORT

0x20 - Buffer Data Register

§prsstat: PRSSTAT

0x24 - Present State Register

§hostctrl1: HOSTCTRL1

0x28 - Host Control1, Power, Block Gap and Wakeup-up Control Register

§clockctrl: CLOCKCTRL

0x2c - Clock Control, Timeout Control and Software Register

§ifcr: IFCR

0x30 - Normal and Error Interrupt Status Register

§ifenc: IFENC

0x34 - Normal and Error Interrupt Status Enable Register

§ien: IEN

0x38 - Normal and Error Interrupt Signal Enable Register

§ac12errstat: AC12ERRSTAT

0x3c - AUTO CMD12 Error Status and Host Control2 Register

§capab0: CAPAB0

0x40 - Capabilities Register to Hold Bits 31~0

§capab2: CAPAB2

0x44 - Capabilities Register to Hold Bits 63~32

§maxcurcapab: MAXCURCAPAB

0x48 - Maximum Current Capabilities Register

§fevterrstat: FEVTERRSTAT

0x50 - Force Event Register for Auto CMD Error Status

§admaes: ADMAES

0x54 - ADMA Error Status Register

§adsaddr: ADSADDR

0x58 - ADMA System Address Register

§prstval0: PRSTVAL0

0x60 - Preset Value for Initialization and Default Speed Mode

§prstval2: PRSTVAL2

0x64 - Preset Value for High Speed and SDR12 Modes

§prstval4: PRSTVAL4

0x68 - Preset Value for SDR25 and SDR50 Modes

§prstval6: PRSTVAL6

0x6c - Preset Value for SDR104 and DDR50 Modes

§boottoctrl: BOOTTOCTRL

0x70 - Boot Timeout Control Register

§slotintstat: SLOTINTSTAT

0xfc - Slot Interrupt Status Register

§ctrl: CTRL

0x800 - Core Control Signals

§cfg0: CFG0

0x804 - Core Configuration 0

§cfg1: CFG1

0x808 - Core Configuration 1

§cfgpresetval0: CFGPRESETVAL0

0x80c - Core Configuration Preset Value 0

§cfgpresetval1: CFGPRESETVAL1

0x810 - Core Configuration Preset Value 1

§cfgpresetval2: CFGPRESETVAL2

0x814 - Core Configuration Preset Value 2

§cfgpresetval3: CFGPRESETVAL3

0x818 - Core Configuration Preset Value 3

§routeloc0: ROUTELOC0

0x81c - I/O LOCATION Register

§routeloc1: ROUTELOC1

0x820 - I/O LOCATION Register

§routepen: ROUTEPEN

0x824 - I/O LOCATION Enable Register

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