Struct efm32gg11b_pac::efm32gg11b840::ebi::ctrl::W

pub struct W(_);

Register CTRL writer

Implementations

impl W

pub fn mode(&mut self) -> MODE_W<'_, 0>

Bits 0:1 - Mode

pub fn mode1(&mut self) -> MODE1_W<'_, 2>

Bits 2:3 - Mode 1

pub fn mode2(&mut self) -> MODE2_W<'_, 4>

Bits 4:5 - Mode 2

pub fn mode3(&mut self) -> MODE3_W<'_, 6>

Bits 6:7 - Mode 3

pub fn bank0en(&mut self) -> BANK0EN_W<'_, 8>

Bit 8 - Bank 0 Enable

pub fn bank1en(&mut self) -> BANK1EN_W<'_, 9>

Bit 9 - Bank 1 Enable

pub fn bank2en(&mut self) -> BANK2EN_W<'_, 10>

Bit 10 - Bank 2 Enable

pub fn bank3en(&mut self) -> BANK3EN_W<'_, 11>

Bit 11 - Bank 3 Enable

pub fn noidle(&mut self) -> NOIDLE_W<'_, 12>

Bit 12 - No Idle Cycle Insertion on Bank 0

pub fn noidle1(&mut self) -> NOIDLE1_W<'_, 13>

Bit 13 - No Idle Cycle Insertion on Bank 1

pub fn noidle2(&mut self) -> NOIDLE2_W<'_, 14>

Bit 14 - No Idle Cycle Insertion on Bank 2

pub fn noidle3(&mut self) -> NOIDLE3_W<'_, 15>

Bit 15 - No Idle Cycle Insertion on Bank 3

pub fn ardyen(&mut self) -> ARDYEN_W<'_, 16>

Bit 16 - ARDY Enable

pub fn ardytodis(&mut self) -> ARDYTODIS_W<'_, 17>

Bit 17 - ARDY Timeout Disable

pub fn ardy1en(&mut self) -> ARDY1EN_W<'_, 18>

Bit 18 - ARDY Enable for Bank 1

pub fn ardyto1dis(&mut self) -> ARDYTO1DIS_W<'_, 19>

Bit 19 - ARDY Timeout Disable for Bank 1

pub fn ardy2en(&mut self) -> ARDY2EN_W<'_, 20>

Bit 20 - ARDY Enable for Bank 2

pub fn ardyto2dis(&mut self) -> ARDYTO2DIS_W<'_, 21>

Bit 21 - ARDY Timeout Disable for Bank 2

pub fn ardy3en(&mut self) -> ARDY3EN_W<'_, 22>

Bit 22 - ARDY Enable for Bank 3

pub fn ardyto3dis(&mut self) -> ARDYTO3DIS_W<'_, 23>

Bit 23 - ARDY Timeout Disable for Bank 3

pub fn bl(&mut self) -> BL_W<'_, 24>

Bit 24 - Byte Lane Enable for Bank 0

pub fn bl1(&mut self) -> BL1_W<'_, 25>

Bit 25 - Byte Lane Enable for Bank 1

pub fn bl2(&mut self) -> BL2_W<'_, 26>

Bit 26 - Byte Lane Enable for Bank 2

pub fn bl3(&mut self) -> BL3_W<'_, 27>

Bit 27 - Byte Lane Enable for Bank 3

pub fn its(&mut self) -> ITS_W<'_, 30>

Bit 30 - Individual Timing Set, Line Polarity and Mode Definition Enable

pub fn altmap(&mut self) -> ALTMAP_W<'_, 31>

Bit 31 - Alternative Address Map Enable

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CTRL_SPEC>> for W

fn from(writer: W<CTRL_SPEC>) -> Self

Converts to this type from the input type.