Type Definition efm32gg11b_pac::efm32gg11b840::can0::status::LEC_W
source · pub type LEC_W<'a, const O: u8> = FieldWriterSafe<'a, u32, STATUS_SPEC, u8, LEC_A, 3, O>;
Expand description
Field LEC
writer - Last Error Code
Implementations§
source§impl<'a, const O: u8> LEC_W<'a, O>
impl<'a, const O: u8> LEC_W<'a, O>
sourcepub fn stuff(self) -> &'a mut W
pub fn stuff(self) -> &'a mut W
More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed.
sourcepub fn ack(self) -> &'a mut W
pub fn ack(self) -> &'a mut W
The message this CAN Core transmitted was not acknowledged by another node.
sourcepub fn bit1(self) -> &'a mut W
pub fn bit1(self) -> &'a mut W
During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant.
sourcepub fn bit0(self) -> &'a mut W
pub fn bit0(self) -> &'a mut W
During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed).