Struct efm32gg11b_pac::efm32gg11b110::emu::dcdclpem01cfg::DCDCLPEM01CFG_SPEC

pub struct DCDCLPEM01CFG_SPEC;

Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Relevant If LP Mode is Used in EM01

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see dcdclpem01cfg module

Trait Implementations

impl Readable for DCDCLPEM01CFG_SPEC

read() method returns dcdclpem01cfg::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for DCDCLPEM01CFG_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for DCDCLPEM01CFG_SPEC

reset() method sets DCDCLPEM01CFG to value 0x0300

const RESET_VALUE: Self::Ux = {transmute(0x00000300): <efm32gg11b110::emu::dcdclpem01cfg::DCDCLPEM01CFG_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for DCDCLPEM01CFG_SPEC

write(|w| ..) method takes dcdclpem01cfg::W writer structure

type Writer = W

Writer type argument to write, et al.

const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <efm32gg11b110::emu::dcdclpem01cfg::DCDCLPEM01CFG_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <efm32gg11b110::emu::dcdclpem01cfg::DCDCLPEM01CFG_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1