efm32gg_pac/efm32gg995/usb/
gnptxfsiz.rs1#[doc = "Register `GNPTXFSIZ` reader"]
2pub struct R(crate::R<GNPTXFSIZ_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GNPTXFSIZ_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GNPTXFSIZ_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GNPTXFSIZ_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `GNPTXFSIZ` writer"]
17pub struct W(crate::W<GNPTXFSIZ_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GNPTXFSIZ_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GNPTXFSIZ_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GNPTXFSIZ_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `NPTXFSTADDR` reader - Non-periodic Transmit RAM Start Address host only"]
38pub type NPTXFSTADDR_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `NPTXFSTADDR` writer - Non-periodic Transmit RAM Start Address host only"]
40pub type NPTXFSTADDR_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, GNPTXFSIZ_SPEC, u16, u16, 10, O>;
42#[doc = "Field `NPTXFINEPTXF0DEP` reader - Non-periodic TxFIFO Depth host only / IN Endpoint TxFIFO 0 Depth device only"]
43pub type NPTXFINEPTXF0DEP_R = crate::FieldReader<u16, u16>;
44#[doc = "Field `NPTXFINEPTXF0DEP` writer - Non-periodic TxFIFO Depth host only / IN Endpoint TxFIFO 0 Depth device only"]
45pub type NPTXFINEPTXF0DEP_W<'a, const O: u8> =
46 crate::FieldWriter<'a, u32, GNPTXFSIZ_SPEC, u16, u16, 16, O>;
47impl R {
48 #[doc = "Bits 0:9 - Non-periodic Transmit RAM Start Address host only"]
49 #[inline(always)]
50 pub fn nptxfstaddr(&self) -> NPTXFSTADDR_R {
51 NPTXFSTADDR_R::new((self.bits & 0x03ff) as u16)
52 }
53 #[doc = "Bits 16:31 - Non-periodic TxFIFO Depth host only / IN Endpoint TxFIFO 0 Depth device only"]
54 #[inline(always)]
55 pub fn nptxfineptxf0dep(&self) -> NPTXFINEPTXF0DEP_R {
56 NPTXFINEPTXF0DEP_R::new(((self.bits >> 16) & 0xffff) as u16)
57 }
58}
59impl W {
60 #[doc = "Bits 0:9 - Non-periodic Transmit RAM Start Address host only"]
61 #[inline(always)]
62 #[must_use]
63 pub fn nptxfstaddr(&mut self) -> NPTXFSTADDR_W<0> {
64 NPTXFSTADDR_W::new(self)
65 }
66 #[doc = "Bits 16:31 - Non-periodic TxFIFO Depth host only / IN Endpoint TxFIFO 0 Depth device only"]
67 #[inline(always)]
68 #[must_use]
69 pub fn nptxfineptxf0dep(&mut self) -> NPTXFINEPTXF0DEP_W<16> {
70 NPTXFINEPTXF0DEP_W::new(self)
71 }
72 #[doc = "Writes raw bits to the register."]
73 #[inline(always)]
74 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
75 self.0.bits(bits);
76 self
77 }
78}
79#[doc = "Non-periodic Transmit FIFO Size Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gnptxfsiz](index.html) module"]
80pub struct GNPTXFSIZ_SPEC;
81impl crate::RegisterSpec for GNPTXFSIZ_SPEC {
82 type Ux = u32;
83}
84#[doc = "`read()` method returns [gnptxfsiz::R](R) reader structure"]
85impl crate::Readable for GNPTXFSIZ_SPEC {
86 type Reader = R;
87}
88#[doc = "`write(|w| ..)` method takes [gnptxfsiz::W](W) writer structure"]
89impl crate::Writable for GNPTXFSIZ_SPEC {
90 type Writer = W;
91 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
92 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
93}
94#[doc = "`reset()` method sets GNPTXFSIZ to value 0x0200_0200"]
95impl crate::Resettable for GNPTXFSIZ_SPEC {
96 const RESET_VALUE: Self::Ux = 0x0200_0200;
97}