efm32gg_pac/efm32gg995/usb/
doepmsk.rs1#[doc = "Register `DOEPMSK` reader"]
2pub struct R(crate::R<DOEPMSK_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DOEPMSK_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DOEPMSK_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DOEPMSK_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DOEPMSK` writer"]
17pub struct W(crate::W<DOEPMSK_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DOEPMSK_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DOEPMSK_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DOEPMSK_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `XFERCOMPLMSK` reader - Transfer Completed Interrupt Mask"]
38pub type XFERCOMPLMSK_R = crate::BitReader<bool>;
39#[doc = "Field `XFERCOMPLMSK` writer - Transfer Completed Interrupt Mask"]
40pub type XFERCOMPLMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
41#[doc = "Field `EPDISBLDMSK` reader - Endpoint Disabled Interrupt Mask"]
42pub type EPDISBLDMSK_R = crate::BitReader<bool>;
43#[doc = "Field `EPDISBLDMSK` writer - Endpoint Disabled Interrupt Mask"]
44pub type EPDISBLDMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
45#[doc = "Field `AHBERRMSK` reader - AHB Error"]
46pub type AHBERRMSK_R = crate::BitReader<bool>;
47#[doc = "Field `AHBERRMSK` writer - AHB Error"]
48pub type AHBERRMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
49#[doc = "Field `SETUPMSK` reader - SETUP Phase Done Mask"]
50pub type SETUPMSK_R = crate::BitReader<bool>;
51#[doc = "Field `SETUPMSK` writer - SETUP Phase Done Mask"]
52pub type SETUPMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
53#[doc = "Field `OUTTKNEPDISMSK` reader - OUT Token Received when Endpoint Disabled Mask"]
54pub type OUTTKNEPDISMSK_R = crate::BitReader<bool>;
55#[doc = "Field `OUTTKNEPDISMSK` writer - OUT Token Received when Endpoint Disabled Mask"]
56pub type OUTTKNEPDISMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
57#[doc = "Field `BACK2BACKSETUP` reader - Back-to-Back SETUP Packets Received Mask"]
58pub type BACK2BACKSETUP_R = crate::BitReader<bool>;
59#[doc = "Field `BACK2BACKSETUP` writer - Back-to-Back SETUP Packets Received Mask"]
60pub type BACK2BACKSETUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
61#[doc = "Field `OUTPKTERRMSK` reader - OUT Packet Error Mask"]
62pub type OUTPKTERRMSK_R = crate::BitReader<bool>;
63#[doc = "Field `OUTPKTERRMSK` writer - OUT Packet Error Mask"]
64pub type OUTPKTERRMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
65#[doc = "Field `BBLEERRMSK` reader - Babble Error interrupt Mask"]
66pub type BBLEERRMSK_R = crate::BitReader<bool>;
67#[doc = "Field `BBLEERRMSK` writer - Babble Error interrupt Mask"]
68pub type BBLEERRMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
69#[doc = "Field `NAKMSK` reader - NAK interrupt Mask"]
70pub type NAKMSK_R = crate::BitReader<bool>;
71#[doc = "Field `NAKMSK` writer - NAK interrupt Mask"]
72pub type NAKMSK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, O>;
73impl R {
74 #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
75 #[inline(always)]
76 pub fn xfercomplmsk(&self) -> XFERCOMPLMSK_R {
77 XFERCOMPLMSK_R::new((self.bits & 1) != 0)
78 }
79 #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
80 #[inline(always)]
81 pub fn epdisbldmsk(&self) -> EPDISBLDMSK_R {
82 EPDISBLDMSK_R::new(((self.bits >> 1) & 1) != 0)
83 }
84 #[doc = "Bit 2 - AHB Error"]
85 #[inline(always)]
86 pub fn ahberrmsk(&self) -> AHBERRMSK_R {
87 AHBERRMSK_R::new(((self.bits >> 2) & 1) != 0)
88 }
89 #[doc = "Bit 3 - SETUP Phase Done Mask"]
90 #[inline(always)]
91 pub fn setupmsk(&self) -> SETUPMSK_R {
92 SETUPMSK_R::new(((self.bits >> 3) & 1) != 0)
93 }
94 #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"]
95 #[inline(always)]
96 pub fn outtknepdismsk(&self) -> OUTTKNEPDISMSK_R {
97 OUTTKNEPDISMSK_R::new(((self.bits >> 4) & 1) != 0)
98 }
99 #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"]
100 #[inline(always)]
101 pub fn back2backsetup(&self) -> BACK2BACKSETUP_R {
102 BACK2BACKSETUP_R::new(((self.bits >> 6) & 1) != 0)
103 }
104 #[doc = "Bit 8 - OUT Packet Error Mask"]
105 #[inline(always)]
106 pub fn outpkterrmsk(&self) -> OUTPKTERRMSK_R {
107 OUTPKTERRMSK_R::new(((self.bits >> 8) & 1) != 0)
108 }
109 #[doc = "Bit 12 - Babble Error interrupt Mask"]
110 #[inline(always)]
111 pub fn bbleerrmsk(&self) -> BBLEERRMSK_R {
112 BBLEERRMSK_R::new(((self.bits >> 12) & 1) != 0)
113 }
114 #[doc = "Bit 13 - NAK interrupt Mask"]
115 #[inline(always)]
116 pub fn nakmsk(&self) -> NAKMSK_R {
117 NAKMSK_R::new(((self.bits >> 13) & 1) != 0)
118 }
119}
120impl W {
121 #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
122 #[inline(always)]
123 #[must_use]
124 pub fn xfercomplmsk(&mut self) -> XFERCOMPLMSK_W<0> {
125 XFERCOMPLMSK_W::new(self)
126 }
127 #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
128 #[inline(always)]
129 #[must_use]
130 pub fn epdisbldmsk(&mut self) -> EPDISBLDMSK_W<1> {
131 EPDISBLDMSK_W::new(self)
132 }
133 #[doc = "Bit 2 - AHB Error"]
134 #[inline(always)]
135 #[must_use]
136 pub fn ahberrmsk(&mut self) -> AHBERRMSK_W<2> {
137 AHBERRMSK_W::new(self)
138 }
139 #[doc = "Bit 3 - SETUP Phase Done Mask"]
140 #[inline(always)]
141 #[must_use]
142 pub fn setupmsk(&mut self) -> SETUPMSK_W<3> {
143 SETUPMSK_W::new(self)
144 }
145 #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"]
146 #[inline(always)]
147 #[must_use]
148 pub fn outtknepdismsk(&mut self) -> OUTTKNEPDISMSK_W<4> {
149 OUTTKNEPDISMSK_W::new(self)
150 }
151 #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"]
152 #[inline(always)]
153 #[must_use]
154 pub fn back2backsetup(&mut self) -> BACK2BACKSETUP_W<6> {
155 BACK2BACKSETUP_W::new(self)
156 }
157 #[doc = "Bit 8 - OUT Packet Error Mask"]
158 #[inline(always)]
159 #[must_use]
160 pub fn outpkterrmsk(&mut self) -> OUTPKTERRMSK_W<8> {
161 OUTPKTERRMSK_W::new(self)
162 }
163 #[doc = "Bit 12 - Babble Error interrupt Mask"]
164 #[inline(always)]
165 #[must_use]
166 pub fn bbleerrmsk(&mut self) -> BBLEERRMSK_W<12> {
167 BBLEERRMSK_W::new(self)
168 }
169 #[doc = "Bit 13 - NAK interrupt Mask"]
170 #[inline(always)]
171 #[must_use]
172 pub fn nakmsk(&mut self) -> NAKMSK_W<13> {
173 NAKMSK_W::new(self)
174 }
175 #[doc = "Writes raw bits to the register."]
176 #[inline(always)]
177 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
178 self.0.bits(bits);
179 self
180 }
181}
182#[doc = "Device OUT Endpoint Common Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doepmsk](index.html) module"]
183pub struct DOEPMSK_SPEC;
184impl crate::RegisterSpec for DOEPMSK_SPEC {
185 type Ux = u32;
186}
187#[doc = "`read()` method returns [doepmsk::R](R) reader structure"]
188impl crate::Readable for DOEPMSK_SPEC {
189 type Reader = R;
190}
191#[doc = "`write(|w| ..)` method takes [doepmsk::W](W) writer structure"]
192impl crate::Writable for DOEPMSK_SPEC {
193 type Writer = W;
194 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
195 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
196}
197#[doc = "`reset()` method sets DOEPMSK to value 0"]
198impl crate::Resettable for DOEPMSK_SPEC {
199 const RESET_VALUE: Self::Ux = 0;
200}