efm32gg_pac/efm32gg995/usb/
doep3_tsiz.rs1#[doc = "Register `DOEP3_TSIZ` reader"]
2pub struct R(crate::R<DOEP3_TSIZ_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DOEP3_TSIZ_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DOEP3_TSIZ_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DOEP3_TSIZ_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DOEP3_TSIZ` writer"]
17pub struct W(crate::W<DOEP3_TSIZ_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DOEP3_TSIZ_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DOEP3_TSIZ_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DOEP3_TSIZ_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `XFERSIZE` reader - Transfer Size"]
38pub type XFERSIZE_R = crate::FieldReader<u32, u32>;
39#[doc = "Field `XFERSIZE` writer - Transfer Size"]
40pub type XFERSIZE_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, DOEP3_TSIZ_SPEC, u32, u32, 19, O>;
42#[doc = "Field `PKTCNT` reader - Packet Count"]
43pub type PKTCNT_R = crate::FieldReader<u16, u16>;
44#[doc = "Field `PKTCNT` writer - Packet Count"]
45pub type PKTCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DOEP3_TSIZ_SPEC, u16, u16, 10, O>;
46#[doc = "Field `RXDPIDSUPCNT` reader - Receive Data PID / SETUP Packet Count"]
47pub type RXDPIDSUPCNT_R = crate::FieldReader<u8, RXDPIDSUPCNT_A>;
48#[doc = "Receive Data PID / SETUP Packet Count\n\nValue on reset: 0"]
49#[derive(Clone, Copy, Debug, PartialEq, Eq)]
50#[repr(u8)]
51pub enum RXDPIDSUPCNT_A {
52 #[doc = "0: DATA0 PID."]
53 DATA0 = 0,
54 #[doc = "1: DATA2 PID / 1 Packet."]
55 DATA2 = 1,
56 #[doc = "2: DATA1 PID / 2 Packets."]
57 DATA1 = 2,
58 #[doc = "3: MDATA PID / 3 Packets."]
59 MDATA = 3,
60}
61impl From<RXDPIDSUPCNT_A> for u8 {
62 #[inline(always)]
63 fn from(variant: RXDPIDSUPCNT_A) -> Self {
64 variant as _
65 }
66}
67impl RXDPIDSUPCNT_R {
68 #[doc = "Get enumerated values variant"]
69 #[inline(always)]
70 pub fn variant(&self) -> RXDPIDSUPCNT_A {
71 match self.bits {
72 0 => RXDPIDSUPCNT_A::DATA0,
73 1 => RXDPIDSUPCNT_A::DATA2,
74 2 => RXDPIDSUPCNT_A::DATA1,
75 3 => RXDPIDSUPCNT_A::MDATA,
76 _ => unreachable!(),
77 }
78 }
79 #[doc = "Checks if the value of the field is `DATA0`"]
80 #[inline(always)]
81 pub fn is_data0(&self) -> bool {
82 *self == RXDPIDSUPCNT_A::DATA0
83 }
84 #[doc = "Checks if the value of the field is `DATA2`"]
85 #[inline(always)]
86 pub fn is_data2(&self) -> bool {
87 *self == RXDPIDSUPCNT_A::DATA2
88 }
89 #[doc = "Checks if the value of the field is `DATA1`"]
90 #[inline(always)]
91 pub fn is_data1(&self) -> bool {
92 *self == RXDPIDSUPCNT_A::DATA1
93 }
94 #[doc = "Checks if the value of the field is `MDATA`"]
95 #[inline(always)]
96 pub fn is_mdata(&self) -> bool {
97 *self == RXDPIDSUPCNT_A::MDATA
98 }
99}
100impl R {
101 #[doc = "Bits 0:18 - Transfer Size"]
102 #[inline(always)]
103 pub fn xfersize(&self) -> XFERSIZE_R {
104 XFERSIZE_R::new(self.bits & 0x0007_ffff)
105 }
106 #[doc = "Bits 19:28 - Packet Count"]
107 #[inline(always)]
108 pub fn pktcnt(&self) -> PKTCNT_R {
109 PKTCNT_R::new(((self.bits >> 19) & 0x03ff) as u16)
110 }
111 #[doc = "Bits 29:30 - Receive Data PID / SETUP Packet Count"]
112 #[inline(always)]
113 pub fn rxdpidsupcnt(&self) -> RXDPIDSUPCNT_R {
114 RXDPIDSUPCNT_R::new(((self.bits >> 29) & 3) as u8)
115 }
116}
117impl W {
118 #[doc = "Bits 0:18 - Transfer Size"]
119 #[inline(always)]
120 #[must_use]
121 pub fn xfersize(&mut self) -> XFERSIZE_W<0> {
122 XFERSIZE_W::new(self)
123 }
124 #[doc = "Bits 19:28 - Packet Count"]
125 #[inline(always)]
126 #[must_use]
127 pub fn pktcnt(&mut self) -> PKTCNT_W<19> {
128 PKTCNT_W::new(self)
129 }
130 #[doc = "Writes raw bits to the register."]
131 #[inline(always)]
132 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133 self.0.bits(bits);
134 self
135 }
136}
137#[doc = "Device OUT Endpoint x+1 Transfer Size Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep3_tsiz](index.html) module"]
138pub struct DOEP3_TSIZ_SPEC;
139impl crate::RegisterSpec for DOEP3_TSIZ_SPEC {
140 type Ux = u32;
141}
142#[doc = "`read()` method returns [doep3_tsiz::R](R) reader structure"]
143impl crate::Readable for DOEP3_TSIZ_SPEC {
144 type Reader = R;
145}
146#[doc = "`write(|w| ..)` method takes [doep3_tsiz::W](W) writer structure"]
147impl crate::Writable for DOEP3_TSIZ_SPEC {
148 type Writer = W;
149 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
150 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
151}
152#[doc = "`reset()` method sets DOEP3_TSIZ to value 0"]
153impl crate::Resettable for DOEP3_TSIZ_SPEC {
154 const RESET_VALUE: Self::Ux = 0;
155}