efm32gg_pac/efm32gg995/usb/
doep0ctl.rs

1#[doc = "Register `DOEP0CTL` reader"]
2pub struct R(crate::R<DOEP0CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DOEP0CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DOEP0CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DOEP0CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DOEP0CTL` writer"]
17pub struct W(crate::W<DOEP0CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DOEP0CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DOEP0CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DOEP0CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MPS` reader - Maximum Packet Size"]
38pub type MPS_R = crate::FieldReader<u8, MPS_A>;
39#[doc = "Maximum Packet Size\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum MPS_A {
43    #[doc = "0: 64 bytes."]
44    _64B = 0,
45    #[doc = "1: 32 bytes."]
46    _32B = 1,
47    #[doc = "2: 16 bytes."]
48    _16B = 2,
49    #[doc = "3: 8 bytes."]
50    _8B = 3,
51}
52impl From<MPS_A> for u8 {
53    #[inline(always)]
54    fn from(variant: MPS_A) -> Self {
55        variant as _
56    }
57}
58impl MPS_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> MPS_A {
62        match self.bits {
63            0 => MPS_A::_64B,
64            1 => MPS_A::_32B,
65            2 => MPS_A::_16B,
66            3 => MPS_A::_8B,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `_64B`"]
71    #[inline(always)]
72    pub fn is_64b(&self) -> bool {
73        *self == MPS_A::_64B
74    }
75    #[doc = "Checks if the value of the field is `_32B`"]
76    #[inline(always)]
77    pub fn is_32b(&self) -> bool {
78        *self == MPS_A::_32B
79    }
80    #[doc = "Checks if the value of the field is `_16B`"]
81    #[inline(always)]
82    pub fn is_16b(&self) -> bool {
83        *self == MPS_A::_16B
84    }
85    #[doc = "Checks if the value of the field is `_8B`"]
86    #[inline(always)]
87    pub fn is_8b(&self) -> bool {
88        *self == MPS_A::_8B
89    }
90}
91#[doc = "Field `USBACTEP` reader - USB Active Endpoint"]
92pub type USBACTEP_R = crate::BitReader<bool>;
93#[doc = "Field `NAKSTS` reader - NAK Status"]
94pub type NAKSTS_R = crate::BitReader<bool>;
95#[doc = "Field `EPTYPE` reader - Endpoint Type"]
96pub type EPTYPE_R = crate::FieldReader<u8, u8>;
97#[doc = "Field `SNP` reader - Snoop Mode"]
98pub type SNP_R = crate::BitReader<bool>;
99#[doc = "Field `SNP` writer - Snoop Mode"]
100pub type SNP_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEP0CTL_SPEC, bool, O>;
101#[doc = "Field `STALL` reader - Handshake"]
102pub type STALL_R = crate::BitReader<bool>;
103#[doc = "Field `STALL` writer - Handshake"]
104pub type STALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEP0CTL_SPEC, bool, O>;
105#[doc = "Field `CNAK` writer - Clear NAK"]
106pub type CNAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEP0CTL_SPEC, bool, O>;
107#[doc = "Field `SNAK` writer - Set NAK"]
108pub type SNAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEP0CTL_SPEC, bool, O>;
109#[doc = "Field `EPDIS` reader - Endpoint Disable"]
110pub type EPDIS_R = crate::BitReader<bool>;
111#[doc = "Field `EPENA` reader - Endpoint Enable"]
112pub type EPENA_R = crate::BitReader<bool>;
113#[doc = "Field `EPENA` writer - Endpoint Enable"]
114pub type EPENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, DOEP0CTL_SPEC, bool, O>;
115impl R {
116    #[doc = "Bits 0:1 - Maximum Packet Size"]
117    #[inline(always)]
118    pub fn mps(&self) -> MPS_R {
119        MPS_R::new((self.bits & 3) as u8)
120    }
121    #[doc = "Bit 15 - USB Active Endpoint"]
122    #[inline(always)]
123    pub fn usbactep(&self) -> USBACTEP_R {
124        USBACTEP_R::new(((self.bits >> 15) & 1) != 0)
125    }
126    #[doc = "Bit 17 - NAK Status"]
127    #[inline(always)]
128    pub fn naksts(&self) -> NAKSTS_R {
129        NAKSTS_R::new(((self.bits >> 17) & 1) != 0)
130    }
131    #[doc = "Bits 18:19 - Endpoint Type"]
132    #[inline(always)]
133    pub fn eptype(&self) -> EPTYPE_R {
134        EPTYPE_R::new(((self.bits >> 18) & 3) as u8)
135    }
136    #[doc = "Bit 20 - Snoop Mode"]
137    #[inline(always)]
138    pub fn snp(&self) -> SNP_R {
139        SNP_R::new(((self.bits >> 20) & 1) != 0)
140    }
141    #[doc = "Bit 21 - Handshake"]
142    #[inline(always)]
143    pub fn stall(&self) -> STALL_R {
144        STALL_R::new(((self.bits >> 21) & 1) != 0)
145    }
146    #[doc = "Bit 30 - Endpoint Disable"]
147    #[inline(always)]
148    pub fn epdis(&self) -> EPDIS_R {
149        EPDIS_R::new(((self.bits >> 30) & 1) != 0)
150    }
151    #[doc = "Bit 31 - Endpoint Enable"]
152    #[inline(always)]
153    pub fn epena(&self) -> EPENA_R {
154        EPENA_R::new(((self.bits >> 31) & 1) != 0)
155    }
156}
157impl W {
158    #[doc = "Bit 20 - Snoop Mode"]
159    #[inline(always)]
160    #[must_use]
161    pub fn snp(&mut self) -> SNP_W<20> {
162        SNP_W::new(self)
163    }
164    #[doc = "Bit 21 - Handshake"]
165    #[inline(always)]
166    #[must_use]
167    pub fn stall(&mut self) -> STALL_W<21> {
168        STALL_W::new(self)
169    }
170    #[doc = "Bit 26 - Clear NAK"]
171    #[inline(always)]
172    #[must_use]
173    pub fn cnak(&mut self) -> CNAK_W<26> {
174        CNAK_W::new(self)
175    }
176    #[doc = "Bit 27 - Set NAK"]
177    #[inline(always)]
178    #[must_use]
179    pub fn snak(&mut self) -> SNAK_W<27> {
180        SNAK_W::new(self)
181    }
182    #[doc = "Bit 31 - Endpoint Enable"]
183    #[inline(always)]
184    #[must_use]
185    pub fn epena(&mut self) -> EPENA_W<31> {
186        EPENA_W::new(self)
187    }
188    #[doc = "Writes raw bits to the register."]
189    #[inline(always)]
190    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
191        self.0.bits(bits);
192        self
193    }
194}
195#[doc = "Device OUT Endpoint 0 Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep0ctl](index.html) module"]
196pub struct DOEP0CTL_SPEC;
197impl crate::RegisterSpec for DOEP0CTL_SPEC {
198    type Ux = u32;
199}
200#[doc = "`read()` method returns [doep0ctl::R](R) reader structure"]
201impl crate::Readable for DOEP0CTL_SPEC {
202    type Reader = R;
203}
204#[doc = "`write(|w| ..)` method takes [doep0ctl::W](W) writer structure"]
205impl crate::Writable for DOEP0CTL_SPEC {
206    type Writer = W;
207    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
208    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
209}
210#[doc = "`reset()` method sets DOEP0CTL to value 0x8000"]
211impl crate::Resettable for DOEP0CTL_SPEC {
212    const RESET_VALUE: Self::Ux = 0x8000;
213}
efm32gg_pac/efm32gg995/usb/doep0ctl.rs

efm32gg_pac/efm32gg995/usb/
doep0ctl.rs
