efm32gg_pac/efm32gg995/usb/
diep0ctl.rs1#[doc = "Register `DIEP0CTL` reader"]
2pub struct R(crate::R<DIEP0CTL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DIEP0CTL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DIEP0CTL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DIEP0CTL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DIEP0CTL` writer"]
17pub struct W(crate::W<DIEP0CTL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DIEP0CTL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DIEP0CTL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DIEP0CTL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `MPS` reader - Maximum Packet Size"]
38pub type MPS_R = crate::FieldReader<u8, MPS_A>;
39#[doc = "Maximum Packet Size\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum MPS_A {
43 #[doc = "0: 64 bytes."]
44 _64B = 0,
45 #[doc = "1: 32 bytes."]
46 _32B = 1,
47 #[doc = "2: 16 bytes."]
48 _16B = 2,
49 #[doc = "3: 8 bytes."]
50 _8B = 3,
51}
52impl From<MPS_A> for u8 {
53 #[inline(always)]
54 fn from(variant: MPS_A) -> Self {
55 variant as _
56 }
57}
58impl MPS_R {
59 #[doc = "Get enumerated values variant"]
60 #[inline(always)]
61 pub fn variant(&self) -> MPS_A {
62 match self.bits {
63 0 => MPS_A::_64B,
64 1 => MPS_A::_32B,
65 2 => MPS_A::_16B,
66 3 => MPS_A::_8B,
67 _ => unreachable!(),
68 }
69 }
70 #[doc = "Checks if the value of the field is `_64B`"]
71 #[inline(always)]
72 pub fn is_64b(&self) -> bool {
73 *self == MPS_A::_64B
74 }
75 #[doc = "Checks if the value of the field is `_32B`"]
76 #[inline(always)]
77 pub fn is_32b(&self) -> bool {
78 *self == MPS_A::_32B
79 }
80 #[doc = "Checks if the value of the field is `_16B`"]
81 #[inline(always)]
82 pub fn is_16b(&self) -> bool {
83 *self == MPS_A::_16B
84 }
85 #[doc = "Checks if the value of the field is `_8B`"]
86 #[inline(always)]
87 pub fn is_8b(&self) -> bool {
88 *self == MPS_A::_8B
89 }
90}
91#[doc = "Field `MPS` writer - Maximum Packet Size"]
92pub type MPS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DIEP0CTL_SPEC, u8, MPS_A, 2, O>;
93impl<'a, const O: u8> MPS_W<'a, O> {
94 #[doc = "64 bytes."]
95 #[inline(always)]
96 pub fn _64b(self) -> &'a mut W {
97 self.variant(MPS_A::_64B)
98 }
99 #[doc = "32 bytes."]
100 #[inline(always)]
101 pub fn _32b(self) -> &'a mut W {
102 self.variant(MPS_A::_32B)
103 }
104 #[doc = "16 bytes."]
105 #[inline(always)]
106 pub fn _16b(self) -> &'a mut W {
107 self.variant(MPS_A::_16B)
108 }
109 #[doc = "8 bytes."]
110 #[inline(always)]
111 pub fn _8b(self) -> &'a mut W {
112 self.variant(MPS_A::_8B)
113 }
114}
115#[doc = "Field `USBACTEP` reader - USB Active Endpoint"]
116pub type USBACTEP_R = crate::BitReader<bool>;
117#[doc = "Field `NAKSTS` reader - NAK Status"]
118pub type NAKSTS_R = crate::BitReader<bool>;
119#[doc = "Field `EPTYPE` reader - Endpoint Type"]
120pub type EPTYPE_R = crate::FieldReader<u8, u8>;
121#[doc = "Field `STALL` reader - Handshake"]
122pub type STALL_R = crate::BitReader<bool>;
123#[doc = "Field `STALL` writer - Handshake"]
124pub type STALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, O>;
125#[doc = "Field `TXFNUM` reader - TxFIFO Number"]
126pub type TXFNUM_R = crate::FieldReader<u8, u8>;
127#[doc = "Field `TXFNUM` writer - TxFIFO Number"]
128pub type TXFNUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DIEP0CTL_SPEC, u8, u8, 4, O>;
129#[doc = "Field `CNAK` writer - Clear NAK"]
130pub type CNAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, O>;
131#[doc = "Field `SNAK` writer - Set NAK"]
132pub type SNAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, O>;
133#[doc = "Field `EPDIS` reader - Endpoint Disable"]
134pub type EPDIS_R = crate::BitReader<bool>;
135#[doc = "Field `EPDIS` writer - Endpoint Disable"]
136pub type EPDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, O>;
137#[doc = "Field `EPENA` reader - Endpoint Enable"]
138pub type EPENA_R = crate::BitReader<bool>;
139#[doc = "Field `EPENA` writer - Endpoint Enable"]
140pub type EPENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, O>;
141impl R {
142 #[doc = "Bits 0:1 - Maximum Packet Size"]
143 #[inline(always)]
144 pub fn mps(&self) -> MPS_R {
145 MPS_R::new((self.bits & 3) as u8)
146 }
147 #[doc = "Bit 15 - USB Active Endpoint"]
148 #[inline(always)]
149 pub fn usbactep(&self) -> USBACTEP_R {
150 USBACTEP_R::new(((self.bits >> 15) & 1) != 0)
151 }
152 #[doc = "Bit 17 - NAK Status"]
153 #[inline(always)]
154 pub fn naksts(&self) -> NAKSTS_R {
155 NAKSTS_R::new(((self.bits >> 17) & 1) != 0)
156 }
157 #[doc = "Bits 18:19 - Endpoint Type"]
158 #[inline(always)]
159 pub fn eptype(&self) -> EPTYPE_R {
160 EPTYPE_R::new(((self.bits >> 18) & 3) as u8)
161 }
162 #[doc = "Bit 21 - Handshake"]
163 #[inline(always)]
164 pub fn stall(&self) -> STALL_R {
165 STALL_R::new(((self.bits >> 21) & 1) != 0)
166 }
167 #[doc = "Bits 22:25 - TxFIFO Number"]
168 #[inline(always)]
169 pub fn txfnum(&self) -> TXFNUM_R {
170 TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8)
171 }
172 #[doc = "Bit 30 - Endpoint Disable"]
173 #[inline(always)]
174 pub fn epdis(&self) -> EPDIS_R {
175 EPDIS_R::new(((self.bits >> 30) & 1) != 0)
176 }
177 #[doc = "Bit 31 - Endpoint Enable"]
178 #[inline(always)]
179 pub fn epena(&self) -> EPENA_R {
180 EPENA_R::new(((self.bits >> 31) & 1) != 0)
181 }
182}
183impl W {
184 #[doc = "Bits 0:1 - Maximum Packet Size"]
185 #[inline(always)]
186 #[must_use]
187 pub fn mps(&mut self) -> MPS_W<0> {
188 MPS_W::new(self)
189 }
190 #[doc = "Bit 21 - Handshake"]
191 #[inline(always)]
192 #[must_use]
193 pub fn stall(&mut self) -> STALL_W<21> {
194 STALL_W::new(self)
195 }
196 #[doc = "Bits 22:25 - TxFIFO Number"]
197 #[inline(always)]
198 #[must_use]
199 pub fn txfnum(&mut self) -> TXFNUM_W<22> {
200 TXFNUM_W::new(self)
201 }
202 #[doc = "Bit 26 - Clear NAK"]
203 #[inline(always)]
204 #[must_use]
205 pub fn cnak(&mut self) -> CNAK_W<26> {
206 CNAK_W::new(self)
207 }
208 #[doc = "Bit 27 - Set NAK"]
209 #[inline(always)]
210 #[must_use]
211 pub fn snak(&mut self) -> SNAK_W<27> {
212 SNAK_W::new(self)
213 }
214 #[doc = "Bit 30 - Endpoint Disable"]
215 #[inline(always)]
216 #[must_use]
217 pub fn epdis(&mut self) -> EPDIS_W<30> {
218 EPDIS_W::new(self)
219 }
220 #[doc = "Bit 31 - Endpoint Enable"]
221 #[inline(always)]
222 #[must_use]
223 pub fn epena(&mut self) -> EPENA_W<31> {
224 EPENA_W::new(self)
225 }
226 #[doc = "Writes raw bits to the register."]
227 #[inline(always)]
228 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
229 self.0.bits(bits);
230 self
231 }
232}
233#[doc = "Device IN Endpoint 0 Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0ctl](index.html) module"]
234pub struct DIEP0CTL_SPEC;
235impl crate::RegisterSpec for DIEP0CTL_SPEC {
236 type Ux = u32;
237}
238#[doc = "`read()` method returns [diep0ctl::R](R) reader structure"]
239impl crate::Readable for DIEP0CTL_SPEC {
240 type Reader = R;
241}
242#[doc = "`write(|w| ..)` method takes [diep0ctl::W](W) writer structure"]
243impl crate::Writable for DIEP0CTL_SPEC {
244 type Writer = W;
245 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
246 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
247}
248#[doc = "`reset()` method sets DIEP0CTL to value 0x8000"]
249impl crate::Resettable for DIEP0CTL_SPEC {
250 const RESET_VALUE: Self::Ux = 0x8000;
251}