efm32gg_pac/efm32gg995/usb/
dcfg.rs1#[doc = "Register `DCFG` reader"]
2pub struct R(crate::R<DCFG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DCFG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DCFG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DCFG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DCFG` writer"]
17pub struct W(crate::W<DCFG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DCFG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DCFG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DCFG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DEVSPD` reader - Device Speed"]
38pub type DEVSPD_R = crate::FieldReader<u8, DEVSPD_A>;
39#[doc = "Device Speed\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum DEVSPD_A {
43 #[doc = "2: Low speed (PHY clock is 6 MHz). If you select 6 MHz LS mode, you must do a soft reset."]
44 LS = 2,
45 #[doc = "3: Full speed (PHY clock is 48 MHz)."]
46 FS = 3,
47}
48impl From<DEVSPD_A> for u8 {
49 #[inline(always)]
50 fn from(variant: DEVSPD_A) -> Self {
51 variant as _
52 }
53}
54impl DEVSPD_R {
55 #[doc = "Get enumerated values variant"]
56 #[inline(always)]
57 pub fn variant(&self) -> Option<DEVSPD_A> {
58 match self.bits {
59 2 => Some(DEVSPD_A::LS),
60 3 => Some(DEVSPD_A::FS),
61 _ => None,
62 }
63 }
64 #[doc = "Checks if the value of the field is `LS`"]
65 #[inline(always)]
66 pub fn is_ls(&self) -> bool {
67 *self == DEVSPD_A::LS
68 }
69 #[doc = "Checks if the value of the field is `FS`"]
70 #[inline(always)]
71 pub fn is_fs(&self) -> bool {
72 *self == DEVSPD_A::FS
73 }
74}
75#[doc = "Field `DEVSPD` writer - Device Speed"]
76pub type DEVSPD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DCFG_SPEC, u8, DEVSPD_A, 2, O>;
77impl<'a, const O: u8> DEVSPD_W<'a, O> {
78 #[doc = "Low speed (PHY clock is 6 MHz). If you select 6 MHz LS mode, you must do a soft reset."]
79 #[inline(always)]
80 pub fn ls(self) -> &'a mut W {
81 self.variant(DEVSPD_A::LS)
82 }
83 #[doc = "Full speed (PHY clock is 48 MHz)."]
84 #[inline(always)]
85 pub fn fs(self) -> &'a mut W {
86 self.variant(DEVSPD_A::FS)
87 }
88}
89#[doc = "Field `NZSTSOUTHSHK` reader - Non-Zero-Length Status OUT Handshake"]
90pub type NZSTSOUTHSHK_R = crate::BitReader<bool>;
91#[doc = "Field `NZSTSOUTHSHK` writer - Non-Zero-Length Status OUT Handshake"]
92pub type NZSTSOUTHSHK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DCFG_SPEC, bool, O>;
93#[doc = "Field `ENA32KHZSUSP` reader - Enable 32 KHz Suspend mode"]
94pub type ENA32KHZSUSP_R = crate::BitReader<bool>;
95#[doc = "Field `ENA32KHZSUSP` writer - Enable 32 KHz Suspend mode"]
96pub type ENA32KHZSUSP_W<'a, const O: u8> = crate::BitWriter<'a, u32, DCFG_SPEC, bool, O>;
97#[doc = "Field `DEVADDR` reader - Device Address"]
98pub type DEVADDR_R = crate::FieldReader<u8, u8>;
99#[doc = "Field `DEVADDR` writer - Device Address"]
100pub type DEVADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DCFG_SPEC, u8, u8, 7, O>;
101#[doc = "Field `PERFRINT` reader - Periodic Frame Interval"]
102pub type PERFRINT_R = crate::FieldReader<u8, PERFRINT_A>;
103#[doc = "Periodic Frame Interval\n\nValue on reset: 0"]
104#[derive(Clone, Copy, Debug, PartialEq, Eq)]
105#[repr(u8)]
106pub enum PERFRINT_A {
107 #[doc = "0: 80% of the frame interval."]
108 _80PCNT = 0,
109 #[doc = "1: 85% of the frame interval."]
110 _85PCNT = 1,
111 #[doc = "2: 90% of the frame interval."]
112 _90PCNT = 2,
113 #[doc = "3: 95% of the frame interval."]
114 _95PCNT = 3,
115}
116impl From<PERFRINT_A> for u8 {
117 #[inline(always)]
118 fn from(variant: PERFRINT_A) -> Self {
119 variant as _
120 }
121}
122impl PERFRINT_R {
123 #[doc = "Get enumerated values variant"]
124 #[inline(always)]
125 pub fn variant(&self) -> PERFRINT_A {
126 match self.bits {
127 0 => PERFRINT_A::_80PCNT,
128 1 => PERFRINT_A::_85PCNT,
129 2 => PERFRINT_A::_90PCNT,
130 3 => PERFRINT_A::_95PCNT,
131 _ => unreachable!(),
132 }
133 }
134 #[doc = "Checks if the value of the field is `_80PCNT`"]
135 #[inline(always)]
136 pub fn is_80pcnt(&self) -> bool {
137 *self == PERFRINT_A::_80PCNT
138 }
139 #[doc = "Checks if the value of the field is `_85PCNT`"]
140 #[inline(always)]
141 pub fn is_85pcnt(&self) -> bool {
142 *self == PERFRINT_A::_85PCNT
143 }
144 #[doc = "Checks if the value of the field is `_90PCNT`"]
145 #[inline(always)]
146 pub fn is_90pcnt(&self) -> bool {
147 *self == PERFRINT_A::_90PCNT
148 }
149 #[doc = "Checks if the value of the field is `_95PCNT`"]
150 #[inline(always)]
151 pub fn is_95pcnt(&self) -> bool {
152 *self == PERFRINT_A::_95PCNT
153 }
154}
155#[doc = "Field `PERFRINT` writer - Periodic Frame Interval"]
156pub type PERFRINT_W<'a, const O: u8> =
157 crate::FieldWriterSafe<'a, u32, DCFG_SPEC, u8, PERFRINT_A, 2, O>;
158impl<'a, const O: u8> PERFRINT_W<'a, O> {
159 #[doc = "80% of the frame interval."]
160 #[inline(always)]
161 pub fn _80pcnt(self) -> &'a mut W {
162 self.variant(PERFRINT_A::_80PCNT)
163 }
164 #[doc = "85% of the frame interval."]
165 #[inline(always)]
166 pub fn _85pcnt(self) -> &'a mut W {
167 self.variant(PERFRINT_A::_85PCNT)
168 }
169 #[doc = "90% of the frame interval."]
170 #[inline(always)]
171 pub fn _90pcnt(self) -> &'a mut W {
172 self.variant(PERFRINT_A::_90PCNT)
173 }
174 #[doc = "95% of the frame interval."]
175 #[inline(always)]
176 pub fn _95pcnt(self) -> &'a mut W {
177 self.variant(PERFRINT_A::_95PCNT)
178 }
179}
180#[doc = "Field `RESVALID` reader - Resume Validation Period"]
181pub type RESVALID_R = crate::FieldReader<u8, u8>;
182#[doc = "Field `RESVALID` writer - Resume Validation Period"]
183pub type RESVALID_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DCFG_SPEC, u8, u8, 6, O>;
184impl R {
185 #[doc = "Bits 0:1 - Device Speed"]
186 #[inline(always)]
187 pub fn devspd(&self) -> DEVSPD_R {
188 DEVSPD_R::new((self.bits & 3) as u8)
189 }
190 #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"]
191 #[inline(always)]
192 pub fn nzstsouthshk(&self) -> NZSTSOUTHSHK_R {
193 NZSTSOUTHSHK_R::new(((self.bits >> 2) & 1) != 0)
194 }
195 #[doc = "Bit 3 - Enable 32 KHz Suspend mode"]
196 #[inline(always)]
197 pub fn ena32khzsusp(&self) -> ENA32KHZSUSP_R {
198 ENA32KHZSUSP_R::new(((self.bits >> 3) & 1) != 0)
199 }
200 #[doc = "Bits 4:10 - Device Address"]
201 #[inline(always)]
202 pub fn devaddr(&self) -> DEVADDR_R {
203 DEVADDR_R::new(((self.bits >> 4) & 0x7f) as u8)
204 }
205 #[doc = "Bits 11:12 - Periodic Frame Interval"]
206 #[inline(always)]
207 pub fn perfrint(&self) -> PERFRINT_R {
208 PERFRINT_R::new(((self.bits >> 11) & 3) as u8)
209 }
210 #[doc = "Bits 26:31 - Resume Validation Period"]
211 #[inline(always)]
212 pub fn resvalid(&self) -> RESVALID_R {
213 RESVALID_R::new(((self.bits >> 26) & 0x3f) as u8)
214 }
215}
216impl W {
217 #[doc = "Bits 0:1 - Device Speed"]
218 #[inline(always)]
219 #[must_use]
220 pub fn devspd(&mut self) -> DEVSPD_W<0> {
221 DEVSPD_W::new(self)
222 }
223 #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"]
224 #[inline(always)]
225 #[must_use]
226 pub fn nzstsouthshk(&mut self) -> NZSTSOUTHSHK_W<2> {
227 NZSTSOUTHSHK_W::new(self)
228 }
229 #[doc = "Bit 3 - Enable 32 KHz Suspend mode"]
230 #[inline(always)]
231 #[must_use]
232 pub fn ena32khzsusp(&mut self) -> ENA32KHZSUSP_W<3> {
233 ENA32KHZSUSP_W::new(self)
234 }
235 #[doc = "Bits 4:10 - Device Address"]
236 #[inline(always)]
237 #[must_use]
238 pub fn devaddr(&mut self) -> DEVADDR_W<4> {
239 DEVADDR_W::new(self)
240 }
241 #[doc = "Bits 11:12 - Periodic Frame Interval"]
242 #[inline(always)]
243 #[must_use]
244 pub fn perfrint(&mut self) -> PERFRINT_W<11> {
245 PERFRINT_W::new(self)
246 }
247 #[doc = "Bits 26:31 - Resume Validation Period"]
248 #[inline(always)]
249 #[must_use]
250 pub fn resvalid(&mut self) -> RESVALID_W<26> {
251 RESVALID_W::new(self)
252 }
253 #[doc = "Writes raw bits to the register."]
254 #[inline(always)]
255 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
256 self.0.bits(bits);
257 self
258 }
259}
260#[doc = "Device Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcfg](index.html) module"]
261pub struct DCFG_SPEC;
262impl crate::RegisterSpec for DCFG_SPEC {
263 type Ux = u32;
264}
265#[doc = "`read()` method returns [dcfg::R](R) reader structure"]
266impl crate::Readable for DCFG_SPEC {
267 type Reader = R;
268}
269#[doc = "`write(|w| ..)` method takes [dcfg::W](W) writer structure"]
270impl crate::Writable for DCFG_SPEC {
271 type Writer = W;
272 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
273 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
274}
275#[doc = "`reset()` method sets DCFG to value 0x0820_0000"]
276impl crate::Resettable for DCFG_SPEC {
277 const RESET_VALUE: Self::Ux = 0x0820_0000;
278}