efm32gg_pac/efm32gg995/leuart1/
route.rs1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ROUTE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ROUTE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RXPEN` reader - RX Pin Enable"]
38pub type RXPEN_R = crate::BitReader<bool>;
39#[doc = "Field `RXPEN` writer - RX Pin Enable"]
40pub type RXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
41#[doc = "Field `TXPEN` reader - TX Pin Enable"]
42pub type TXPEN_R = crate::BitReader<bool>;
43#[doc = "Field `TXPEN` writer - TX Pin Enable"]
44pub type TXPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
45#[doc = "Field `LOCATION` reader - I/O Location"]
46pub type LOCATION_R = crate::FieldReader<u8, LOCATION_A>;
47#[doc = "I/O Location\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum LOCATION_A {
51 #[doc = "0: Location 0"]
52 LOC0 = 0,
53 #[doc = "1: Location 1"]
54 LOC1 = 1,
55 #[doc = "2: Location 2"]
56 LOC2 = 2,
57 #[doc = "3: Location 3"]
58 LOC3 = 3,
59 #[doc = "4: Location 4"]
60 LOC4 = 4,
61}
62impl From<LOCATION_A> for u8 {
63 #[inline(always)]
64 fn from(variant: LOCATION_A) -> Self {
65 variant as _
66 }
67}
68impl LOCATION_R {
69 #[doc = "Get enumerated values variant"]
70 #[inline(always)]
71 pub fn variant(&self) -> Option<LOCATION_A> {
72 match self.bits {
73 0 => Some(LOCATION_A::LOC0),
74 1 => Some(LOCATION_A::LOC1),
75 2 => Some(LOCATION_A::LOC2),
76 3 => Some(LOCATION_A::LOC3),
77 4 => Some(LOCATION_A::LOC4),
78 _ => None,
79 }
80 }
81 #[doc = "Checks if the value of the field is `LOC0`"]
82 #[inline(always)]
83 pub fn is_loc0(&self) -> bool {
84 *self == LOCATION_A::LOC0
85 }
86 #[doc = "Checks if the value of the field is `LOC1`"]
87 #[inline(always)]
88 pub fn is_loc1(&self) -> bool {
89 *self == LOCATION_A::LOC1
90 }
91 #[doc = "Checks if the value of the field is `LOC2`"]
92 #[inline(always)]
93 pub fn is_loc2(&self) -> bool {
94 *self == LOCATION_A::LOC2
95 }
96 #[doc = "Checks if the value of the field is `LOC3`"]
97 #[inline(always)]
98 pub fn is_loc3(&self) -> bool {
99 *self == LOCATION_A::LOC3
100 }
101 #[doc = "Checks if the value of the field is `LOC4`"]
102 #[inline(always)]
103 pub fn is_loc4(&self) -> bool {
104 *self == LOCATION_A::LOC4
105 }
106}
107#[doc = "Field `LOCATION` writer - I/O Location"]
108pub type LOCATION_W<'a, const O: u8> =
109 crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, LOCATION_A, 3, O>;
110impl<'a, const O: u8> LOCATION_W<'a, O> {
111 #[doc = "Location 0"]
112 #[inline(always)]
113 pub fn loc0(self) -> &'a mut W {
114 self.variant(LOCATION_A::LOC0)
115 }
116 #[doc = "Location 1"]
117 #[inline(always)]
118 pub fn loc1(self) -> &'a mut W {
119 self.variant(LOCATION_A::LOC1)
120 }
121 #[doc = "Location 2"]
122 #[inline(always)]
123 pub fn loc2(self) -> &'a mut W {
124 self.variant(LOCATION_A::LOC2)
125 }
126 #[doc = "Location 3"]
127 #[inline(always)]
128 pub fn loc3(self) -> &'a mut W {
129 self.variant(LOCATION_A::LOC3)
130 }
131 #[doc = "Location 4"]
132 #[inline(always)]
133 pub fn loc4(self) -> &'a mut W {
134 self.variant(LOCATION_A::LOC4)
135 }
136}
137impl R {
138 #[doc = "Bit 0 - RX Pin Enable"]
139 #[inline(always)]
140 pub fn rxpen(&self) -> RXPEN_R {
141 RXPEN_R::new((self.bits & 1) != 0)
142 }
143 #[doc = "Bit 1 - TX Pin Enable"]
144 #[inline(always)]
145 pub fn txpen(&self) -> TXPEN_R {
146 TXPEN_R::new(((self.bits >> 1) & 1) != 0)
147 }
148 #[doc = "Bits 8:10 - I/O Location"]
149 #[inline(always)]
150 pub fn location(&self) -> LOCATION_R {
151 LOCATION_R::new(((self.bits >> 8) & 7) as u8)
152 }
153}
154impl W {
155 #[doc = "Bit 0 - RX Pin Enable"]
156 #[inline(always)]
157 #[must_use]
158 pub fn rxpen(&mut self) -> RXPEN_W<0> {
159 RXPEN_W::new(self)
160 }
161 #[doc = "Bit 1 - TX Pin Enable"]
162 #[inline(always)]
163 #[must_use]
164 pub fn txpen(&mut self) -> TXPEN_W<1> {
165 TXPEN_W::new(self)
166 }
167 #[doc = "Bits 8:10 - I/O Location"]
168 #[inline(always)]
169 #[must_use]
170 pub fn location(&mut self) -> LOCATION_W<8> {
171 LOCATION_W::new(self)
172 }
173 #[doc = "Writes raw bits to the register."]
174 #[inline(always)]
175 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
176 self.0.bits(bits);
177 self
178 }
179}
180#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
181pub struct ROUTE_SPEC;
182impl crate::RegisterSpec for ROUTE_SPEC {
183 type Ux = u32;
184}
185#[doc = "`read()` method returns [route::R](R) reader structure"]
186impl crate::Readable for ROUTE_SPEC {
187 type Reader = R;
188}
189#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
190impl crate::Writable for ROUTE_SPEC {
191 type Writer = W;
192 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
193 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
194}
195#[doc = "`reset()` method sets ROUTE to value 0"]
196impl crate::Resettable for ROUTE_SPEC {
197 const RESET_VALUE: Self::Ux = 0;
198}