efm32gg_pac/efm32gg995/gpio/
route.rs

1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SWCLKPEN` reader - Serial Wire Clock Pin Enable"]
38pub type SWCLKPEN_R = crate::BitReader<bool>;
39#[doc = "Field `SWCLKPEN` writer - Serial Wire Clock Pin Enable"]
40pub type SWCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
41#[doc = "Field `SWDIOPEN` reader - Serial Wire Data Pin Enable"]
42pub type SWDIOPEN_R = crate::BitReader<bool>;
43#[doc = "Field `SWDIOPEN` writer - Serial Wire Data Pin Enable"]
44pub type SWDIOPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
45#[doc = "Field `SWOPEN` reader - Serial Wire Viewer Output Pin Enable"]
46pub type SWOPEN_R = crate::BitReader<bool>;
47#[doc = "Field `SWOPEN` writer - Serial Wire Viewer Output Pin Enable"]
48pub type SWOPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
49#[doc = "Field `SWLOCATION` reader - I/O Location"]
50pub type SWLOCATION_R = crate::FieldReader<u8, SWLOCATION_A>;
51#[doc = "I/O Location\n\nValue on reset: 0"]
52#[derive(Clone, Copy, Debug, PartialEq, Eq)]
53#[repr(u8)]
54pub enum SWLOCATION_A {
55    #[doc = "0: Location 0"]
56    LOC0 = 0,
57    #[doc = "1: Location 1"]
58    LOC1 = 1,
59    #[doc = "2: Location 2"]
60    LOC2 = 2,
61    #[doc = "3: Location 3"]
62    LOC3 = 3,
63}
64impl From<SWLOCATION_A> for u8 {
65    #[inline(always)]
66    fn from(variant: SWLOCATION_A) -> Self {
67        variant as _
68    }
69}
70impl SWLOCATION_R {
71    #[doc = "Get enumerated values variant"]
72    #[inline(always)]
73    pub fn variant(&self) -> SWLOCATION_A {
74        match self.bits {
75            0 => SWLOCATION_A::LOC0,
76            1 => SWLOCATION_A::LOC1,
77            2 => SWLOCATION_A::LOC2,
78            3 => SWLOCATION_A::LOC3,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `LOC0`"]
83    #[inline(always)]
84    pub fn is_loc0(&self) -> bool {
85        *self == SWLOCATION_A::LOC0
86    }
87    #[doc = "Checks if the value of the field is `LOC1`"]
88    #[inline(always)]
89    pub fn is_loc1(&self) -> bool {
90        *self == SWLOCATION_A::LOC1
91    }
92    #[doc = "Checks if the value of the field is `LOC2`"]
93    #[inline(always)]
94    pub fn is_loc2(&self) -> bool {
95        *self == SWLOCATION_A::LOC2
96    }
97    #[doc = "Checks if the value of the field is `LOC3`"]
98    #[inline(always)]
99    pub fn is_loc3(&self) -> bool {
100        *self == SWLOCATION_A::LOC3
101    }
102}
103#[doc = "Field `SWLOCATION` writer - I/O Location"]
104pub type SWLOCATION_W<'a, const O: u8> =
105    crate::FieldWriterSafe<'a, u32, ROUTE_SPEC, u8, SWLOCATION_A, 2, O>;
106impl<'a, const O: u8> SWLOCATION_W<'a, O> {
107    #[doc = "Location 0"]
108    #[inline(always)]
109    pub fn loc0(self) -> &'a mut W {
110        self.variant(SWLOCATION_A::LOC0)
111    }
112    #[doc = "Location 1"]
113    #[inline(always)]
114    pub fn loc1(self) -> &'a mut W {
115        self.variant(SWLOCATION_A::LOC1)
116    }
117    #[doc = "Location 2"]
118    #[inline(always)]
119    pub fn loc2(self) -> &'a mut W {
120        self.variant(SWLOCATION_A::LOC2)
121    }
122    #[doc = "Location 3"]
123    #[inline(always)]
124    pub fn loc3(self) -> &'a mut W {
125        self.variant(SWLOCATION_A::LOC3)
126    }
127}
128#[doc = "Field `TCLKPEN` reader - ETM Trace Clock Pin Enable"]
129pub type TCLKPEN_R = crate::BitReader<bool>;
130#[doc = "Field `TCLKPEN` writer - ETM Trace Clock Pin Enable"]
131pub type TCLKPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
132#[doc = "Field `TD0PEN` reader - ETM Trace Data Pin Enable"]
133pub type TD0PEN_R = crate::BitReader<bool>;
134#[doc = "Field `TD0PEN` writer - ETM Trace Data Pin Enable"]
135pub type TD0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
136#[doc = "Field `TD1PEN` reader - ETM Trace Data Pin Enable"]
137pub type TD1PEN_R = crate::BitReader<bool>;
138#[doc = "Field `TD1PEN` writer - ETM Trace Data Pin Enable"]
139pub type TD1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
140#[doc = "Field `TD2PEN` reader - ETM Trace Data Pin Enable"]
141pub type TD2PEN_R = crate::BitReader<bool>;
142#[doc = "Field `TD2PEN` writer - ETM Trace Data Pin Enable"]
143pub type TD2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
144#[doc = "Field `TD3PEN` reader - ETM Trace Data Pin Enable"]
145pub type TD3PEN_R = crate::BitReader<bool>;
146#[doc = "Field `TD3PEN` writer - ETM Trace Data Pin Enable"]
147pub type TD3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
148#[doc = "Field `ETMLOCATION` reader - I/O Location"]
149pub type ETMLOCATION_R = crate::FieldReader<u8, ETMLOCATION_A>;
150#[doc = "I/O Location\n\nValue on reset: 0"]
151#[derive(Clone, Copy, Debug, PartialEq, Eq)]
152#[repr(u8)]
153pub enum ETMLOCATION_A {
154    #[doc = "0: Location 0"]
155    LOC0 = 0,
156    #[doc = "1: Location 1"]
157    LOC1 = 1,
158    #[doc = "2: Location 2"]
159    LOC2 = 2,
160    #[doc = "3: Location 3"]
161    LOC3 = 3,
162}
163impl From<ETMLOCATION_A> for u8 {
164    #[inline(always)]
165    fn from(variant: ETMLOCATION_A) -> Self {
166        variant as _
167    }
168}
169impl ETMLOCATION_R {
170    #[doc = "Get enumerated values variant"]
171    #[inline(always)]
172    pub fn variant(&self) -> ETMLOCATION_A {
173        match self.bits {
174            0 => ETMLOCATION_A::LOC0,
175            1 => ETMLOCATION_A::LOC1,
176            2 => ETMLOCATION_A::LOC2,
177            3 => ETMLOCATION_A::LOC3,
178            _ => unreachable!(),
179        }
180    }
181    #[doc = "Checks if the value of the field is `LOC0`"]
182    #[inline(always)]
183    pub fn is_loc0(&self) -> bool {
184        *self == ETMLOCATION_A::LOC0
185    }
186    #[doc = "Checks if the value of the field is `LOC1`"]
187    #[inline(always)]
188    pub fn is_loc1(&self) -> bool {
189        *self == ETMLOCATION_A::LOC1
190    }
191    #[doc = "Checks if the value of the field is `LOC2`"]
192    #[inline(always)]
193    pub fn is_loc2(&self) -> bool {
194        *self == ETMLOCATION_A::LOC2
195    }
196    #[doc = "Checks if the value of the field is `LOC3`"]
197    #[inline(always)]
198    pub fn is_loc3(&self) -> bool {
199        *self == ETMLOCATION_A::LOC3
200    }
201}
202#[doc = "Field `ETMLOCATION` writer - I/O Location"]
203pub type ETMLOCATION_W<'a, const O: u8> =
204    crate::FieldWriterSafe<'a, u32, ROUTE_SPEC, u8, ETMLOCATION_A, 2, O>;
205impl<'a, const O: u8> ETMLOCATION_W<'a, O> {
206    #[doc = "Location 0"]
207    #[inline(always)]
208    pub fn loc0(self) -> &'a mut W {
209        self.variant(ETMLOCATION_A::LOC0)
210    }
211    #[doc = "Location 1"]
212    #[inline(always)]
213    pub fn loc1(self) -> &'a mut W {
214        self.variant(ETMLOCATION_A::LOC1)
215    }
216    #[doc = "Location 2"]
217    #[inline(always)]
218    pub fn loc2(self) -> &'a mut W {
219        self.variant(ETMLOCATION_A::LOC2)
220    }
221    #[doc = "Location 3"]
222    #[inline(always)]
223    pub fn loc3(self) -> &'a mut W {
224        self.variant(ETMLOCATION_A::LOC3)
225    }
226}
227impl R {
228    #[doc = "Bit 0 - Serial Wire Clock Pin Enable"]
229    #[inline(always)]
230    pub fn swclkpen(&self) -> SWCLKPEN_R {
231        SWCLKPEN_R::new((self.bits & 1) != 0)
232    }
233    #[doc = "Bit 1 - Serial Wire Data Pin Enable"]
234    #[inline(always)]
235    pub fn swdiopen(&self) -> SWDIOPEN_R {
236        SWDIOPEN_R::new(((self.bits >> 1) & 1) != 0)
237    }
238    #[doc = "Bit 2 - Serial Wire Viewer Output Pin Enable"]
239    #[inline(always)]
240    pub fn swopen(&self) -> SWOPEN_R {
241        SWOPEN_R::new(((self.bits >> 2) & 1) != 0)
242    }
243    #[doc = "Bits 8:9 - I/O Location"]
244    #[inline(always)]
245    pub fn swlocation(&self) -> SWLOCATION_R {
246        SWLOCATION_R::new(((self.bits >> 8) & 3) as u8)
247    }
248    #[doc = "Bit 12 - ETM Trace Clock Pin Enable"]
249    #[inline(always)]
250    pub fn tclkpen(&self) -> TCLKPEN_R {
251        TCLKPEN_R::new(((self.bits >> 12) & 1) != 0)
252    }
253    #[doc = "Bit 13 - ETM Trace Data Pin Enable"]
254    #[inline(always)]
255    pub fn td0pen(&self) -> TD0PEN_R {
256        TD0PEN_R::new(((self.bits >> 13) & 1) != 0)
257    }
258    #[doc = "Bit 14 - ETM Trace Data Pin Enable"]
259    #[inline(always)]
260    pub fn td1pen(&self) -> TD1PEN_R {
261        TD1PEN_R::new(((self.bits >> 14) & 1) != 0)
262    }
263    #[doc = "Bit 15 - ETM Trace Data Pin Enable"]
264    #[inline(always)]
265    pub fn td2pen(&self) -> TD2PEN_R {
266        TD2PEN_R::new(((self.bits >> 15) & 1) != 0)
267    }
268    #[doc = "Bit 16 - ETM Trace Data Pin Enable"]
269    #[inline(always)]
270    pub fn td3pen(&self) -> TD3PEN_R {
271        TD3PEN_R::new(((self.bits >> 16) & 1) != 0)
272    }
273    #[doc = "Bits 24:25 - I/O Location"]
274    #[inline(always)]
275    pub fn etmlocation(&self) -> ETMLOCATION_R {
276        ETMLOCATION_R::new(((self.bits >> 24) & 3) as u8)
277    }
278}
279impl W {
280    #[doc = "Bit 0 - Serial Wire Clock Pin Enable"]
281    #[inline(always)]
282    #[must_use]
283    pub fn swclkpen(&mut self) -> SWCLKPEN_W<0> {
284        SWCLKPEN_W::new(self)
285    }
286    #[doc = "Bit 1 - Serial Wire Data Pin Enable"]
287    #[inline(always)]
288    #[must_use]
289    pub fn swdiopen(&mut self) -> SWDIOPEN_W<1> {
290        SWDIOPEN_W::new(self)
291    }
292    #[doc = "Bit 2 - Serial Wire Viewer Output Pin Enable"]
293    #[inline(always)]
294    #[must_use]
295    pub fn swopen(&mut self) -> SWOPEN_W<2> {
296        SWOPEN_W::new(self)
297    }
298    #[doc = "Bits 8:9 - I/O Location"]
299    #[inline(always)]
300    #[must_use]
301    pub fn swlocation(&mut self) -> SWLOCATION_W<8> {
302        SWLOCATION_W::new(self)
303    }
304    #[doc = "Bit 12 - ETM Trace Clock Pin Enable"]
305    #[inline(always)]
306    #[must_use]
307    pub fn tclkpen(&mut self) -> TCLKPEN_W<12> {
308        TCLKPEN_W::new(self)
309    }
310    #[doc = "Bit 13 - ETM Trace Data Pin Enable"]
311    #[inline(always)]
312    #[must_use]
313    pub fn td0pen(&mut self) -> TD0PEN_W<13> {
314        TD0PEN_W::new(self)
315    }
316    #[doc = "Bit 14 - ETM Trace Data Pin Enable"]
317    #[inline(always)]
318    #[must_use]
319    pub fn td1pen(&mut self) -> TD1PEN_W<14> {
320        TD1PEN_W::new(self)
321    }
322    #[doc = "Bit 15 - ETM Trace Data Pin Enable"]
323    #[inline(always)]
324    #[must_use]
325    pub fn td2pen(&mut self) -> TD2PEN_W<15> {
326        TD2PEN_W::new(self)
327    }
328    #[doc = "Bit 16 - ETM Trace Data Pin Enable"]
329    #[inline(always)]
330    #[must_use]
331    pub fn td3pen(&mut self) -> TD3PEN_W<16> {
332        TD3PEN_W::new(self)
333    }
334    #[doc = "Bits 24:25 - I/O Location"]
335    #[inline(always)]
336    #[must_use]
337    pub fn etmlocation(&mut self) -> ETMLOCATION_W<24> {
338        ETMLOCATION_W::new(self)
339    }
340    #[doc = "Writes raw bits to the register."]
341    #[inline(always)]
342    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
343        self.0.bits(bits);
344        self
345    }
346}
347#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
348pub struct ROUTE_SPEC;
349impl crate::RegisterSpec for ROUTE_SPEC {
350    type Ux = u32;
351}
352#[doc = "`read()` method returns [route::R](R) reader structure"]
353impl crate::Readable for ROUTE_SPEC {
354    type Reader = R;
355}
356#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
357impl crate::Writable for ROUTE_SPEC {
358    type Writer = W;
359    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
360    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
361}
362#[doc = "`reset()` method sets ROUTE to value 0x03"]
363impl crate::Resettable for ROUTE_SPEC {
364    const RESET_VALUE: Self::Ux = 0x03;
365}
efm32gg_pac/efm32gg995/gpio/route.rs

efm32gg_pac/efm32gg995/gpio/
route.rs
