efm32gg_pac/efm32gg995/etm/
etmtecr1.rs

1#[doc = "Register `ETMTECR1` reader"]
2pub struct R(crate::R<ETMTECR1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ETMTECR1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ETMTECR1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ETMTECR1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ETMTECR1` writer"]
17pub struct W(crate::W<ETMTECR1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ETMTECR1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ETMTECR1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ETMTECR1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADRCMP` reader - Address Comparator"]
38pub type ADRCMP_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `ADRCMP` writer - Address Comparator"]
40pub type ADRCMP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ETMTECR1_SPEC, u8, u8, 8, O>;
41#[doc = "Field `MEMMAP` reader - Memmap"]
42pub type MEMMAP_R = crate::FieldReader<u16, u16>;
43#[doc = "Field `MEMMAP` writer - Memmap"]
44pub type MEMMAP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ETMTECR1_SPEC, u16, u16, 16, O>;
45#[doc = "Field `INCEXCTL` reader - Trace Include/Exclude Flag"]
46pub type INCEXCTL_R = crate::BitReader<bool>;
47#[doc = "Field `INCEXCTL` writer - Trace Include/Exclude Flag"]
48pub type INCEXCTL_W<'a, const O: u8> = crate::BitWriter<'a, u32, ETMTECR1_SPEC, bool, O>;
49#[doc = "Field `TCE` reader - Trace Control Enable"]
50pub type TCE_R = crate::BitReader<bool>;
51#[doc = "Field `TCE` writer - Trace Control Enable"]
52pub type TCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ETMTECR1_SPEC, bool, O>;
53impl R {
54    #[doc = "Bits 0:7 - Address Comparator"]
55    #[inline(always)]
56    pub fn adrcmp(&self) -> ADRCMP_R {
57        ADRCMP_R::new((self.bits & 0xff) as u8)
58    }
59    #[doc = "Bits 8:23 - Memmap"]
60    #[inline(always)]
61    pub fn memmap(&self) -> MEMMAP_R {
62        MEMMAP_R::new(((self.bits >> 8) & 0xffff) as u16)
63    }
64    #[doc = "Bit 24 - Trace Include/Exclude Flag"]
65    #[inline(always)]
66    pub fn incexctl(&self) -> INCEXCTL_R {
67        INCEXCTL_R::new(((self.bits >> 24) & 1) != 0)
68    }
69    #[doc = "Bit 25 - Trace Control Enable"]
70    #[inline(always)]
71    pub fn tce(&self) -> TCE_R {
72        TCE_R::new(((self.bits >> 25) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bits 0:7 - Address Comparator"]
77    #[inline(always)]
78    #[must_use]
79    pub fn adrcmp(&mut self) -> ADRCMP_W<0> {
80        ADRCMP_W::new(self)
81    }
82    #[doc = "Bits 8:23 - Memmap"]
83    #[inline(always)]
84    #[must_use]
85    pub fn memmap(&mut self) -> MEMMAP_W<8> {
86        MEMMAP_W::new(self)
87    }
88    #[doc = "Bit 24 - Trace Include/Exclude Flag"]
89    #[inline(always)]
90    #[must_use]
91    pub fn incexctl(&mut self) -> INCEXCTL_W<24> {
92        INCEXCTL_W::new(self)
93    }
94    #[doc = "Bit 25 - Trace Control Enable"]
95    #[inline(always)]
96    #[must_use]
97    pub fn tce(&mut self) -> TCE_W<25> {
98        TCE_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "ETM Trace control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [etmtecr1](index.html) module"]
108pub struct ETMTECR1_SPEC;
109impl crate::RegisterSpec for ETMTECR1_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [etmtecr1::R](R) reader structure"]
113impl crate::Readable for ETMTECR1_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [etmtecr1::W](W) writer structure"]
117impl crate::Writable for ETMTECR1_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets ETMTECR1 to value 0"]
123impl crate::Resettable for ETMTECR1_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
efm32gg_pac/efm32gg995/etm/etmtecr1.rs

efm32gg_pac/efm32gg995/etm/
etmtecr1.rs
