efm32gg_pac/efm32gg995/ebi/
tfttiming.rs1#[doc = "Register `TFTTIMING` reader"]
2pub struct R(crate::R<TFTTIMING_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TFTTIMING_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TFTTIMING_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TFTTIMING_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TFTTIMING` writer"]
17pub struct W(crate::W<TFTTIMING_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TFTTIMING_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TFTTIMING_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TFTTIMING_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DCLKPERIOD` reader - TFT Direct Drive Transaction (EBI_DCLK) Period"]
38pub type DCLKPERIOD_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `DCLKPERIOD` writer - TFT Direct Drive Transaction (EBI_DCLK) Period"]
40pub type DCLKPERIOD_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, TFTTIMING_SPEC, u16, u16, 11, O>;
42#[doc = "Field `TFTSTART` reader - TFT Direct Drive Transaction Start"]
43pub type TFTSTART_R = crate::FieldReader<u16, u16>;
44#[doc = "Field `TFTSTART` writer - TFT Direct Drive Transaction Start"]
45pub type TFTSTART_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TFTTIMING_SPEC, u16, u16, 11, O>;
46#[doc = "Field `TFTSETUP` reader - TFT Setup Time"]
47pub type TFTSETUP_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `TFTSETUP` writer - TFT Setup Time"]
49pub type TFTSETUP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TFTTIMING_SPEC, u8, u8, 2, O>;
50#[doc = "Field `TFTHOLD` reader - TFT Hold Time"]
51pub type TFTHOLD_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `TFTHOLD` writer - TFT Hold Time"]
53pub type TFTHOLD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TFTTIMING_SPEC, u8, u8, 2, O>;
54impl R {
55 #[doc = "Bits 0:10 - TFT Direct Drive Transaction (EBI_DCLK) Period"]
56 #[inline(always)]
57 pub fn dclkperiod(&self) -> DCLKPERIOD_R {
58 DCLKPERIOD_R::new((self.bits & 0x07ff) as u16)
59 }
60 #[doc = "Bits 12:22 - TFT Direct Drive Transaction Start"]
61 #[inline(always)]
62 pub fn tftstart(&self) -> TFTSTART_R {
63 TFTSTART_R::new(((self.bits >> 12) & 0x07ff) as u16)
64 }
65 #[doc = "Bits 24:25 - TFT Setup Time"]
66 #[inline(always)]
67 pub fn tftsetup(&self) -> TFTSETUP_R {
68 TFTSETUP_R::new(((self.bits >> 24) & 3) as u8)
69 }
70 #[doc = "Bits 28:29 - TFT Hold Time"]
71 #[inline(always)]
72 pub fn tfthold(&self) -> TFTHOLD_R {
73 TFTHOLD_R::new(((self.bits >> 28) & 3) as u8)
74 }
75}
76impl W {
77 #[doc = "Bits 0:10 - TFT Direct Drive Transaction (EBI_DCLK) Period"]
78 #[inline(always)]
79 #[must_use]
80 pub fn dclkperiod(&mut self) -> DCLKPERIOD_W<0> {
81 DCLKPERIOD_W::new(self)
82 }
83 #[doc = "Bits 12:22 - TFT Direct Drive Transaction Start"]
84 #[inline(always)]
85 #[must_use]
86 pub fn tftstart(&mut self) -> TFTSTART_W<12> {
87 TFTSTART_W::new(self)
88 }
89 #[doc = "Bits 24:25 - TFT Setup Time"]
90 #[inline(always)]
91 #[must_use]
92 pub fn tftsetup(&mut self) -> TFTSETUP_W<24> {
93 TFTSETUP_W::new(self)
94 }
95 #[doc = "Bits 28:29 - TFT Hold Time"]
96 #[inline(always)]
97 #[must_use]
98 pub fn tfthold(&mut self) -> TFTHOLD_W<28> {
99 TFTHOLD_W::new(self)
100 }
101 #[doc = "Writes raw bits to the register."]
102 #[inline(always)]
103 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
104 self.0.bits(bits);
105 self
106 }
107}
108#[doc = "TFT Timing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tfttiming](index.html) module"]
109pub struct TFTTIMING_SPEC;
110impl crate::RegisterSpec for TFTTIMING_SPEC {
111 type Ux = u32;
112}
113#[doc = "`read()` method returns [tfttiming::R](R) reader structure"]
114impl crate::Readable for TFTTIMING_SPEC {
115 type Reader = R;
116}
117#[doc = "`write(|w| ..)` method takes [tfttiming::W](W) writer structure"]
118impl crate::Writable for TFTTIMING_SPEC {
119 type Writer = W;
120 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
122}
123#[doc = "`reset()` method sets TFTTIMING to value 0"]
124impl crate::Resettable for TFTTIMING_SPEC {
125 const RESET_VALUE: Self::Ux = 0;
126}