efm32gg_pac/efm32gg995/ebi/
tftctrl.rs

1#[doc = "Register `TFTCTRL` reader"]
2pub struct R(crate::R<TFTCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TFTCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TFTCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TFTCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TFTCTRL` writer"]
17pub struct W(crate::W<TFTCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TFTCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TFTCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TFTCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DD` reader - TFT Direct Drive Mode"]
38pub type DD_R = crate::FieldReader<u8, DD_A>;
39#[doc = "TFT Direct Drive Mode\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum DD_A {
43    #[doc = "0: Direct Drive is disabled."]
44    DISABLED = 0,
45    #[doc = "1: Direct Drive from internal memory enabled and started."]
46    INTERNAL = 1,
47    #[doc = "2: Direct Drive from external memory enabled and started."]
48    EXTERNAL = 2,
49}
50impl From<DD_A> for u8 {
51    #[inline(always)]
52    fn from(variant: DD_A) -> Self {
53        variant as _
54    }
55}
56impl DD_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<DD_A> {
60        match self.bits {
61            0 => Some(DD_A::DISABLED),
62            1 => Some(DD_A::INTERNAL),
63            2 => Some(DD_A::EXTERNAL),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `DISABLED`"]
68    #[inline(always)]
69    pub fn is_disabled(&self) -> bool {
70        *self == DD_A::DISABLED
71    }
72    #[doc = "Checks if the value of the field is `INTERNAL`"]
73    #[inline(always)]
74    pub fn is_internal(&self) -> bool {
75        *self == DD_A::INTERNAL
76    }
77    #[doc = "Checks if the value of the field is `EXTERNAL`"]
78    #[inline(always)]
79    pub fn is_external(&self) -> bool {
80        *self == DD_A::EXTERNAL
81    }
82}
83#[doc = "Field `DD` writer - TFT Direct Drive Mode"]
84pub type DD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TFTCTRL_SPEC, u8, DD_A, 2, O>;
85impl<'a, const O: u8> DD_W<'a, O> {
86    #[doc = "Direct Drive is disabled."]
87    #[inline(always)]
88    pub fn disabled(self) -> &'a mut W {
89        self.variant(DD_A::DISABLED)
90    }
91    #[doc = "Direct Drive from internal memory enabled and started."]
92    #[inline(always)]
93    pub fn internal(self) -> &'a mut W {
94        self.variant(DD_A::INTERNAL)
95    }
96    #[doc = "Direct Drive from external memory enabled and started."]
97    #[inline(always)]
98    pub fn external(self) -> &'a mut W {
99        self.variant(DD_A::EXTERNAL)
100    }
101}
102#[doc = "Field `MASKBLEND` reader - TFT Mask and Blend Mode"]
103pub type MASKBLEND_R = crate::FieldReader<u8, MASKBLEND_A>;
104#[doc = "TFT Mask and Blend Mode\n\nValue on reset: 0"]
105#[derive(Clone, Copy, Debug, PartialEq, Eq)]
106#[repr(u8)]
107pub enum MASKBLEND_A {
108    #[doc = "0: Masking and Blending are disabled."]
109    DISABLED = 0,
110    #[doc = "1: Internal Masking is enabled."]
111    IMASK = 1,
112    #[doc = "2: Internal Alpha Blending is enabled."]
113    IALPHA = 2,
114    #[doc = "3: Internal Masking and Alpha Blending are enabled."]
115    IMASKIALPHA = 3,
116    #[doc = "5: External Masking is enabled."]
117    EMASK = 5,
118    #[doc = "6: External Alpha Blending is enabled."]
119    EALPHA = 6,
120    #[doc = "7: External Masking and Alpha Blending are enabled."]
121    EMASKEALPHA = 7,
122}
123impl From<MASKBLEND_A> for u8 {
124    #[inline(always)]
125    fn from(variant: MASKBLEND_A) -> Self {
126        variant as _
127    }
128}
129impl MASKBLEND_R {
130    #[doc = "Get enumerated values variant"]
131    #[inline(always)]
132    pub fn variant(&self) -> Option<MASKBLEND_A> {
133        match self.bits {
134            0 => Some(MASKBLEND_A::DISABLED),
135            1 => Some(MASKBLEND_A::IMASK),
136            2 => Some(MASKBLEND_A::IALPHA),
137            3 => Some(MASKBLEND_A::IMASKIALPHA),
138            5 => Some(MASKBLEND_A::EMASK),
139            6 => Some(MASKBLEND_A::EALPHA),
140            7 => Some(MASKBLEND_A::EMASKEALPHA),
141            _ => None,
142        }
143    }
144    #[doc = "Checks if the value of the field is `DISABLED`"]
145    #[inline(always)]
146    pub fn is_disabled(&self) -> bool {
147        *self == MASKBLEND_A::DISABLED
148    }
149    #[doc = "Checks if the value of the field is `IMASK`"]
150    #[inline(always)]
151    pub fn is_imask(&self) -> bool {
152        *self == MASKBLEND_A::IMASK
153    }
154    #[doc = "Checks if the value of the field is `IALPHA`"]
155    #[inline(always)]
156    pub fn is_ialpha(&self) -> bool {
157        *self == MASKBLEND_A::IALPHA
158    }
159    #[doc = "Checks if the value of the field is `IMASKIALPHA`"]
160    #[inline(always)]
161    pub fn is_imaskialpha(&self) -> bool {
162        *self == MASKBLEND_A::IMASKIALPHA
163    }
164    #[doc = "Checks if the value of the field is `EMASK`"]
165    #[inline(always)]
166    pub fn is_emask(&self) -> bool {
167        *self == MASKBLEND_A::EMASK
168    }
169    #[doc = "Checks if the value of the field is `EALPHA`"]
170    #[inline(always)]
171    pub fn is_ealpha(&self) -> bool {
172        *self == MASKBLEND_A::EALPHA
173    }
174    #[doc = "Checks if the value of the field is `EMASKEALPHA`"]
175    #[inline(always)]
176    pub fn is_emaskealpha(&self) -> bool {
177        *self == MASKBLEND_A::EMASKEALPHA
178    }
179}
180#[doc = "Field `MASKBLEND` writer - TFT Mask and Blend Mode"]
181pub type MASKBLEND_W<'a, const O: u8> =
182    crate::FieldWriter<'a, u32, TFTCTRL_SPEC, u8, MASKBLEND_A, 3, O>;
183impl<'a, const O: u8> MASKBLEND_W<'a, O> {
184    #[doc = "Masking and Blending are disabled."]
185    #[inline(always)]
186    pub fn disabled(self) -> &'a mut W {
187        self.variant(MASKBLEND_A::DISABLED)
188    }
189    #[doc = "Internal Masking is enabled."]
190    #[inline(always)]
191    pub fn imask(self) -> &'a mut W {
192        self.variant(MASKBLEND_A::IMASK)
193    }
194    #[doc = "Internal Alpha Blending is enabled."]
195    #[inline(always)]
196    pub fn ialpha(self) -> &'a mut W {
197        self.variant(MASKBLEND_A::IALPHA)
198    }
199    #[doc = "Internal Masking and Alpha Blending are enabled."]
200    #[inline(always)]
201    pub fn imaskialpha(self) -> &'a mut W {
202        self.variant(MASKBLEND_A::IMASKIALPHA)
203    }
204    #[doc = "External Masking is enabled."]
205    #[inline(always)]
206    pub fn emask(self) -> &'a mut W {
207        self.variant(MASKBLEND_A::EMASK)
208    }
209    #[doc = "External Alpha Blending is enabled."]
210    #[inline(always)]
211    pub fn ealpha(self) -> &'a mut W {
212        self.variant(MASKBLEND_A::EALPHA)
213    }
214    #[doc = "External Masking and Alpha Blending are enabled."]
215    #[inline(always)]
216    pub fn emaskealpha(self) -> &'a mut W {
217        self.variant(MASKBLEND_A::EMASKEALPHA)
218    }
219}
220#[doc = "Field `SHIFTDCLKEN` reader - TFT EBI_DCLK Shift Enable"]
221pub type SHIFTDCLKEN_R = crate::BitReader<bool>;
222#[doc = "Field `SHIFTDCLKEN` writer - TFT EBI_DCLK Shift Enable"]
223pub type SHIFTDCLKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TFTCTRL_SPEC, bool, O>;
224#[doc = "Field `FBCTRIG` reader - TFT Frame Base Copy Trigger"]
225pub type FBCTRIG_R = crate::BitReader<bool>;
226#[doc = "Field `FBCTRIG` writer - TFT Frame Base Copy Trigger"]
227pub type FBCTRIG_W<'a, const O: u8> = crate::BitWriter<'a, u32, TFTCTRL_SPEC, bool, O>;
228#[doc = "Field `INTERLEAVE` reader - Interleave Mode"]
229pub type INTERLEAVE_R = crate::FieldReader<u8, INTERLEAVE_A>;
230#[doc = "Interleave Mode\n\nValue on reset: 0"]
231#[derive(Clone, Copy, Debug, PartialEq, Eq)]
232#[repr(u8)]
233pub enum INTERLEAVE_A {
234    #[doc = "0: Allow unlimited interleaved EBI accesses per EBI_DCLK period. This can cause jitter on the EBI_DCLK"]
235    UNLIMITED = 0,
236    #[doc = "1: Allow 1 interleaved EBI access per EBI_DCLK period."]
237    ONEPERDCLK = 1,
238    #[doc = "2: Only allow EBI accesses during TFT porches."]
239    PORCH = 2,
240}
241impl From<INTERLEAVE_A> for u8 {
242    #[inline(always)]
243    fn from(variant: INTERLEAVE_A) -> Self {
244        variant as _
245    }
246}
247impl INTERLEAVE_R {
248    #[doc = "Get enumerated values variant"]
249    #[inline(always)]
250    pub fn variant(&self) -> Option<INTERLEAVE_A> {
251        match self.bits {
252            0 => Some(INTERLEAVE_A::UNLIMITED),
253            1 => Some(INTERLEAVE_A::ONEPERDCLK),
254            2 => Some(INTERLEAVE_A::PORCH),
255            _ => None,
256        }
257    }
258    #[doc = "Checks if the value of the field is `UNLIMITED`"]
259    #[inline(always)]
260    pub fn is_unlimited(&self) -> bool {
261        *self == INTERLEAVE_A::UNLIMITED
262    }
263    #[doc = "Checks if the value of the field is `ONEPERDCLK`"]
264    #[inline(always)]
265    pub fn is_oneperdclk(&self) -> bool {
266        *self == INTERLEAVE_A::ONEPERDCLK
267    }
268    #[doc = "Checks if the value of the field is `PORCH`"]
269    #[inline(always)]
270    pub fn is_porch(&self) -> bool {
271        *self == INTERLEAVE_A::PORCH
272    }
273}
274#[doc = "Field `INTERLEAVE` writer - Interleave Mode"]
275pub type INTERLEAVE_W<'a, const O: u8> =
276    crate::FieldWriter<'a, u32, TFTCTRL_SPEC, u8, INTERLEAVE_A, 2, O>;
277impl<'a, const O: u8> INTERLEAVE_W<'a, O> {
278    #[doc = "Allow unlimited interleaved EBI accesses per EBI_DCLK period. This can cause jitter on the EBI_DCLK"]
279    #[inline(always)]
280    pub fn unlimited(self) -> &'a mut W {
281        self.variant(INTERLEAVE_A::UNLIMITED)
282    }
283    #[doc = "Allow 1 interleaved EBI access per EBI_DCLK period."]
284    #[inline(always)]
285    pub fn oneperdclk(self) -> &'a mut W {
286        self.variant(INTERLEAVE_A::ONEPERDCLK)
287    }
288    #[doc = "Only allow EBI accesses during TFT porches."]
289    #[inline(always)]
290    pub fn porch(self) -> &'a mut W {
291        self.variant(INTERLEAVE_A::PORCH)
292    }
293}
294#[doc = "Field `COLOR1SRC` reader - Masking/Alpha Blending Color1 Source"]
295pub type COLOR1SRC_R = crate::BitReader<bool>;
296#[doc = "Field `COLOR1SRC` writer - Masking/Alpha Blending Color1 Source"]
297pub type COLOR1SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, TFTCTRL_SPEC, bool, O>;
298#[doc = "Field `WIDTH` reader - TFT Transaction Width"]
299pub type WIDTH_R = crate::BitReader<bool>;
300#[doc = "Field `WIDTH` writer - TFT Transaction Width"]
301pub type WIDTH_W<'a, const O: u8> = crate::BitWriter<'a, u32, TFTCTRL_SPEC, bool, O>;
302#[doc = "Field `BANKSEL` reader - Graphics Bank"]
303pub type BANKSEL_R = crate::FieldReader<u8, BANKSEL_A>;
304#[doc = "Graphics Bank\n\nValue on reset: 0"]
305#[derive(Clone, Copy, Debug, PartialEq, Eq)]
306#[repr(u8)]
307pub enum BANKSEL_A {
308    #[doc = "0: Memory bank 0 is used for Direct Drive, Masking, and Alpha Blending."]
309    BANK0 = 0,
310    #[doc = "1: Memory bank 1 is used for Direct Drive, Masking, and Alpha Blending."]
311    BANK1 = 1,
312    #[doc = "2: Memory bank 2 is used for Direct Drive, Masking, and Alpha Blending."]
313    BANK2 = 2,
314    #[doc = "3: Memory bank 3 is used for Direct Drive, Masking, and Alpha Blending."]
315    BANK3 = 3,
316}
317impl From<BANKSEL_A> for u8 {
318    #[inline(always)]
319    fn from(variant: BANKSEL_A) -> Self {
320        variant as _
321    }
322}
323impl BANKSEL_R {
324    #[doc = "Get enumerated values variant"]
325    #[inline(always)]
326    pub fn variant(&self) -> BANKSEL_A {
327        match self.bits {
328            0 => BANKSEL_A::BANK0,
329            1 => BANKSEL_A::BANK1,
330            2 => BANKSEL_A::BANK2,
331            3 => BANKSEL_A::BANK3,
332            _ => unreachable!(),
333        }
334    }
335    #[doc = "Checks if the value of the field is `BANK0`"]
336    #[inline(always)]
337    pub fn is_bank0(&self) -> bool {
338        *self == BANKSEL_A::BANK0
339    }
340    #[doc = "Checks if the value of the field is `BANK1`"]
341    #[inline(always)]
342    pub fn is_bank1(&self) -> bool {
343        *self == BANKSEL_A::BANK1
344    }
345    #[doc = "Checks if the value of the field is `BANK2`"]
346    #[inline(always)]
347    pub fn is_bank2(&self) -> bool {
348        *self == BANKSEL_A::BANK2
349    }
350    #[doc = "Checks if the value of the field is `BANK3`"]
351    #[inline(always)]
352    pub fn is_bank3(&self) -> bool {
353        *self == BANKSEL_A::BANK3
354    }
355}
356#[doc = "Field `BANKSEL` writer - Graphics Bank"]
357pub type BANKSEL_W<'a, const O: u8> =
358    crate::FieldWriterSafe<'a, u32, TFTCTRL_SPEC, u8, BANKSEL_A, 2, O>;
359impl<'a, const O: u8> BANKSEL_W<'a, O> {
360    #[doc = "Memory bank 0 is used for Direct Drive, Masking, and Alpha Blending."]
361    #[inline(always)]
362    pub fn bank0(self) -> &'a mut W {
363        self.variant(BANKSEL_A::BANK0)
364    }
365    #[doc = "Memory bank 1 is used for Direct Drive, Masking, and Alpha Blending."]
366    #[inline(always)]
367    pub fn bank1(self) -> &'a mut W {
368        self.variant(BANKSEL_A::BANK1)
369    }
370    #[doc = "Memory bank 2 is used for Direct Drive, Masking, and Alpha Blending."]
371    #[inline(always)]
372    pub fn bank2(self) -> &'a mut W {
373        self.variant(BANKSEL_A::BANK2)
374    }
375    #[doc = "Memory bank 3 is used for Direct Drive, Masking, and Alpha Blending."]
376    #[inline(always)]
377    pub fn bank3(self) -> &'a mut W {
378        self.variant(BANKSEL_A::BANK3)
379    }
380}
381#[doc = "Field `RGBMODE` reader - TFT RGB Mode"]
382pub type RGBMODE_R = crate::BitReader<bool>;
383#[doc = "Field `RGBMODE` writer - TFT RGB Mode"]
384pub type RGBMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TFTCTRL_SPEC, bool, O>;
385impl R {
386    #[doc = "Bits 0:1 - TFT Direct Drive Mode"]
387    #[inline(always)]
388    pub fn dd(&self) -> DD_R {
389        DD_R::new((self.bits & 3) as u8)
390    }
391    #[doc = "Bits 2:4 - TFT Mask and Blend Mode"]
392    #[inline(always)]
393    pub fn maskblend(&self) -> MASKBLEND_R {
394        MASKBLEND_R::new(((self.bits >> 2) & 7) as u8)
395    }
396    #[doc = "Bit 8 - TFT EBI_DCLK Shift Enable"]
397    #[inline(always)]
398    pub fn shiftdclken(&self) -> SHIFTDCLKEN_R {
399        SHIFTDCLKEN_R::new(((self.bits >> 8) & 1) != 0)
400    }
401    #[doc = "Bit 9 - TFT Frame Base Copy Trigger"]
402    #[inline(always)]
403    pub fn fbctrig(&self) -> FBCTRIG_R {
404        FBCTRIG_R::new(((self.bits >> 9) & 1) != 0)
405    }
406    #[doc = "Bits 10:11 - Interleave Mode"]
407    #[inline(always)]
408    pub fn interleave(&self) -> INTERLEAVE_R {
409        INTERLEAVE_R::new(((self.bits >> 10) & 3) as u8)
410    }
411    #[doc = "Bit 12 - Masking/Alpha Blending Color1 Source"]
412    #[inline(always)]
413    pub fn color1src(&self) -> COLOR1SRC_R {
414        COLOR1SRC_R::new(((self.bits >> 12) & 1) != 0)
415    }
416    #[doc = "Bit 16 - TFT Transaction Width"]
417    #[inline(always)]
418    pub fn width(&self) -> WIDTH_R {
419        WIDTH_R::new(((self.bits >> 16) & 1) != 0)
420    }
421    #[doc = "Bits 20:21 - Graphics Bank"]
422    #[inline(always)]
423    pub fn banksel(&self) -> BANKSEL_R {
424        BANKSEL_R::new(((self.bits >> 20) & 3) as u8)
425    }
426    #[doc = "Bit 24 - TFT RGB Mode"]
427    #[inline(always)]
428    pub fn rgbmode(&self) -> RGBMODE_R {
429        RGBMODE_R::new(((self.bits >> 24) & 1) != 0)
430    }
431}
432impl W {
433    #[doc = "Bits 0:1 - TFT Direct Drive Mode"]
434    #[inline(always)]
435    #[must_use]
436    pub fn dd(&mut self) -> DD_W<0> {
437        DD_W::new(self)
438    }
439    #[doc = "Bits 2:4 - TFT Mask and Blend Mode"]
440    #[inline(always)]
441    #[must_use]
442    pub fn maskblend(&mut self) -> MASKBLEND_W<2> {
443        MASKBLEND_W::new(self)
444    }
445    #[doc = "Bit 8 - TFT EBI_DCLK Shift Enable"]
446    #[inline(always)]
447    #[must_use]
448    pub fn shiftdclken(&mut self) -> SHIFTDCLKEN_W<8> {
449        SHIFTDCLKEN_W::new(self)
450    }
451    #[doc = "Bit 9 - TFT Frame Base Copy Trigger"]
452    #[inline(always)]
453    #[must_use]
454    pub fn fbctrig(&mut self) -> FBCTRIG_W<9> {
455        FBCTRIG_W::new(self)
456    }
457    #[doc = "Bits 10:11 - Interleave Mode"]
458    #[inline(always)]
459    #[must_use]
460    pub fn interleave(&mut self) -> INTERLEAVE_W<10> {
461        INTERLEAVE_W::new(self)
462    }
463    #[doc = "Bit 12 - Masking/Alpha Blending Color1 Source"]
464    #[inline(always)]
465    #[must_use]
466    pub fn color1src(&mut self) -> COLOR1SRC_W<12> {
467        COLOR1SRC_W::new(self)
468    }
469    #[doc = "Bit 16 - TFT Transaction Width"]
470    #[inline(always)]
471    #[must_use]
472    pub fn width(&mut self) -> WIDTH_W<16> {
473        WIDTH_W::new(self)
474    }
475    #[doc = "Bits 20:21 - Graphics Bank"]
476    #[inline(always)]
477    #[must_use]
478    pub fn banksel(&mut self) -> BANKSEL_W<20> {
479        BANKSEL_W::new(self)
480    }
481    #[doc = "Bit 24 - TFT RGB Mode"]
482    #[inline(always)]
483    #[must_use]
484    pub fn rgbmode(&mut self) -> RGBMODE_W<24> {
485        RGBMODE_W::new(self)
486    }
487    #[doc = "Writes raw bits to the register."]
488    #[inline(always)]
489    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
490        self.0.bits(bits);
491        self
492    }
493}
494#[doc = "TFT Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tftctrl](index.html) module"]
495pub struct TFTCTRL_SPEC;
496impl crate::RegisterSpec for TFTCTRL_SPEC {
497    type Ux = u32;
498}
499#[doc = "`read()` method returns [tftctrl::R](R) reader structure"]
500impl crate::Readable for TFTCTRL_SPEC {
501    type Reader = R;
502}
503#[doc = "`write(|w| ..)` method takes [tftctrl::W](W) writer structure"]
504impl crate::Writable for TFTCTRL_SPEC {
505    type Writer = W;
506    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
507    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
508}
509#[doc = "`reset()` method sets TFTCTRL to value 0"]
510impl crate::Resettable for TFTCTRL_SPEC {
511    const RESET_VALUE: Self::Ux = 0;
512}
efm32gg_pac/efm32gg995/ebi/tftctrl.rs

efm32gg_pac/efm32gg995/ebi/
tftctrl.rs
