efm32gg_pac/efm32gg995/ebi/
nandctrl.rs

1#[doc = "Register `NANDCTRL` reader"]
2pub struct R(crate::R<NANDCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<NANDCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<NANDCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<NANDCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `NANDCTRL` writer"]
17pub struct W(crate::W<NANDCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<NANDCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<NANDCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<NANDCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - NAND Flash control enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - NAND Flash control enable"]
40pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, NANDCTRL_SPEC, bool, O>;
41#[doc = "Field `BANKSEL` reader - NAND Flash Bank"]
42pub type BANKSEL_R = crate::FieldReader<u8, BANKSEL_A>;
43#[doc = "NAND Flash Bank\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum BANKSEL_A {
47    #[doc = "0: Memory bank 0 is connected to a NAND Flash device."]
48    BANK0 = 0,
49    #[doc = "1: Memory bank 1 is connected to a NAND Flash device."]
50    BANK1 = 1,
51    #[doc = "2: Memory bank 2 is connected to a NAND Flash device."]
52    BANK2 = 2,
53    #[doc = "3: Memory bank 3 is connected to a NAND Flash device."]
54    BANK3 = 3,
55}
56impl From<BANKSEL_A> for u8 {
57    #[inline(always)]
58    fn from(variant: BANKSEL_A) -> Self {
59        variant as _
60    }
61}
62impl BANKSEL_R {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> BANKSEL_A {
66        match self.bits {
67            0 => BANKSEL_A::BANK0,
68            1 => BANKSEL_A::BANK1,
69            2 => BANKSEL_A::BANK2,
70            3 => BANKSEL_A::BANK3,
71            _ => unreachable!(),
72        }
73    }
74    #[doc = "Checks if the value of the field is `BANK0`"]
75    #[inline(always)]
76    pub fn is_bank0(&self) -> bool {
77        *self == BANKSEL_A::BANK0
78    }
79    #[doc = "Checks if the value of the field is `BANK1`"]
80    #[inline(always)]
81    pub fn is_bank1(&self) -> bool {
82        *self == BANKSEL_A::BANK1
83    }
84    #[doc = "Checks if the value of the field is `BANK2`"]
85    #[inline(always)]
86    pub fn is_bank2(&self) -> bool {
87        *self == BANKSEL_A::BANK2
88    }
89    #[doc = "Checks if the value of the field is `BANK3`"]
90    #[inline(always)]
91    pub fn is_bank3(&self) -> bool {
92        *self == BANKSEL_A::BANK3
93    }
94}
95#[doc = "Field `BANKSEL` writer - NAND Flash Bank"]
96pub type BANKSEL_W<'a, const O: u8> =
97    crate::FieldWriterSafe<'a, u32, NANDCTRL_SPEC, u8, BANKSEL_A, 2, O>;
98impl<'a, const O: u8> BANKSEL_W<'a, O> {
99    #[doc = "Memory bank 0 is connected to a NAND Flash device."]
100    #[inline(always)]
101    pub fn bank0(self) -> &'a mut W {
102        self.variant(BANKSEL_A::BANK0)
103    }
104    #[doc = "Memory bank 1 is connected to a NAND Flash device."]
105    #[inline(always)]
106    pub fn bank1(self) -> &'a mut W {
107        self.variant(BANKSEL_A::BANK1)
108    }
109    #[doc = "Memory bank 2 is connected to a NAND Flash device."]
110    #[inline(always)]
111    pub fn bank2(self) -> &'a mut W {
112        self.variant(BANKSEL_A::BANK2)
113    }
114    #[doc = "Memory bank 3 is connected to a NAND Flash device."]
115    #[inline(always)]
116    pub fn bank3(self) -> &'a mut W {
117        self.variant(BANKSEL_A::BANK3)
118    }
119}
120impl R {
121    #[doc = "Bit 0 - NAND Flash control enable"]
122    #[inline(always)]
123    pub fn en(&self) -> EN_R {
124        EN_R::new((self.bits & 1) != 0)
125    }
126    #[doc = "Bits 4:5 - NAND Flash Bank"]
127    #[inline(always)]
128    pub fn banksel(&self) -> BANKSEL_R {
129        BANKSEL_R::new(((self.bits >> 4) & 3) as u8)
130    }
131}
132impl W {
133    #[doc = "Bit 0 - NAND Flash control enable"]
134    #[inline(always)]
135    #[must_use]
136    pub fn en(&mut self) -> EN_W<0> {
137        EN_W::new(self)
138    }
139    #[doc = "Bits 4:5 - NAND Flash Bank"]
140    #[inline(always)]
141    #[must_use]
142    pub fn banksel(&mut self) -> BANKSEL_W<4> {
143        BANKSEL_W::new(self)
144    }
145    #[doc = "Writes raw bits to the register."]
146    #[inline(always)]
147    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
148        self.0.bits(bits);
149        self
150    }
151}
152#[doc = "NAND Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nandctrl](index.html) module"]
153pub struct NANDCTRL_SPEC;
154impl crate::RegisterSpec for NANDCTRL_SPEC {
155    type Ux = u32;
156}
157#[doc = "`read()` method returns [nandctrl::R](R) reader structure"]
158impl crate::Readable for NANDCTRL_SPEC {
159    type Reader = R;
160}
161#[doc = "`write(|w| ..)` method takes [nandctrl::W](W) writer structure"]
162impl crate::Writable for NANDCTRL_SPEC {
163    type Writer = W;
164    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
166}
167#[doc = "`reset()` method sets NANDCTRL to value 0"]
168impl crate::Resettable for NANDCTRL_SPEC {
169    const RESET_VALUE: Self::Ux = 0;
170}
efm32gg_pac/efm32gg995/ebi/nandctrl.rs

efm32gg_pac/efm32gg995/ebi/
nandctrl.rs
