efm32gg_pac/efm32gg995/ebi/
addrtiming2.rs

1#[doc = "Register `ADDRTIMING2` reader"]
2pub struct R(crate::R<ADDRTIMING2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ADDRTIMING2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ADDRTIMING2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ADDRTIMING2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ADDRTIMING2` writer"]
17pub struct W(crate::W<ADDRTIMING2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ADDRTIMING2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ADDRTIMING2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ADDRTIMING2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADDRSETUP` reader - Address Setup Time"]
38pub type ADDRSETUP_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `ADDRSETUP` writer - Address Setup Time"]
40pub type ADDRSETUP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRTIMING2_SPEC, u8, u8, 2, O>;
41#[doc = "Field `ADDRHOLD` reader - Address Hold Time"]
42pub type ADDRHOLD_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `ADDRHOLD` writer - Address Hold Time"]
44pub type ADDRHOLD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRTIMING2_SPEC, u8, u8, 2, O>;
45#[doc = "Field `HALFALE` reader - Half Cycle ALE Strobe Duration Enable"]
46pub type HALFALE_R = crate::BitReader<bool>;
47#[doc = "Field `HALFALE` writer - Half Cycle ALE Strobe Duration Enable"]
48pub type HALFALE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADDRTIMING2_SPEC, bool, O>;
49impl R {
50    #[doc = "Bits 0:1 - Address Setup Time"]
51    #[inline(always)]
52    pub fn addrsetup(&self) -> ADDRSETUP_R {
53        ADDRSETUP_R::new((self.bits & 3) as u8)
54    }
55    #[doc = "Bits 8:9 - Address Hold Time"]
56    #[inline(always)]
57    pub fn addrhold(&self) -> ADDRHOLD_R {
58        ADDRHOLD_R::new(((self.bits >> 8) & 3) as u8)
59    }
60    #[doc = "Bit 28 - Half Cycle ALE Strobe Duration Enable"]
61    #[inline(always)]
62    pub fn halfale(&self) -> HALFALE_R {
63        HALFALE_R::new(((self.bits >> 28) & 1) != 0)
64    }
65}
66impl W {
67    #[doc = "Bits 0:1 - Address Setup Time"]
68    #[inline(always)]
69    #[must_use]
70    pub fn addrsetup(&mut self) -> ADDRSETUP_W<0> {
71        ADDRSETUP_W::new(self)
72    }
73    #[doc = "Bits 8:9 - Address Hold Time"]
74    #[inline(always)]
75    #[must_use]
76    pub fn addrhold(&mut self) -> ADDRHOLD_W<8> {
77        ADDRHOLD_W::new(self)
78    }
79    #[doc = "Bit 28 - Half Cycle ALE Strobe Duration Enable"]
80    #[inline(always)]
81    #[must_use]
82    pub fn halfale(&mut self) -> HALFALE_W<28> {
83        HALFALE_W::new(self)
84    }
85    #[doc = "Writes raw bits to the register."]
86    #[inline(always)]
87    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
88        self.0.bits(bits);
89        self
90    }
91}
92#[doc = "Address Timing Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrtiming2](index.html) module"]
93pub struct ADDRTIMING2_SPEC;
94impl crate::RegisterSpec for ADDRTIMING2_SPEC {
95    type Ux = u32;
96}
97#[doc = "`read()` method returns [addrtiming2::R](R) reader structure"]
98impl crate::Readable for ADDRTIMING2_SPEC {
99    type Reader = R;
100}
101#[doc = "`write(|w| ..)` method takes [addrtiming2::W](W) writer structure"]
102impl crate::Writable for ADDRTIMING2_SPEC {
103    type Writer = W;
104    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
105    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
106}
107#[doc = "`reset()` method sets ADDRTIMING2 to value 0x0303"]
108impl crate::Resettable for ADDRTIMING2_SPEC {
109    const RESET_VALUE: Self::Ux = 0x0303;
110}
efm32gg_pac/efm32gg995/ebi/addrtiming2.rs

efm32gg_pac/efm32gg995/ebi/
addrtiming2.rs
