efm32gg_pac/efm32gg995/dac0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DIFF` reader - Differential Mode"]
38pub type DIFF_R = crate::BitReader<bool>;
39#[doc = "Field `DIFF` writer - Differential Mode"]
40pub type DIFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
41#[doc = "Field `SINEMODE` reader - Sine Mode"]
42pub type SINEMODE_R = crate::BitReader<bool>;
43#[doc = "Field `SINEMODE` writer - Sine Mode"]
44pub type SINEMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
45#[doc = "Field `CONVMODE` reader - Conversion Mode"]
46pub type CONVMODE_R = crate::FieldReader<u8, CONVMODE_A>;
47#[doc = "Conversion Mode\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum CONVMODE_A {
51    #[doc = "0: DAC is set in continuous mode"]
52    CONTINUOUS = 0,
53    #[doc = "1: DAC is set in sample/hold mode"]
54    SAMPLEHOLD = 1,
55    #[doc = "2: DAC is set in sample/shut off mode"]
56    SAMPLEOFF = 2,
57}
58impl From<CONVMODE_A> for u8 {
59    #[inline(always)]
60    fn from(variant: CONVMODE_A) -> Self {
61        variant as _
62    }
63}
64impl CONVMODE_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<CONVMODE_A> {
68        match self.bits {
69            0 => Some(CONVMODE_A::CONTINUOUS),
70            1 => Some(CONVMODE_A::SAMPLEHOLD),
71            2 => Some(CONVMODE_A::SAMPLEOFF),
72            _ => None,
73        }
74    }
75    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
76    #[inline(always)]
77    pub fn is_continuous(&self) -> bool {
78        *self == CONVMODE_A::CONTINUOUS
79    }
80    #[doc = "Checks if the value of the field is `SAMPLEHOLD`"]
81    #[inline(always)]
82    pub fn is_samplehold(&self) -> bool {
83        *self == CONVMODE_A::SAMPLEHOLD
84    }
85    #[doc = "Checks if the value of the field is `SAMPLEOFF`"]
86    #[inline(always)]
87    pub fn is_sampleoff(&self) -> bool {
88        *self == CONVMODE_A::SAMPLEOFF
89    }
90}
91#[doc = "Field `CONVMODE` writer - Conversion Mode"]
92pub type CONVMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CONVMODE_A, 2, O>;
93impl<'a, const O: u8> CONVMODE_W<'a, O> {
94    #[doc = "DAC is set in continuous mode"]
95    #[inline(always)]
96    pub fn continuous(self) -> &'a mut W {
97        self.variant(CONVMODE_A::CONTINUOUS)
98    }
99    #[doc = "DAC is set in sample/hold mode"]
100    #[inline(always)]
101    pub fn samplehold(self) -> &'a mut W {
102        self.variant(CONVMODE_A::SAMPLEHOLD)
103    }
104    #[doc = "DAC is set in sample/shut off mode"]
105    #[inline(always)]
106    pub fn sampleoff(self) -> &'a mut W {
107        self.variant(CONVMODE_A::SAMPLEOFF)
108    }
109}
110#[doc = "Field `OUTMODE` reader - Output Mode"]
111pub type OUTMODE_R = crate::FieldReader<u8, OUTMODE_A>;
112#[doc = "Output Mode\n\nValue on reset: 1"]
113#[derive(Clone, Copy, Debug, PartialEq, Eq)]
114#[repr(u8)]
115pub enum OUTMODE_A {
116    #[doc = "0: DAC output to pin and ADC disabled"]
117    DISABLE = 0,
118    #[doc = "1: DAC output to pin enabled. DAC output to ADC and ACMP disabled"]
119    PIN = 1,
120    #[doc = "2: DAC output to pin disabled. DAC output to ADC and ACMP enabled"]
121    ADC = 2,
122    #[doc = "3: DAC output to pin, ADC, and ACMP enabled"]
123    PINADC = 3,
124}
125impl From<OUTMODE_A> for u8 {
126    #[inline(always)]
127    fn from(variant: OUTMODE_A) -> Self {
128        variant as _
129    }
130}
131impl OUTMODE_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub fn variant(&self) -> OUTMODE_A {
135        match self.bits {
136            0 => OUTMODE_A::DISABLE,
137            1 => OUTMODE_A::PIN,
138            2 => OUTMODE_A::ADC,
139            3 => OUTMODE_A::PINADC,
140            _ => unreachable!(),
141        }
142    }
143    #[doc = "Checks if the value of the field is `DISABLE`"]
144    #[inline(always)]
145    pub fn is_disable(&self) -> bool {
146        *self == OUTMODE_A::DISABLE
147    }
148    #[doc = "Checks if the value of the field is `PIN`"]
149    #[inline(always)]
150    pub fn is_pin(&self) -> bool {
151        *self == OUTMODE_A::PIN
152    }
153    #[doc = "Checks if the value of the field is `ADC`"]
154    #[inline(always)]
155    pub fn is_adc(&self) -> bool {
156        *self == OUTMODE_A::ADC
157    }
158    #[doc = "Checks if the value of the field is `PINADC`"]
159    #[inline(always)]
160    pub fn is_pinadc(&self) -> bool {
161        *self == OUTMODE_A::PINADC
162    }
163}
164#[doc = "Field `OUTMODE` writer - Output Mode"]
165pub type OUTMODE_W<'a, const O: u8> =
166    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, OUTMODE_A, 2, O>;
167impl<'a, const O: u8> OUTMODE_W<'a, O> {
168    #[doc = "DAC output to pin and ADC disabled"]
169    #[inline(always)]
170    pub fn disable(self) -> &'a mut W {
171        self.variant(OUTMODE_A::DISABLE)
172    }
173    #[doc = "DAC output to pin enabled. DAC output to ADC and ACMP disabled"]
174    #[inline(always)]
175    pub fn pin(self) -> &'a mut W {
176        self.variant(OUTMODE_A::PIN)
177    }
178    #[doc = "DAC output to pin disabled. DAC output to ADC and ACMP enabled"]
179    #[inline(always)]
180    pub fn adc(self) -> &'a mut W {
181        self.variant(OUTMODE_A::ADC)
182    }
183    #[doc = "DAC output to pin, ADC, and ACMP enabled"]
184    #[inline(always)]
185    pub fn pinadc(self) -> &'a mut W {
186        self.variant(OUTMODE_A::PINADC)
187    }
188}
189#[doc = "Field `OUTENPRS` reader - PRS Controlled Output Enable"]
190pub type OUTENPRS_R = crate::BitReader<bool>;
191#[doc = "Field `OUTENPRS` writer - PRS Controlled Output Enable"]
192pub type OUTENPRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
193#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"]
194pub type CH0PRESCRST_R = crate::BitReader<bool>;
195#[doc = "Field `CH0PRESCRST` writer - Channel 0 Start Reset Prescaler"]
196pub type CH0PRESCRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
197#[doc = "Field `REFSEL` reader - Reference Selection"]
198pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
199#[doc = "Reference Selection\n\nValue on reset: 0"]
200#[derive(Clone, Copy, Debug, PartialEq, Eq)]
201#[repr(u8)]
202pub enum REFSEL_A {
203    #[doc = "0: Internal 1.25 V bandgap reference"]
204    _1V25 = 0,
205    #[doc = "1: Internal 2.5 V bandgap reference"]
206    _2V5 = 1,
207    #[doc = "2: VDD reference"]
208    VDD = 2,
209}
210impl From<REFSEL_A> for u8 {
211    #[inline(always)]
212    fn from(variant: REFSEL_A) -> Self {
213        variant as _
214    }
215}
216impl REFSEL_R {
217    #[doc = "Get enumerated values variant"]
218    #[inline(always)]
219    pub fn variant(&self) -> Option<REFSEL_A> {
220        match self.bits {
221            0 => Some(REFSEL_A::_1V25),
222            1 => Some(REFSEL_A::_2V5),
223            2 => Some(REFSEL_A::VDD),
224            _ => None,
225        }
226    }
227    #[doc = "Checks if the value of the field is `_1V25`"]
228    #[inline(always)]
229    pub fn is_1v25(&self) -> bool {
230        *self == REFSEL_A::_1V25
231    }
232    #[doc = "Checks if the value of the field is `_2V5`"]
233    #[inline(always)]
234    pub fn is_2v5(&self) -> bool {
235        *self == REFSEL_A::_2V5
236    }
237    #[doc = "Checks if the value of the field is `VDD`"]
238    #[inline(always)]
239    pub fn is_vdd(&self) -> bool {
240        *self == REFSEL_A::VDD
241    }
242}
243#[doc = "Field `REFSEL` writer - Reference Selection"]
244pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, REFSEL_A, 2, O>;
245impl<'a, const O: u8> REFSEL_W<'a, O> {
246    #[doc = "Internal 1.25 V bandgap reference"]
247    #[inline(always)]
248    pub fn _1v25(self) -> &'a mut W {
249        self.variant(REFSEL_A::_1V25)
250    }
251    #[doc = "Internal 2.5 V bandgap reference"]
252    #[inline(always)]
253    pub fn _2v5(self) -> &'a mut W {
254        self.variant(REFSEL_A::_2V5)
255    }
256    #[doc = "VDD reference"]
257    #[inline(always)]
258    pub fn vdd(self) -> &'a mut W {
259        self.variant(REFSEL_A::VDD)
260    }
261}
262#[doc = "Field `PRESC` reader - Prescaler Setting"]
263pub type PRESC_R = crate::FieldReader<u8, PRESC_A>;
264#[doc = "Prescaler Setting\n\nValue on reset: 0"]
265#[derive(Clone, Copy, Debug, PartialEq, Eq)]
266#[repr(u8)]
267pub enum PRESC_A {
268    #[doc = "0: `0`"]
269    NODIVISION = 0,
270}
271impl From<PRESC_A> for u8 {
272    #[inline(always)]
273    fn from(variant: PRESC_A) -> Self {
274        variant as _
275    }
276}
277impl PRESC_R {
278    #[doc = "Get enumerated values variant"]
279    #[inline(always)]
280    pub fn variant(&self) -> Option<PRESC_A> {
281        match self.bits {
282            0 => Some(PRESC_A::NODIVISION),
283            _ => None,
284        }
285    }
286    #[doc = "Checks if the value of the field is `NODIVISION`"]
287    #[inline(always)]
288    pub fn is_nodivision(&self) -> bool {
289        *self == PRESC_A::NODIVISION
290    }
291}
292#[doc = "Field `PRESC` writer - Prescaler Setting"]
293pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRESC_A, 3, O>;
294impl<'a, const O: u8> PRESC_W<'a, O> {
295    #[doc = "`0`"]
296    #[inline(always)]
297    pub fn nodivision(self) -> &'a mut W {
298        self.variant(PRESC_A::NODIVISION)
299    }
300}
301#[doc = "Field `REFRSEL` reader - Refresh Interval Select"]
302pub type REFRSEL_R = crate::FieldReader<u8, REFRSEL_A>;
303#[doc = "Refresh Interval Select\n\nValue on reset: 0"]
304#[derive(Clone, Copy, Debug, PartialEq, Eq)]
305#[repr(u8)]
306pub enum REFRSEL_A {
307    #[doc = "0: All channels with enabled refresh are refreshed every 8 prescaled cycles"]
308    _8CYCLES = 0,
309    #[doc = "1: All channels with enabled refresh are refreshed every 16 prescaled cycles"]
310    _16CYCLES = 1,
311    #[doc = "2: All channels with enabled refresh are refreshed every 32 prescaled cycles"]
312    _32CYCLES = 2,
313    #[doc = "3: All channels with enabled refresh are refreshed every 64 prescaled cycles"]
314    _64CYCLES = 3,
315}
316impl From<REFRSEL_A> for u8 {
317    #[inline(always)]
318    fn from(variant: REFRSEL_A) -> Self {
319        variant as _
320    }
321}
322impl REFRSEL_R {
323    #[doc = "Get enumerated values variant"]
324    #[inline(always)]
325    pub fn variant(&self) -> REFRSEL_A {
326        match self.bits {
327            0 => REFRSEL_A::_8CYCLES,
328            1 => REFRSEL_A::_16CYCLES,
329            2 => REFRSEL_A::_32CYCLES,
330            3 => REFRSEL_A::_64CYCLES,
331            _ => unreachable!(),
332        }
333    }
334    #[doc = "Checks if the value of the field is `_8CYCLES`"]
335    #[inline(always)]
336    pub fn is_8cycles(&self) -> bool {
337        *self == REFRSEL_A::_8CYCLES
338    }
339    #[doc = "Checks if the value of the field is `_16CYCLES`"]
340    #[inline(always)]
341    pub fn is_16cycles(&self) -> bool {
342        *self == REFRSEL_A::_16CYCLES
343    }
344    #[doc = "Checks if the value of the field is `_32CYCLES`"]
345    #[inline(always)]
346    pub fn is_32cycles(&self) -> bool {
347        *self == REFRSEL_A::_32CYCLES
348    }
349    #[doc = "Checks if the value of the field is `_64CYCLES`"]
350    #[inline(always)]
351    pub fn is_64cycles(&self) -> bool {
352        *self == REFRSEL_A::_64CYCLES
353    }
354}
355#[doc = "Field `REFRSEL` writer - Refresh Interval Select"]
356pub type REFRSEL_W<'a, const O: u8> =
357    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, REFRSEL_A, 2, O>;
358impl<'a, const O: u8> REFRSEL_W<'a, O> {
359    #[doc = "All channels with enabled refresh are refreshed every 8 prescaled cycles"]
360    #[inline(always)]
361    pub fn _8cycles(self) -> &'a mut W {
362        self.variant(REFRSEL_A::_8CYCLES)
363    }
364    #[doc = "All channels with enabled refresh are refreshed every 16 prescaled cycles"]
365    #[inline(always)]
366    pub fn _16cycles(self) -> &'a mut W {
367        self.variant(REFRSEL_A::_16CYCLES)
368    }
369    #[doc = "All channels with enabled refresh are refreshed every 32 prescaled cycles"]
370    #[inline(always)]
371    pub fn _32cycles(self) -> &'a mut W {
372        self.variant(REFRSEL_A::_32CYCLES)
373    }
374    #[doc = "All channels with enabled refresh are refreshed every 64 prescaled cycles"]
375    #[inline(always)]
376    pub fn _64cycles(self) -> &'a mut W {
377        self.variant(REFRSEL_A::_64CYCLES)
378    }
379}
380impl R {
381    #[doc = "Bit 0 - Differential Mode"]
382    #[inline(always)]
383    pub fn diff(&self) -> DIFF_R {
384        DIFF_R::new((self.bits & 1) != 0)
385    }
386    #[doc = "Bit 1 - Sine Mode"]
387    #[inline(always)]
388    pub fn sinemode(&self) -> SINEMODE_R {
389        SINEMODE_R::new(((self.bits >> 1) & 1) != 0)
390    }
391    #[doc = "Bits 2:3 - Conversion Mode"]
392    #[inline(always)]
393    pub fn convmode(&self) -> CONVMODE_R {
394        CONVMODE_R::new(((self.bits >> 2) & 3) as u8)
395    }
396    #[doc = "Bits 4:5 - Output Mode"]
397    #[inline(always)]
398    pub fn outmode(&self) -> OUTMODE_R {
399        OUTMODE_R::new(((self.bits >> 4) & 3) as u8)
400    }
401    #[doc = "Bit 6 - PRS Controlled Output Enable"]
402    #[inline(always)]
403    pub fn outenprs(&self) -> OUTENPRS_R {
404        OUTENPRS_R::new(((self.bits >> 6) & 1) != 0)
405    }
406    #[doc = "Bit 7 - Channel 0 Start Reset Prescaler"]
407    #[inline(always)]
408    pub fn ch0prescrst(&self) -> CH0PRESCRST_R {
409        CH0PRESCRST_R::new(((self.bits >> 7) & 1) != 0)
410    }
411    #[doc = "Bits 8:9 - Reference Selection"]
412    #[inline(always)]
413    pub fn refsel(&self) -> REFSEL_R {
414        REFSEL_R::new(((self.bits >> 8) & 3) as u8)
415    }
416    #[doc = "Bits 16:18 - Prescaler Setting"]
417    #[inline(always)]
418    pub fn presc(&self) -> PRESC_R {
419        PRESC_R::new(((self.bits >> 16) & 7) as u8)
420    }
421    #[doc = "Bits 20:21 - Refresh Interval Select"]
422    #[inline(always)]
423    pub fn refrsel(&self) -> REFRSEL_R {
424        REFRSEL_R::new(((self.bits >> 20) & 3) as u8)
425    }
426}
427impl W {
428    #[doc = "Bit 0 - Differential Mode"]
429    #[inline(always)]
430    #[must_use]
431    pub fn diff(&mut self) -> DIFF_W<0> {
432        DIFF_W::new(self)
433    }
434    #[doc = "Bit 1 - Sine Mode"]
435    #[inline(always)]
436    #[must_use]
437    pub fn sinemode(&mut self) -> SINEMODE_W<1> {
438        SINEMODE_W::new(self)
439    }
440    #[doc = "Bits 2:3 - Conversion Mode"]
441    #[inline(always)]
442    #[must_use]
443    pub fn convmode(&mut self) -> CONVMODE_W<2> {
444        CONVMODE_W::new(self)
445    }
446    #[doc = "Bits 4:5 - Output Mode"]
447    #[inline(always)]
448    #[must_use]
449    pub fn outmode(&mut self) -> OUTMODE_W<4> {
450        OUTMODE_W::new(self)
451    }
452    #[doc = "Bit 6 - PRS Controlled Output Enable"]
453    #[inline(always)]
454    #[must_use]
455    pub fn outenprs(&mut self) -> OUTENPRS_W<6> {
456        OUTENPRS_W::new(self)
457    }
458    #[doc = "Bit 7 - Channel 0 Start Reset Prescaler"]
459    #[inline(always)]
460    #[must_use]
461    pub fn ch0prescrst(&mut self) -> CH0PRESCRST_W<7> {
462        CH0PRESCRST_W::new(self)
463    }
464    #[doc = "Bits 8:9 - Reference Selection"]
465    #[inline(always)]
466    #[must_use]
467    pub fn refsel(&mut self) -> REFSEL_W<8> {
468        REFSEL_W::new(self)
469    }
470    #[doc = "Bits 16:18 - Prescaler Setting"]
471    #[inline(always)]
472    #[must_use]
473    pub fn presc(&mut self) -> PRESC_W<16> {
474        PRESC_W::new(self)
475    }
476    #[doc = "Bits 20:21 - Refresh Interval Select"]
477    #[inline(always)]
478    #[must_use]
479    pub fn refrsel(&mut self) -> REFRSEL_W<20> {
480        REFRSEL_W::new(self)
481    }
482    #[doc = "Writes raw bits to the register."]
483    #[inline(always)]
484    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
485        self.0.bits(bits);
486        self
487    }
488}
489#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
490pub struct CTRL_SPEC;
491impl crate::RegisterSpec for CTRL_SPEC {
492    type Ux = u32;
493}
494#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
495impl crate::Readable for CTRL_SPEC {
496    type Reader = R;
497}
498#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
499impl crate::Writable for CTRL_SPEC {
500    type Writer = W;
501    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
502    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
503}
504#[doc = "`reset()` method sets CTRL to value 0x10"]
505impl crate::Resettable for CTRL_SPEC {
506    const RESET_VALUE: Self::Ux = 0x10;
507}
efm32gg_pac/efm32gg995/dac0/ctrl.rs

efm32gg_pac/efm32gg995/dac0/
ctrl.rs
