efm32gg_pac/efm32gg230/letimer0/
route.rs1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ROUTE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ROUTE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `OUT0PEN` reader - Output 0 Pin Enable"]
38pub type OUT0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `OUT0PEN` writer - Output 0 Pin Enable"]
40pub type OUT0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
41#[doc = "Field `OUT1PEN` reader - Output 1 Pin Enable"]
42pub type OUT1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `OUT1PEN` writer - Output 1 Pin Enable"]
44pub type OUT1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
45#[doc = "Field `LOCATION` reader - I/O Location"]
46pub type LOCATION_R = crate::FieldReader<u8, LOCATION_A>;
47#[doc = "I/O Location\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum LOCATION_A {
51 #[doc = "0: Location 0"]
52 LOC0 = 0,
53 #[doc = "1: Location 1"]
54 LOC1 = 1,
55 #[doc = "2: Location 2"]
56 LOC2 = 2,
57 #[doc = "3: Location 3"]
58 LOC3 = 3,
59}
60impl From<LOCATION_A> for u8 {
61 #[inline(always)]
62 fn from(variant: LOCATION_A) -> Self {
63 variant as _
64 }
65}
66impl LOCATION_R {
67 #[doc = "Get enumerated values variant"]
68 #[inline(always)]
69 pub fn variant(&self) -> Option<LOCATION_A> {
70 match self.bits {
71 0 => Some(LOCATION_A::LOC0),
72 1 => Some(LOCATION_A::LOC1),
73 2 => Some(LOCATION_A::LOC2),
74 3 => Some(LOCATION_A::LOC3),
75 _ => None,
76 }
77 }
78 #[doc = "Checks if the value of the field is `LOC0`"]
79 #[inline(always)]
80 pub fn is_loc0(&self) -> bool {
81 *self == LOCATION_A::LOC0
82 }
83 #[doc = "Checks if the value of the field is `LOC1`"]
84 #[inline(always)]
85 pub fn is_loc1(&self) -> bool {
86 *self == LOCATION_A::LOC1
87 }
88 #[doc = "Checks if the value of the field is `LOC2`"]
89 #[inline(always)]
90 pub fn is_loc2(&self) -> bool {
91 *self == LOCATION_A::LOC2
92 }
93 #[doc = "Checks if the value of the field is `LOC3`"]
94 #[inline(always)]
95 pub fn is_loc3(&self) -> bool {
96 *self == LOCATION_A::LOC3
97 }
98}
99#[doc = "Field `LOCATION` writer - I/O Location"]
100pub type LOCATION_W<'a, const O: u8> =
101 crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, LOCATION_A, 3, O>;
102impl<'a, const O: u8> LOCATION_W<'a, O> {
103 #[doc = "Location 0"]
104 #[inline(always)]
105 pub fn loc0(self) -> &'a mut W {
106 self.variant(LOCATION_A::LOC0)
107 }
108 #[doc = "Location 1"]
109 #[inline(always)]
110 pub fn loc1(self) -> &'a mut W {
111 self.variant(LOCATION_A::LOC1)
112 }
113 #[doc = "Location 2"]
114 #[inline(always)]
115 pub fn loc2(self) -> &'a mut W {
116 self.variant(LOCATION_A::LOC2)
117 }
118 #[doc = "Location 3"]
119 #[inline(always)]
120 pub fn loc3(self) -> &'a mut W {
121 self.variant(LOCATION_A::LOC3)
122 }
123}
124impl R {
125 #[doc = "Bit 0 - Output 0 Pin Enable"]
126 #[inline(always)]
127 pub fn out0pen(&self) -> OUT0PEN_R {
128 OUT0PEN_R::new((self.bits & 1) != 0)
129 }
130 #[doc = "Bit 1 - Output 1 Pin Enable"]
131 #[inline(always)]
132 pub fn out1pen(&self) -> OUT1PEN_R {
133 OUT1PEN_R::new(((self.bits >> 1) & 1) != 0)
134 }
135 #[doc = "Bits 8:10 - I/O Location"]
136 #[inline(always)]
137 pub fn location(&self) -> LOCATION_R {
138 LOCATION_R::new(((self.bits >> 8) & 7) as u8)
139 }
140}
141impl W {
142 #[doc = "Bit 0 - Output 0 Pin Enable"]
143 #[inline(always)]
144 #[must_use]
145 pub fn out0pen(&mut self) -> OUT0PEN_W<0> {
146 OUT0PEN_W::new(self)
147 }
148 #[doc = "Bit 1 - Output 1 Pin Enable"]
149 #[inline(always)]
150 #[must_use]
151 pub fn out1pen(&mut self) -> OUT1PEN_W<1> {
152 OUT1PEN_W::new(self)
153 }
154 #[doc = "Bits 8:10 - I/O Location"]
155 #[inline(always)]
156 #[must_use]
157 pub fn location(&mut self) -> LOCATION_W<8> {
158 LOCATION_W::new(self)
159 }
160 #[doc = "Writes raw bits to the register."]
161 #[inline(always)]
162 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
163 self.0.bits(bits);
164 self
165 }
166}
167#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
168pub struct ROUTE_SPEC;
169impl crate::RegisterSpec for ROUTE_SPEC {
170 type Ux = u32;
171}
172#[doc = "`read()` method returns [route::R](R) reader structure"]
173impl crate::Readable for ROUTE_SPEC {
174 type Reader = R;
175}
176#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
177impl crate::Writable for ROUTE_SPEC {
178 type Writer = W;
179 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
180 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
181}
182#[doc = "`reset()` method sets ROUTE to value 0"]
183impl crate::Resettable for ROUTE_SPEC {
184 const RESET_VALUE: Self::Ux = 0;
185}