efm32gg_pac/efm32gg230/lesense/
perctrl.rs

1#[doc = "Register `PERCTRL` reader"]
2pub struct R(crate::R<PERCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PERCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PERCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PERCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PERCTRL` writer"]
17pub struct W(crate::W<PERCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PERCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PERCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PERCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DACCH0DATA` reader - DAC CH0 data selection."]
38pub type DACCH0DATA_R = crate::BitReader<bool>;
39#[doc = "Field `DACCH0DATA` writer - DAC CH0 data selection."]
40pub type DACCH0DATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
41#[doc = "Field `DACCH1DATA` reader - DAC CH1 data selection."]
42pub type DACCH1DATA_R = crate::BitReader<bool>;
43#[doc = "Field `DACCH1DATA` writer - DAC CH1 data selection."]
44pub type DACCH1DATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
45#[doc = "Field `DACCH0CONV` reader - DAC channel 0 conversion mode"]
46pub type DACCH0CONV_R = crate::FieldReader<u8, DACCH0CONV_A>;
47#[doc = "DAC channel 0 conversion mode\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum DACCH0CONV_A {
51    #[doc = "0: LESENSE does not control DAC CH0."]
52    DISABLE = 0,
53    #[doc = "1: DAC channel 0 is driven in continuous mode."]
54    CONTINUOUS = 1,
55    #[doc = "2: DAC channel 0 is driven in sample hold mode."]
56    SAMPLEHOLD = 2,
57    #[doc = "3: DAC channel 0 is driven in sample off mode."]
58    SAMPLEOFF = 3,
59}
60impl From<DACCH0CONV_A> for u8 {
61    #[inline(always)]
62    fn from(variant: DACCH0CONV_A) -> Self {
63        variant as _
64    }
65}
66impl DACCH0CONV_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> DACCH0CONV_A {
70        match self.bits {
71            0 => DACCH0CONV_A::DISABLE,
72            1 => DACCH0CONV_A::CONTINUOUS,
73            2 => DACCH0CONV_A::SAMPLEHOLD,
74            3 => DACCH0CONV_A::SAMPLEOFF,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "Checks if the value of the field is `DISABLE`"]
79    #[inline(always)]
80    pub fn is_disable(&self) -> bool {
81        *self == DACCH0CONV_A::DISABLE
82    }
83    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
84    #[inline(always)]
85    pub fn is_continuous(&self) -> bool {
86        *self == DACCH0CONV_A::CONTINUOUS
87    }
88    #[doc = "Checks if the value of the field is `SAMPLEHOLD`"]
89    #[inline(always)]
90    pub fn is_samplehold(&self) -> bool {
91        *self == DACCH0CONV_A::SAMPLEHOLD
92    }
93    #[doc = "Checks if the value of the field is `SAMPLEOFF`"]
94    #[inline(always)]
95    pub fn is_sampleoff(&self) -> bool {
96        *self == DACCH0CONV_A::SAMPLEOFF
97    }
98}
99#[doc = "Field `DACCH0CONV` writer - DAC channel 0 conversion mode"]
100pub type DACCH0CONV_W<'a, const O: u8> =
101    crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH0CONV_A, 2, O>;
102impl<'a, const O: u8> DACCH0CONV_W<'a, O> {
103    #[doc = "LESENSE does not control DAC CH0."]
104    #[inline(always)]
105    pub fn disable(self) -> &'a mut W {
106        self.variant(DACCH0CONV_A::DISABLE)
107    }
108    #[doc = "DAC channel 0 is driven in continuous mode."]
109    #[inline(always)]
110    pub fn continuous(self) -> &'a mut W {
111        self.variant(DACCH0CONV_A::CONTINUOUS)
112    }
113    #[doc = "DAC channel 0 is driven in sample hold mode."]
114    #[inline(always)]
115    pub fn samplehold(self) -> &'a mut W {
116        self.variant(DACCH0CONV_A::SAMPLEHOLD)
117    }
118    #[doc = "DAC channel 0 is driven in sample off mode."]
119    #[inline(always)]
120    pub fn sampleoff(self) -> &'a mut W {
121        self.variant(DACCH0CONV_A::SAMPLEOFF)
122    }
123}
124#[doc = "Field `DACCH1CONV` reader - DAC channel 1 conversion mode"]
125pub type DACCH1CONV_R = crate::FieldReader<u8, DACCH1CONV_A>;
126#[doc = "DAC channel 1 conversion mode\n\nValue on reset: 0"]
127#[derive(Clone, Copy, Debug, PartialEq, Eq)]
128#[repr(u8)]
129pub enum DACCH1CONV_A {
130    #[doc = "0: LESENSE does not control DAC CH1."]
131    DISABLE = 0,
132    #[doc = "1: DAC channel 1 is driven in continuous mode."]
133    CONTINUOUS = 1,
134    #[doc = "2: DAC channel 1 is driven in sample hold mode."]
135    SAMPLEHOLD = 2,
136    #[doc = "3: DAC channel 1 is driven in sample off mode."]
137    SAMPLEOFF = 3,
138}
139impl From<DACCH1CONV_A> for u8 {
140    #[inline(always)]
141    fn from(variant: DACCH1CONV_A) -> Self {
142        variant as _
143    }
144}
145impl DACCH1CONV_R {
146    #[doc = "Get enumerated values variant"]
147    #[inline(always)]
148    pub fn variant(&self) -> DACCH1CONV_A {
149        match self.bits {
150            0 => DACCH1CONV_A::DISABLE,
151            1 => DACCH1CONV_A::CONTINUOUS,
152            2 => DACCH1CONV_A::SAMPLEHOLD,
153            3 => DACCH1CONV_A::SAMPLEOFF,
154            _ => unreachable!(),
155        }
156    }
157    #[doc = "Checks if the value of the field is `DISABLE`"]
158    #[inline(always)]
159    pub fn is_disable(&self) -> bool {
160        *self == DACCH1CONV_A::DISABLE
161    }
162    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
163    #[inline(always)]
164    pub fn is_continuous(&self) -> bool {
165        *self == DACCH1CONV_A::CONTINUOUS
166    }
167    #[doc = "Checks if the value of the field is `SAMPLEHOLD`"]
168    #[inline(always)]
169    pub fn is_samplehold(&self) -> bool {
170        *self == DACCH1CONV_A::SAMPLEHOLD
171    }
172    #[doc = "Checks if the value of the field is `SAMPLEOFF`"]
173    #[inline(always)]
174    pub fn is_sampleoff(&self) -> bool {
175        *self == DACCH1CONV_A::SAMPLEOFF
176    }
177}
178#[doc = "Field `DACCH1CONV` writer - DAC channel 1 conversion mode"]
179pub type DACCH1CONV_W<'a, const O: u8> =
180    crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH1CONV_A, 2, O>;
181impl<'a, const O: u8> DACCH1CONV_W<'a, O> {
182    #[doc = "LESENSE does not control DAC CH1."]
183    #[inline(always)]
184    pub fn disable(self) -> &'a mut W {
185        self.variant(DACCH1CONV_A::DISABLE)
186    }
187    #[doc = "DAC channel 1 is driven in continuous mode."]
188    #[inline(always)]
189    pub fn continuous(self) -> &'a mut W {
190        self.variant(DACCH1CONV_A::CONTINUOUS)
191    }
192    #[doc = "DAC channel 1 is driven in sample hold mode."]
193    #[inline(always)]
194    pub fn samplehold(self) -> &'a mut W {
195        self.variant(DACCH1CONV_A::SAMPLEHOLD)
196    }
197    #[doc = "DAC channel 1 is driven in sample off mode."]
198    #[inline(always)]
199    pub fn sampleoff(self) -> &'a mut W {
200        self.variant(DACCH1CONV_A::SAMPLEOFF)
201    }
202}
203#[doc = "Field `DACCH0OUT` reader - DAC channel 0 output mode"]
204pub type DACCH0OUT_R = crate::FieldReader<u8, DACCH0OUT_A>;
205#[doc = "DAC channel 0 output mode\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq, Eq)]
207#[repr(u8)]
208pub enum DACCH0OUT_A {
209    #[doc = "0: DAC CH0 output to pin and ACMP/ADC disabled"]
210    DISABLE = 0,
211    #[doc = "1: DAC CH0 output to pin enabled, output to ADC and ACMP disabled"]
212    PIN = 1,
213    #[doc = "2: DAC CH0 output to pin disabled, output to ADC and ACMP enabled"]
214    ADCACMP = 2,
215    #[doc = "3: DAC CH0 output to pin, ADC, and ACMP enabled."]
216    PINADCACMP = 3,
217}
218impl From<DACCH0OUT_A> for u8 {
219    #[inline(always)]
220    fn from(variant: DACCH0OUT_A) -> Self {
221        variant as _
222    }
223}
224impl DACCH0OUT_R {
225    #[doc = "Get enumerated values variant"]
226    #[inline(always)]
227    pub fn variant(&self) -> DACCH0OUT_A {
228        match self.bits {
229            0 => DACCH0OUT_A::DISABLE,
230            1 => DACCH0OUT_A::PIN,
231            2 => DACCH0OUT_A::ADCACMP,
232            3 => DACCH0OUT_A::PINADCACMP,
233            _ => unreachable!(),
234        }
235    }
236    #[doc = "Checks if the value of the field is `DISABLE`"]
237    #[inline(always)]
238    pub fn is_disable(&self) -> bool {
239        *self == DACCH0OUT_A::DISABLE
240    }
241    #[doc = "Checks if the value of the field is `PIN`"]
242    #[inline(always)]
243    pub fn is_pin(&self) -> bool {
244        *self == DACCH0OUT_A::PIN
245    }
246    #[doc = "Checks if the value of the field is `ADCACMP`"]
247    #[inline(always)]
248    pub fn is_adcacmp(&self) -> bool {
249        *self == DACCH0OUT_A::ADCACMP
250    }
251    #[doc = "Checks if the value of the field is `PINADCACMP`"]
252    #[inline(always)]
253    pub fn is_pinadcacmp(&self) -> bool {
254        *self == DACCH0OUT_A::PINADCACMP
255    }
256}
257#[doc = "Field `DACCH0OUT` writer - DAC channel 0 output mode"]
258pub type DACCH0OUT_W<'a, const O: u8> =
259    crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH0OUT_A, 2, O>;
260impl<'a, const O: u8> DACCH0OUT_W<'a, O> {
261    #[doc = "DAC CH0 output to pin and ACMP/ADC disabled"]
262    #[inline(always)]
263    pub fn disable(self) -> &'a mut W {
264        self.variant(DACCH0OUT_A::DISABLE)
265    }
266    #[doc = "DAC CH0 output to pin enabled, output to ADC and ACMP disabled"]
267    #[inline(always)]
268    pub fn pin(self) -> &'a mut W {
269        self.variant(DACCH0OUT_A::PIN)
270    }
271    #[doc = "DAC CH0 output to pin disabled, output to ADC and ACMP enabled"]
272    #[inline(always)]
273    pub fn adcacmp(self) -> &'a mut W {
274        self.variant(DACCH0OUT_A::ADCACMP)
275    }
276    #[doc = "DAC CH0 output to pin, ADC, and ACMP enabled."]
277    #[inline(always)]
278    pub fn pinadcacmp(self) -> &'a mut W {
279        self.variant(DACCH0OUT_A::PINADCACMP)
280    }
281}
282#[doc = "Field `DACCH1OUT` reader - DAC channel 1 output mode"]
283pub type DACCH1OUT_R = crate::FieldReader<u8, DACCH1OUT_A>;
284#[doc = "DAC channel 1 output mode\n\nValue on reset: 0"]
285#[derive(Clone, Copy, Debug, PartialEq, Eq)]
286#[repr(u8)]
287pub enum DACCH1OUT_A {
288    #[doc = "0: DAC CH1 output to pin and ACMP/ADC disabled"]
289    DISABLE = 0,
290    #[doc = "1: DAC CH1 output to pin enabled, output to ADC and ACMP disabled"]
291    PIN = 1,
292    #[doc = "2: DAC CH1 output to pin disabled, output to ADC and ACMP enabled"]
293    ADCACMP = 2,
294    #[doc = "3: DAC CH1 output to pin, ADC, and ACMP enabled."]
295    PINADCACMP = 3,
296}
297impl From<DACCH1OUT_A> for u8 {
298    #[inline(always)]
299    fn from(variant: DACCH1OUT_A) -> Self {
300        variant as _
301    }
302}
303impl DACCH1OUT_R {
304    #[doc = "Get enumerated values variant"]
305    #[inline(always)]
306    pub fn variant(&self) -> DACCH1OUT_A {
307        match self.bits {
308            0 => DACCH1OUT_A::DISABLE,
309            1 => DACCH1OUT_A::PIN,
310            2 => DACCH1OUT_A::ADCACMP,
311            3 => DACCH1OUT_A::PINADCACMP,
312            _ => unreachable!(),
313        }
314    }
315    #[doc = "Checks if the value of the field is `DISABLE`"]
316    #[inline(always)]
317    pub fn is_disable(&self) -> bool {
318        *self == DACCH1OUT_A::DISABLE
319    }
320    #[doc = "Checks if the value of the field is `PIN`"]
321    #[inline(always)]
322    pub fn is_pin(&self) -> bool {
323        *self == DACCH1OUT_A::PIN
324    }
325    #[doc = "Checks if the value of the field is `ADCACMP`"]
326    #[inline(always)]
327    pub fn is_adcacmp(&self) -> bool {
328        *self == DACCH1OUT_A::ADCACMP
329    }
330    #[doc = "Checks if the value of the field is `PINADCACMP`"]
331    #[inline(always)]
332    pub fn is_pinadcacmp(&self) -> bool {
333        *self == DACCH1OUT_A::PINADCACMP
334    }
335}
336#[doc = "Field `DACCH1OUT` writer - DAC channel 1 output mode"]
337pub type DACCH1OUT_W<'a, const O: u8> =
338    crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, DACCH1OUT_A, 2, O>;
339impl<'a, const O: u8> DACCH1OUT_W<'a, O> {
340    #[doc = "DAC CH1 output to pin and ACMP/ADC disabled"]
341    #[inline(always)]
342    pub fn disable(self) -> &'a mut W {
343        self.variant(DACCH1OUT_A::DISABLE)
344    }
345    #[doc = "DAC CH1 output to pin enabled, output to ADC and ACMP disabled"]
346    #[inline(always)]
347    pub fn pin(self) -> &'a mut W {
348        self.variant(DACCH1OUT_A::PIN)
349    }
350    #[doc = "DAC CH1 output to pin disabled, output to ADC and ACMP enabled"]
351    #[inline(always)]
352    pub fn adcacmp(self) -> &'a mut W {
353        self.variant(DACCH1OUT_A::ADCACMP)
354    }
355    #[doc = "DAC CH1 output to pin, ADC, and ACMP enabled."]
356    #[inline(always)]
357    pub fn pinadcacmp(self) -> &'a mut W {
358        self.variant(DACCH1OUT_A::PINADCACMP)
359    }
360}
361#[doc = "Field `DACPRESC` reader - DAC prescaler configuration."]
362pub type DACPRESC_R = crate::FieldReader<u8, u8>;
363#[doc = "Field `DACPRESC` writer - DAC prescaler configuration."]
364pub type DACPRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, u8, 5, O>;
365#[doc = "Field `DACREF` reader - DAC bandgap reference used"]
366pub type DACREF_R = crate::BitReader<bool>;
367#[doc = "Field `DACREF` writer - DAC bandgap reference used"]
368pub type DACREF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
369#[doc = "Field `ACMP0MODE` reader - ACMP0 mode"]
370pub type ACMP0MODE_R = crate::FieldReader<u8, ACMP0MODE_A>;
371#[doc = "ACMP0 mode\n\nValue on reset: 0"]
372#[derive(Clone, Copy, Debug, PartialEq, Eq)]
373#[repr(u8)]
374pub enum ACMP0MODE_A {
375    #[doc = "0: LESENSE does not control ACMP0"]
376    DISABLE = 0,
377    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP0"]
378    MUX = 1,
379    #[doc = "2: LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
380    MUXTHRES = 2,
381}
382impl From<ACMP0MODE_A> for u8 {
383    #[inline(always)]
384    fn from(variant: ACMP0MODE_A) -> Self {
385        variant as _
386    }
387}
388impl ACMP0MODE_R {
389    #[doc = "Get enumerated values variant"]
390    #[inline(always)]
391    pub fn variant(&self) -> Option<ACMP0MODE_A> {
392        match self.bits {
393            0 => Some(ACMP0MODE_A::DISABLE),
394            1 => Some(ACMP0MODE_A::MUX),
395            2 => Some(ACMP0MODE_A::MUXTHRES),
396            _ => None,
397        }
398    }
399    #[doc = "Checks if the value of the field is `DISABLE`"]
400    #[inline(always)]
401    pub fn is_disable(&self) -> bool {
402        *self == ACMP0MODE_A::DISABLE
403    }
404    #[doc = "Checks if the value of the field is `MUX`"]
405    #[inline(always)]
406    pub fn is_mux(&self) -> bool {
407        *self == ACMP0MODE_A::MUX
408    }
409    #[doc = "Checks if the value of the field is `MUXTHRES`"]
410    #[inline(always)]
411    pub fn is_muxthres(&self) -> bool {
412        *self == ACMP0MODE_A::MUXTHRES
413    }
414}
415#[doc = "Field `ACMP0MODE` writer - ACMP0 mode"]
416pub type ACMP0MODE_W<'a, const O: u8> =
417    crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP0MODE_A, 2, O>;
418impl<'a, const O: u8> ACMP0MODE_W<'a, O> {
419    #[doc = "LESENSE does not control ACMP0"]
420    #[inline(always)]
421    pub fn disable(self) -> &'a mut W {
422        self.variant(ACMP0MODE_A::DISABLE)
423    }
424    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP0"]
425    #[inline(always)]
426    pub fn mux(self) -> &'a mut W {
427        self.variant(ACMP0MODE_A::MUX)
428    }
429    #[doc = "LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
430    #[inline(always)]
431    pub fn muxthres(self) -> &'a mut W {
432        self.variant(ACMP0MODE_A::MUXTHRES)
433    }
434}
435#[doc = "Field `ACMP1MODE` reader - ACMP1 mode"]
436pub type ACMP1MODE_R = crate::FieldReader<u8, ACMP1MODE_A>;
437#[doc = "ACMP1 mode\n\nValue on reset: 0"]
438#[derive(Clone, Copy, Debug, PartialEq, Eq)]
439#[repr(u8)]
440pub enum ACMP1MODE_A {
441    #[doc = "0: LESENSE does not control ACMP1"]
442    DISABLE = 0,
443    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP1"]
444    MUX = 1,
445    #[doc = "2: LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
446    MUXTHRES = 2,
447}
448impl From<ACMP1MODE_A> for u8 {
449    #[inline(always)]
450    fn from(variant: ACMP1MODE_A) -> Self {
451        variant as _
452    }
453}
454impl ACMP1MODE_R {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub fn variant(&self) -> Option<ACMP1MODE_A> {
458        match self.bits {
459            0 => Some(ACMP1MODE_A::DISABLE),
460            1 => Some(ACMP1MODE_A::MUX),
461            2 => Some(ACMP1MODE_A::MUXTHRES),
462            _ => None,
463        }
464    }
465    #[doc = "Checks if the value of the field is `DISABLE`"]
466    #[inline(always)]
467    pub fn is_disable(&self) -> bool {
468        *self == ACMP1MODE_A::DISABLE
469    }
470    #[doc = "Checks if the value of the field is `MUX`"]
471    #[inline(always)]
472    pub fn is_mux(&self) -> bool {
473        *self == ACMP1MODE_A::MUX
474    }
475    #[doc = "Checks if the value of the field is `MUXTHRES`"]
476    #[inline(always)]
477    pub fn is_muxthres(&self) -> bool {
478        *self == ACMP1MODE_A::MUXTHRES
479    }
480}
481#[doc = "Field `ACMP1MODE` writer - ACMP1 mode"]
482pub type ACMP1MODE_W<'a, const O: u8> =
483    crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP1MODE_A, 2, O>;
484impl<'a, const O: u8> ACMP1MODE_W<'a, O> {
485    #[doc = "LESENSE does not control ACMP1"]
486    #[inline(always)]
487    pub fn disable(self) -> &'a mut W {
488        self.variant(ACMP1MODE_A::DISABLE)
489    }
490    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP1"]
491    #[inline(always)]
492    pub fn mux(self) -> &'a mut W {
493        self.variant(ACMP1MODE_A::MUX)
494    }
495    #[doc = "LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
496    #[inline(always)]
497    pub fn muxthres(self) -> &'a mut W {
498        self.variant(ACMP1MODE_A::MUXTHRES)
499    }
500}
501#[doc = "Field `WARMUPMODE` reader - ACMP and DAC duty cycle mode"]
502pub type WARMUPMODE_R = crate::FieldReader<u8, WARMUPMODE_A>;
503#[doc = "ACMP and DAC duty cycle mode\n\nValue on reset: 0"]
504#[derive(Clone, Copy, Debug, PartialEq, Eq)]
505#[repr(u8)]
506pub enum WARMUPMODE_A {
507    #[doc = "0: The analog comparators and DAC are shut down when LESENSE is idle"]
508    NORMAL = 0,
509    #[doc = "1: The analog comparators are kept powered up when LESENSE is idle"]
510    KEEPACMPWARM = 1,
511    #[doc = "2: The DAC is kept powered up when LESENSE is idle"]
512    KEEPDACWARM = 2,
513    #[doc = "3: The analog comparators and DAC are kept powered up when LESENSE is idle"]
514    KEEPACMPDACWARM = 3,
515}
516impl From<WARMUPMODE_A> for u8 {
517    #[inline(always)]
518    fn from(variant: WARMUPMODE_A) -> Self {
519        variant as _
520    }
521}
522impl WARMUPMODE_R {
523    #[doc = "Get enumerated values variant"]
524    #[inline(always)]
525    pub fn variant(&self) -> WARMUPMODE_A {
526        match self.bits {
527            0 => WARMUPMODE_A::NORMAL,
528            1 => WARMUPMODE_A::KEEPACMPWARM,
529            2 => WARMUPMODE_A::KEEPDACWARM,
530            3 => WARMUPMODE_A::KEEPACMPDACWARM,
531            _ => unreachable!(),
532        }
533    }
534    #[doc = "Checks if the value of the field is `NORMAL`"]
535    #[inline(always)]
536    pub fn is_normal(&self) -> bool {
537        *self == WARMUPMODE_A::NORMAL
538    }
539    #[doc = "Checks if the value of the field is `KEEPACMPWARM`"]
540    #[inline(always)]
541    pub fn is_keepacmpwarm(&self) -> bool {
542        *self == WARMUPMODE_A::KEEPACMPWARM
543    }
544    #[doc = "Checks if the value of the field is `KEEPDACWARM`"]
545    #[inline(always)]
546    pub fn is_keepdacwarm(&self) -> bool {
547        *self == WARMUPMODE_A::KEEPDACWARM
548    }
549    #[doc = "Checks if the value of the field is `KEEPACMPDACWARM`"]
550    #[inline(always)]
551    pub fn is_keepacmpdacwarm(&self) -> bool {
552        *self == WARMUPMODE_A::KEEPACMPDACWARM
553    }
554}
555#[doc = "Field `WARMUPMODE` writer - ACMP and DAC duty cycle mode"]
556pub type WARMUPMODE_W<'a, const O: u8> =
557    crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, WARMUPMODE_A, 2, O>;
558impl<'a, const O: u8> WARMUPMODE_W<'a, O> {
559    #[doc = "The analog comparators and DAC are shut down when LESENSE is idle"]
560    #[inline(always)]
561    pub fn normal(self) -> &'a mut W {
562        self.variant(WARMUPMODE_A::NORMAL)
563    }
564    #[doc = "The analog comparators are kept powered up when LESENSE is idle"]
565    #[inline(always)]
566    pub fn keepacmpwarm(self) -> &'a mut W {
567        self.variant(WARMUPMODE_A::KEEPACMPWARM)
568    }
569    #[doc = "The DAC is kept powered up when LESENSE is idle"]
570    #[inline(always)]
571    pub fn keepdacwarm(self) -> &'a mut W {
572        self.variant(WARMUPMODE_A::KEEPDACWARM)
573    }
574    #[doc = "The analog comparators and DAC are kept powered up when LESENSE is idle"]
575    #[inline(always)]
576    pub fn keepacmpdacwarm(self) -> &'a mut W {
577        self.variant(WARMUPMODE_A::KEEPACMPDACWARM)
578    }
579}
580impl R {
581    #[doc = "Bit 0 - DAC CH0 data selection."]
582    #[inline(always)]
583    pub fn dacch0data(&self) -> DACCH0DATA_R {
584        DACCH0DATA_R::new((self.bits & 1) != 0)
585    }
586    #[doc = "Bit 1 - DAC CH1 data selection."]
587    #[inline(always)]
588    pub fn dacch1data(&self) -> DACCH1DATA_R {
589        DACCH1DATA_R::new(((self.bits >> 1) & 1) != 0)
590    }
591    #[doc = "Bits 2:3 - DAC channel 0 conversion mode"]
592    #[inline(always)]
593    pub fn dacch0conv(&self) -> DACCH0CONV_R {
594        DACCH0CONV_R::new(((self.bits >> 2) & 3) as u8)
595    }
596    #[doc = "Bits 4:5 - DAC channel 1 conversion mode"]
597    #[inline(always)]
598    pub fn dacch1conv(&self) -> DACCH1CONV_R {
599        DACCH1CONV_R::new(((self.bits >> 4) & 3) as u8)
600    }
601    #[doc = "Bits 6:7 - DAC channel 0 output mode"]
602    #[inline(always)]
603    pub fn dacch0out(&self) -> DACCH0OUT_R {
604        DACCH0OUT_R::new(((self.bits >> 6) & 3) as u8)
605    }
606    #[doc = "Bits 8:9 - DAC channel 1 output mode"]
607    #[inline(always)]
608    pub fn dacch1out(&self) -> DACCH1OUT_R {
609        DACCH1OUT_R::new(((self.bits >> 8) & 3) as u8)
610    }
611    #[doc = "Bits 10:14 - DAC prescaler configuration."]
612    #[inline(always)]
613    pub fn dacpresc(&self) -> DACPRESC_R {
614        DACPRESC_R::new(((self.bits >> 10) & 0x1f) as u8)
615    }
616    #[doc = "Bit 18 - DAC bandgap reference used"]
617    #[inline(always)]
618    pub fn dacref(&self) -> DACREF_R {
619        DACREF_R::new(((self.bits >> 18) & 1) != 0)
620    }
621    #[doc = "Bits 20:21 - ACMP0 mode"]
622    #[inline(always)]
623    pub fn acmp0mode(&self) -> ACMP0MODE_R {
624        ACMP0MODE_R::new(((self.bits >> 20) & 3) as u8)
625    }
626    #[doc = "Bits 22:23 - ACMP1 mode"]
627    #[inline(always)]
628    pub fn acmp1mode(&self) -> ACMP1MODE_R {
629        ACMP1MODE_R::new(((self.bits >> 22) & 3) as u8)
630    }
631    #[doc = "Bits 26:27 - ACMP and DAC duty cycle mode"]
632    #[inline(always)]
633    pub fn warmupmode(&self) -> WARMUPMODE_R {
634        WARMUPMODE_R::new(((self.bits >> 26) & 3) as u8)
635    }
636}
637impl W {
638    #[doc = "Bit 0 - DAC CH0 data selection."]
639    #[inline(always)]
640    #[must_use]
641    pub fn dacch0data(&mut self) -> DACCH0DATA_W<0> {
642        DACCH0DATA_W::new(self)
643    }
644    #[doc = "Bit 1 - DAC CH1 data selection."]
645    #[inline(always)]
646    #[must_use]
647    pub fn dacch1data(&mut self) -> DACCH1DATA_W<1> {
648        DACCH1DATA_W::new(self)
649    }
650    #[doc = "Bits 2:3 - DAC channel 0 conversion mode"]
651    #[inline(always)]
652    #[must_use]
653    pub fn dacch0conv(&mut self) -> DACCH0CONV_W<2> {
654        DACCH0CONV_W::new(self)
655    }
656    #[doc = "Bits 4:5 - DAC channel 1 conversion mode"]
657    #[inline(always)]
658    #[must_use]
659    pub fn dacch1conv(&mut self) -> DACCH1CONV_W<4> {
660        DACCH1CONV_W::new(self)
661    }
662    #[doc = "Bits 6:7 - DAC channel 0 output mode"]
663    #[inline(always)]
664    #[must_use]
665    pub fn dacch0out(&mut self) -> DACCH0OUT_W<6> {
666        DACCH0OUT_W::new(self)
667    }
668    #[doc = "Bits 8:9 - DAC channel 1 output mode"]
669    #[inline(always)]
670    #[must_use]
671    pub fn dacch1out(&mut self) -> DACCH1OUT_W<8> {
672        DACCH1OUT_W::new(self)
673    }
674    #[doc = "Bits 10:14 - DAC prescaler configuration."]
675    #[inline(always)]
676    #[must_use]
677    pub fn dacpresc(&mut self) -> DACPRESC_W<10> {
678        DACPRESC_W::new(self)
679    }
680    #[doc = "Bit 18 - DAC bandgap reference used"]
681    #[inline(always)]
682    #[must_use]
683    pub fn dacref(&mut self) -> DACREF_W<18> {
684        DACREF_W::new(self)
685    }
686    #[doc = "Bits 20:21 - ACMP0 mode"]
687    #[inline(always)]
688    #[must_use]
689    pub fn acmp0mode(&mut self) -> ACMP0MODE_W<20> {
690        ACMP0MODE_W::new(self)
691    }
692    #[doc = "Bits 22:23 - ACMP1 mode"]
693    #[inline(always)]
694    #[must_use]
695    pub fn acmp1mode(&mut self) -> ACMP1MODE_W<22> {
696        ACMP1MODE_W::new(self)
697    }
698    #[doc = "Bits 26:27 - ACMP and DAC duty cycle mode"]
699    #[inline(always)]
700    #[must_use]
701    pub fn warmupmode(&mut self) -> WARMUPMODE_W<26> {
702        WARMUPMODE_W::new(self)
703    }
704    #[doc = "Writes raw bits to the register."]
705    #[inline(always)]
706    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
707        self.0.bits(bits);
708        self
709    }
710}
711#[doc = "Peripheral Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perctrl](index.html) module"]
712pub struct PERCTRL_SPEC;
713impl crate::RegisterSpec for PERCTRL_SPEC {
714    type Ux = u32;
715}
716#[doc = "`read()` method returns [perctrl::R](R) reader structure"]
717impl crate::Readable for PERCTRL_SPEC {
718    type Reader = R;
719}
720#[doc = "`write(|w| ..)` method takes [perctrl::W](W) writer structure"]
721impl crate::Writable for PERCTRL_SPEC {
722    type Writer = W;
723    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
724    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
725}
726#[doc = "`reset()` method sets PERCTRL to value 0"]
727impl crate::Resettable for PERCTRL_SPEC {
728    const RESET_VALUE: Self::Ux = 0;
729}
efm32gg_pac/efm32gg230/lesense/perctrl.rs

efm32gg_pac/efm32gg230/lesense/
perctrl.rs
