efm32gg_pac/efm32gg230/gpio/
extipsell.rs

1#[doc = "Register `EXTIPSELL` reader"]
2pub struct R(crate::R<EXTIPSELL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<EXTIPSELL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<EXTIPSELL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<EXTIPSELL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `EXTIPSELL` writer"]
17pub struct W(crate::W<EXTIPSELL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<EXTIPSELL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<EXTIPSELL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<EXTIPSELL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EXTIPSEL0` reader - External Interrupt 0 Port Select"]
38pub type EXTIPSEL0_R = crate::FieldReader<u8, EXTIPSEL0_A>;
39#[doc = "External Interrupt 0 Port Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum EXTIPSEL0_A {
43    #[doc = "0: Port A pin 0 selected for external interrupt 0"]
44    PORTA = 0,
45    #[doc = "1: Port B pin 0 selected for external interrupt 0"]
46    PORTB = 1,
47    #[doc = "2: Port C pin 0 selected for external interrupt 0"]
48    PORTC = 2,
49    #[doc = "3: Port D pin 0 selected for external interrupt 0"]
50    PORTD = 3,
51    #[doc = "4: Port E pin 0 selected for external interrupt 0"]
52    PORTE = 4,
53    #[doc = "5: Port F pin 0 selected for external interrupt 0"]
54    PORTF = 5,
55}
56impl From<EXTIPSEL0_A> for u8 {
57    #[inline(always)]
58    fn from(variant: EXTIPSEL0_A) -> Self {
59        variant as _
60    }
61}
62impl EXTIPSEL0_R {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> Option<EXTIPSEL0_A> {
66        match self.bits {
67            0 => Some(EXTIPSEL0_A::PORTA),
68            1 => Some(EXTIPSEL0_A::PORTB),
69            2 => Some(EXTIPSEL0_A::PORTC),
70            3 => Some(EXTIPSEL0_A::PORTD),
71            4 => Some(EXTIPSEL0_A::PORTE),
72            5 => Some(EXTIPSEL0_A::PORTF),
73            _ => None,
74        }
75    }
76    #[doc = "Checks if the value of the field is `PORTA`"]
77    #[inline(always)]
78    pub fn is_porta(&self) -> bool {
79        *self == EXTIPSEL0_A::PORTA
80    }
81    #[doc = "Checks if the value of the field is `PORTB`"]
82    #[inline(always)]
83    pub fn is_portb(&self) -> bool {
84        *self == EXTIPSEL0_A::PORTB
85    }
86    #[doc = "Checks if the value of the field is `PORTC`"]
87    #[inline(always)]
88    pub fn is_portc(&self) -> bool {
89        *self == EXTIPSEL0_A::PORTC
90    }
91    #[doc = "Checks if the value of the field is `PORTD`"]
92    #[inline(always)]
93    pub fn is_portd(&self) -> bool {
94        *self == EXTIPSEL0_A::PORTD
95    }
96    #[doc = "Checks if the value of the field is `PORTE`"]
97    #[inline(always)]
98    pub fn is_porte(&self) -> bool {
99        *self == EXTIPSEL0_A::PORTE
100    }
101    #[doc = "Checks if the value of the field is `PORTF`"]
102    #[inline(always)]
103    pub fn is_portf(&self) -> bool {
104        *self == EXTIPSEL0_A::PORTF
105    }
106}
107#[doc = "Field `EXTIPSEL0` writer - External Interrupt 0 Port Select"]
108pub type EXTIPSEL0_W<'a, const O: u8> =
109    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL0_A, 3, O>;
110impl<'a, const O: u8> EXTIPSEL0_W<'a, O> {
111    #[doc = "Port A pin 0 selected for external interrupt 0"]
112    #[inline(always)]
113    pub fn porta(self) -> &'a mut W {
114        self.variant(EXTIPSEL0_A::PORTA)
115    }
116    #[doc = "Port B pin 0 selected for external interrupt 0"]
117    #[inline(always)]
118    pub fn portb(self) -> &'a mut W {
119        self.variant(EXTIPSEL0_A::PORTB)
120    }
121    #[doc = "Port C pin 0 selected for external interrupt 0"]
122    #[inline(always)]
123    pub fn portc(self) -> &'a mut W {
124        self.variant(EXTIPSEL0_A::PORTC)
125    }
126    #[doc = "Port D pin 0 selected for external interrupt 0"]
127    #[inline(always)]
128    pub fn portd(self) -> &'a mut W {
129        self.variant(EXTIPSEL0_A::PORTD)
130    }
131    #[doc = "Port E pin 0 selected for external interrupt 0"]
132    #[inline(always)]
133    pub fn porte(self) -> &'a mut W {
134        self.variant(EXTIPSEL0_A::PORTE)
135    }
136    #[doc = "Port F pin 0 selected for external interrupt 0"]
137    #[inline(always)]
138    pub fn portf(self) -> &'a mut W {
139        self.variant(EXTIPSEL0_A::PORTF)
140    }
141}
142#[doc = "Field `EXTIPSEL1` reader - External Interrupt 1 Port Select"]
143pub type EXTIPSEL1_R = crate::FieldReader<u8, EXTIPSEL1_A>;
144#[doc = "External Interrupt 1 Port Select\n\nValue on reset: 0"]
145#[derive(Clone, Copy, Debug, PartialEq, Eq)]
146#[repr(u8)]
147pub enum EXTIPSEL1_A {
148    #[doc = "0: Port A pin 1 selected for external interrupt 1"]
149    PORTA = 0,
150    #[doc = "1: Port B pin 1 selected for external interrupt 1"]
151    PORTB = 1,
152    #[doc = "2: Port C pin 1 selected for external interrupt 1"]
153    PORTC = 2,
154    #[doc = "3: Port D pin 1 selected for external interrupt 1"]
155    PORTD = 3,
156    #[doc = "4: Port E pin 1 selected for external interrupt 1"]
157    PORTE = 4,
158    #[doc = "5: Port F pin 1 selected for external interrupt 1"]
159    PORTF = 5,
160}
161impl From<EXTIPSEL1_A> for u8 {
162    #[inline(always)]
163    fn from(variant: EXTIPSEL1_A) -> Self {
164        variant as _
165    }
166}
167impl EXTIPSEL1_R {
168    #[doc = "Get enumerated values variant"]
169    #[inline(always)]
170    pub fn variant(&self) -> Option<EXTIPSEL1_A> {
171        match self.bits {
172            0 => Some(EXTIPSEL1_A::PORTA),
173            1 => Some(EXTIPSEL1_A::PORTB),
174            2 => Some(EXTIPSEL1_A::PORTC),
175            3 => Some(EXTIPSEL1_A::PORTD),
176            4 => Some(EXTIPSEL1_A::PORTE),
177            5 => Some(EXTIPSEL1_A::PORTF),
178            _ => None,
179        }
180    }
181    #[doc = "Checks if the value of the field is `PORTA`"]
182    #[inline(always)]
183    pub fn is_porta(&self) -> bool {
184        *self == EXTIPSEL1_A::PORTA
185    }
186    #[doc = "Checks if the value of the field is `PORTB`"]
187    #[inline(always)]
188    pub fn is_portb(&self) -> bool {
189        *self == EXTIPSEL1_A::PORTB
190    }
191    #[doc = "Checks if the value of the field is `PORTC`"]
192    #[inline(always)]
193    pub fn is_portc(&self) -> bool {
194        *self == EXTIPSEL1_A::PORTC
195    }
196    #[doc = "Checks if the value of the field is `PORTD`"]
197    #[inline(always)]
198    pub fn is_portd(&self) -> bool {
199        *self == EXTIPSEL1_A::PORTD
200    }
201    #[doc = "Checks if the value of the field is `PORTE`"]
202    #[inline(always)]
203    pub fn is_porte(&self) -> bool {
204        *self == EXTIPSEL1_A::PORTE
205    }
206    #[doc = "Checks if the value of the field is `PORTF`"]
207    #[inline(always)]
208    pub fn is_portf(&self) -> bool {
209        *self == EXTIPSEL1_A::PORTF
210    }
211}
212#[doc = "Field `EXTIPSEL1` writer - External Interrupt 1 Port Select"]
213pub type EXTIPSEL1_W<'a, const O: u8> =
214    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL1_A, 3, O>;
215impl<'a, const O: u8> EXTIPSEL1_W<'a, O> {
216    #[doc = "Port A pin 1 selected for external interrupt 1"]
217    #[inline(always)]
218    pub fn porta(self) -> &'a mut W {
219        self.variant(EXTIPSEL1_A::PORTA)
220    }
221    #[doc = "Port B pin 1 selected for external interrupt 1"]
222    #[inline(always)]
223    pub fn portb(self) -> &'a mut W {
224        self.variant(EXTIPSEL1_A::PORTB)
225    }
226    #[doc = "Port C pin 1 selected for external interrupt 1"]
227    #[inline(always)]
228    pub fn portc(self) -> &'a mut W {
229        self.variant(EXTIPSEL1_A::PORTC)
230    }
231    #[doc = "Port D pin 1 selected for external interrupt 1"]
232    #[inline(always)]
233    pub fn portd(self) -> &'a mut W {
234        self.variant(EXTIPSEL1_A::PORTD)
235    }
236    #[doc = "Port E pin 1 selected for external interrupt 1"]
237    #[inline(always)]
238    pub fn porte(self) -> &'a mut W {
239        self.variant(EXTIPSEL1_A::PORTE)
240    }
241    #[doc = "Port F pin 1 selected for external interrupt 1"]
242    #[inline(always)]
243    pub fn portf(self) -> &'a mut W {
244        self.variant(EXTIPSEL1_A::PORTF)
245    }
246}
247#[doc = "Field `EXTIPSEL2` reader - External Interrupt 2 Port Select"]
248pub type EXTIPSEL2_R = crate::FieldReader<u8, EXTIPSEL2_A>;
249#[doc = "External Interrupt 2 Port Select\n\nValue on reset: 0"]
250#[derive(Clone, Copy, Debug, PartialEq, Eq)]
251#[repr(u8)]
252pub enum EXTIPSEL2_A {
253    #[doc = "0: Port A pin 2 selected for external interrupt 2"]
254    PORTA = 0,
255    #[doc = "1: Port B pin 2 selected for external interrupt 2"]
256    PORTB = 1,
257    #[doc = "2: Port C pin 2 selected for external interrupt 2"]
258    PORTC = 2,
259    #[doc = "3: Port D pin 2 selected for external interrupt 2"]
260    PORTD = 3,
261    #[doc = "4: Port E pin 2 selected for external interrupt 2"]
262    PORTE = 4,
263    #[doc = "5: Port F pin 2 selected for external interrupt 2"]
264    PORTF = 5,
265}
266impl From<EXTIPSEL2_A> for u8 {
267    #[inline(always)]
268    fn from(variant: EXTIPSEL2_A) -> Self {
269        variant as _
270    }
271}
272impl EXTIPSEL2_R {
273    #[doc = "Get enumerated values variant"]
274    #[inline(always)]
275    pub fn variant(&self) -> Option<EXTIPSEL2_A> {
276        match self.bits {
277            0 => Some(EXTIPSEL2_A::PORTA),
278            1 => Some(EXTIPSEL2_A::PORTB),
279            2 => Some(EXTIPSEL2_A::PORTC),
280            3 => Some(EXTIPSEL2_A::PORTD),
281            4 => Some(EXTIPSEL2_A::PORTE),
282            5 => Some(EXTIPSEL2_A::PORTF),
283            _ => None,
284        }
285    }
286    #[doc = "Checks if the value of the field is `PORTA`"]
287    #[inline(always)]
288    pub fn is_porta(&self) -> bool {
289        *self == EXTIPSEL2_A::PORTA
290    }
291    #[doc = "Checks if the value of the field is `PORTB`"]
292    #[inline(always)]
293    pub fn is_portb(&self) -> bool {
294        *self == EXTIPSEL2_A::PORTB
295    }
296    #[doc = "Checks if the value of the field is `PORTC`"]
297    #[inline(always)]
298    pub fn is_portc(&self) -> bool {
299        *self == EXTIPSEL2_A::PORTC
300    }
301    #[doc = "Checks if the value of the field is `PORTD`"]
302    #[inline(always)]
303    pub fn is_portd(&self) -> bool {
304        *self == EXTIPSEL2_A::PORTD
305    }
306    #[doc = "Checks if the value of the field is `PORTE`"]
307    #[inline(always)]
308    pub fn is_porte(&self) -> bool {
309        *self == EXTIPSEL2_A::PORTE
310    }
311    #[doc = "Checks if the value of the field is `PORTF`"]
312    #[inline(always)]
313    pub fn is_portf(&self) -> bool {
314        *self == EXTIPSEL2_A::PORTF
315    }
316}
317#[doc = "Field `EXTIPSEL2` writer - External Interrupt 2 Port Select"]
318pub type EXTIPSEL2_W<'a, const O: u8> =
319    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL2_A, 3, O>;
320impl<'a, const O: u8> EXTIPSEL2_W<'a, O> {
321    #[doc = "Port A pin 2 selected for external interrupt 2"]
322    #[inline(always)]
323    pub fn porta(self) -> &'a mut W {
324        self.variant(EXTIPSEL2_A::PORTA)
325    }
326    #[doc = "Port B pin 2 selected for external interrupt 2"]
327    #[inline(always)]
328    pub fn portb(self) -> &'a mut W {
329        self.variant(EXTIPSEL2_A::PORTB)
330    }
331    #[doc = "Port C pin 2 selected for external interrupt 2"]
332    #[inline(always)]
333    pub fn portc(self) -> &'a mut W {
334        self.variant(EXTIPSEL2_A::PORTC)
335    }
336    #[doc = "Port D pin 2 selected for external interrupt 2"]
337    #[inline(always)]
338    pub fn portd(self) -> &'a mut W {
339        self.variant(EXTIPSEL2_A::PORTD)
340    }
341    #[doc = "Port E pin 2 selected for external interrupt 2"]
342    #[inline(always)]
343    pub fn porte(self) -> &'a mut W {
344        self.variant(EXTIPSEL2_A::PORTE)
345    }
346    #[doc = "Port F pin 2 selected for external interrupt 2"]
347    #[inline(always)]
348    pub fn portf(self) -> &'a mut W {
349        self.variant(EXTIPSEL2_A::PORTF)
350    }
351}
352#[doc = "Field `EXTIPSEL3` reader - External Interrupt 3 Port Select"]
353pub type EXTIPSEL3_R = crate::FieldReader<u8, EXTIPSEL3_A>;
354#[doc = "External Interrupt 3 Port Select\n\nValue on reset: 0"]
355#[derive(Clone, Copy, Debug, PartialEq, Eq)]
356#[repr(u8)]
357pub enum EXTIPSEL3_A {
358    #[doc = "0: Port A pin 3 selected for external interrupt 3"]
359    PORTA = 0,
360    #[doc = "1: Port B pin 3 selected for external interrupt 3"]
361    PORTB = 1,
362    #[doc = "2: Port C pin 3 selected for external interrupt 3"]
363    PORTC = 2,
364    #[doc = "3: Port D pin 3 selected for external interrupt 3"]
365    PORTD = 3,
366    #[doc = "4: Port E pin 3 selected for external interrupt 3"]
367    PORTE = 4,
368    #[doc = "5: Port F pin 3 selected for external interrupt 3"]
369    PORTF = 5,
370}
371impl From<EXTIPSEL3_A> for u8 {
372    #[inline(always)]
373    fn from(variant: EXTIPSEL3_A) -> Self {
374        variant as _
375    }
376}
377impl EXTIPSEL3_R {
378    #[doc = "Get enumerated values variant"]
379    #[inline(always)]
380    pub fn variant(&self) -> Option<EXTIPSEL3_A> {
381        match self.bits {
382            0 => Some(EXTIPSEL3_A::PORTA),
383            1 => Some(EXTIPSEL3_A::PORTB),
384            2 => Some(EXTIPSEL3_A::PORTC),
385            3 => Some(EXTIPSEL3_A::PORTD),
386            4 => Some(EXTIPSEL3_A::PORTE),
387            5 => Some(EXTIPSEL3_A::PORTF),
388            _ => None,
389        }
390    }
391    #[doc = "Checks if the value of the field is `PORTA`"]
392    #[inline(always)]
393    pub fn is_porta(&self) -> bool {
394        *self == EXTIPSEL3_A::PORTA
395    }
396    #[doc = "Checks if the value of the field is `PORTB`"]
397    #[inline(always)]
398    pub fn is_portb(&self) -> bool {
399        *self == EXTIPSEL3_A::PORTB
400    }
401    #[doc = "Checks if the value of the field is `PORTC`"]
402    #[inline(always)]
403    pub fn is_portc(&self) -> bool {
404        *self == EXTIPSEL3_A::PORTC
405    }
406    #[doc = "Checks if the value of the field is `PORTD`"]
407    #[inline(always)]
408    pub fn is_portd(&self) -> bool {
409        *self == EXTIPSEL3_A::PORTD
410    }
411    #[doc = "Checks if the value of the field is `PORTE`"]
412    #[inline(always)]
413    pub fn is_porte(&self) -> bool {
414        *self == EXTIPSEL3_A::PORTE
415    }
416    #[doc = "Checks if the value of the field is `PORTF`"]
417    #[inline(always)]
418    pub fn is_portf(&self) -> bool {
419        *self == EXTIPSEL3_A::PORTF
420    }
421}
422#[doc = "Field `EXTIPSEL3` writer - External Interrupt 3 Port Select"]
423pub type EXTIPSEL3_W<'a, const O: u8> =
424    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL3_A, 3, O>;
425impl<'a, const O: u8> EXTIPSEL3_W<'a, O> {
426    #[doc = "Port A pin 3 selected for external interrupt 3"]
427    #[inline(always)]
428    pub fn porta(self) -> &'a mut W {
429        self.variant(EXTIPSEL3_A::PORTA)
430    }
431    #[doc = "Port B pin 3 selected for external interrupt 3"]
432    #[inline(always)]
433    pub fn portb(self) -> &'a mut W {
434        self.variant(EXTIPSEL3_A::PORTB)
435    }
436    #[doc = "Port C pin 3 selected for external interrupt 3"]
437    #[inline(always)]
438    pub fn portc(self) -> &'a mut W {
439        self.variant(EXTIPSEL3_A::PORTC)
440    }
441    #[doc = "Port D pin 3 selected for external interrupt 3"]
442    #[inline(always)]
443    pub fn portd(self) -> &'a mut W {
444        self.variant(EXTIPSEL3_A::PORTD)
445    }
446    #[doc = "Port E pin 3 selected for external interrupt 3"]
447    #[inline(always)]
448    pub fn porte(self) -> &'a mut W {
449        self.variant(EXTIPSEL3_A::PORTE)
450    }
451    #[doc = "Port F pin 3 selected for external interrupt 3"]
452    #[inline(always)]
453    pub fn portf(self) -> &'a mut W {
454        self.variant(EXTIPSEL3_A::PORTF)
455    }
456}
457#[doc = "Field `EXTIPSEL4` reader - External Interrupt 4 Port Select"]
458pub type EXTIPSEL4_R = crate::FieldReader<u8, EXTIPSEL4_A>;
459#[doc = "External Interrupt 4 Port Select\n\nValue on reset: 0"]
460#[derive(Clone, Copy, Debug, PartialEq, Eq)]
461#[repr(u8)]
462pub enum EXTIPSEL4_A {
463    #[doc = "0: Port A pin 4 selected for external interrupt 4"]
464    PORTA = 0,
465    #[doc = "1: Port B pin 4 selected for external interrupt 4"]
466    PORTB = 1,
467    #[doc = "2: Port C pin 4 selected for external interrupt 4"]
468    PORTC = 2,
469    #[doc = "3: Port D pin 4 selected for external interrupt 4"]
470    PORTD = 3,
471    #[doc = "4: Port E pin 4 selected for external interrupt 4"]
472    PORTE = 4,
473    #[doc = "5: Port F pin 4 selected for external interrupt 4"]
474    PORTF = 5,
475}
476impl From<EXTIPSEL4_A> for u8 {
477    #[inline(always)]
478    fn from(variant: EXTIPSEL4_A) -> Self {
479        variant as _
480    }
481}
482impl EXTIPSEL4_R {
483    #[doc = "Get enumerated values variant"]
484    #[inline(always)]
485    pub fn variant(&self) -> Option<EXTIPSEL4_A> {
486        match self.bits {
487            0 => Some(EXTIPSEL4_A::PORTA),
488            1 => Some(EXTIPSEL4_A::PORTB),
489            2 => Some(EXTIPSEL4_A::PORTC),
490            3 => Some(EXTIPSEL4_A::PORTD),
491            4 => Some(EXTIPSEL4_A::PORTE),
492            5 => Some(EXTIPSEL4_A::PORTF),
493            _ => None,
494        }
495    }
496    #[doc = "Checks if the value of the field is `PORTA`"]
497    #[inline(always)]
498    pub fn is_porta(&self) -> bool {
499        *self == EXTIPSEL4_A::PORTA
500    }
501    #[doc = "Checks if the value of the field is `PORTB`"]
502    #[inline(always)]
503    pub fn is_portb(&self) -> bool {
504        *self == EXTIPSEL4_A::PORTB
505    }
506    #[doc = "Checks if the value of the field is `PORTC`"]
507    #[inline(always)]
508    pub fn is_portc(&self) -> bool {
509        *self == EXTIPSEL4_A::PORTC
510    }
511    #[doc = "Checks if the value of the field is `PORTD`"]
512    #[inline(always)]
513    pub fn is_portd(&self) -> bool {
514        *self == EXTIPSEL4_A::PORTD
515    }
516    #[doc = "Checks if the value of the field is `PORTE`"]
517    #[inline(always)]
518    pub fn is_porte(&self) -> bool {
519        *self == EXTIPSEL4_A::PORTE
520    }
521    #[doc = "Checks if the value of the field is `PORTF`"]
522    #[inline(always)]
523    pub fn is_portf(&self) -> bool {
524        *self == EXTIPSEL4_A::PORTF
525    }
526}
527#[doc = "Field `EXTIPSEL4` writer - External Interrupt 4 Port Select"]
528pub type EXTIPSEL4_W<'a, const O: u8> =
529    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL4_A, 3, O>;
530impl<'a, const O: u8> EXTIPSEL4_W<'a, O> {
531    #[doc = "Port A pin 4 selected for external interrupt 4"]
532    #[inline(always)]
533    pub fn porta(self) -> &'a mut W {
534        self.variant(EXTIPSEL4_A::PORTA)
535    }
536    #[doc = "Port B pin 4 selected for external interrupt 4"]
537    #[inline(always)]
538    pub fn portb(self) -> &'a mut W {
539        self.variant(EXTIPSEL4_A::PORTB)
540    }
541    #[doc = "Port C pin 4 selected for external interrupt 4"]
542    #[inline(always)]
543    pub fn portc(self) -> &'a mut W {
544        self.variant(EXTIPSEL4_A::PORTC)
545    }
546    #[doc = "Port D pin 4 selected for external interrupt 4"]
547    #[inline(always)]
548    pub fn portd(self) -> &'a mut W {
549        self.variant(EXTIPSEL4_A::PORTD)
550    }
551    #[doc = "Port E pin 4 selected for external interrupt 4"]
552    #[inline(always)]
553    pub fn porte(self) -> &'a mut W {
554        self.variant(EXTIPSEL4_A::PORTE)
555    }
556    #[doc = "Port F pin 4 selected for external interrupt 4"]
557    #[inline(always)]
558    pub fn portf(self) -> &'a mut W {
559        self.variant(EXTIPSEL4_A::PORTF)
560    }
561}
562#[doc = "Field `EXTIPSEL5` reader - External Interrupt 5 Port Select"]
563pub type EXTIPSEL5_R = crate::FieldReader<u8, EXTIPSEL5_A>;
564#[doc = "External Interrupt 5 Port Select\n\nValue on reset: 0"]
565#[derive(Clone, Copy, Debug, PartialEq, Eq)]
566#[repr(u8)]
567pub enum EXTIPSEL5_A {
568    #[doc = "0: Port A pin 5 selected for external interrupt 5"]
569    PORTA = 0,
570    #[doc = "1: Port B pin 5 selected for external interrupt 5"]
571    PORTB = 1,
572    #[doc = "2: Port C pin 5 selected for external interrupt 5"]
573    PORTC = 2,
574    #[doc = "3: Port D pin 5 selected for external interrupt 5"]
575    PORTD = 3,
576    #[doc = "4: Port E pin 5 selected for external interrupt 5"]
577    PORTE = 4,
578    #[doc = "5: Port F pin 5 selected for external interrupt 5"]
579    PORTF = 5,
580}
581impl From<EXTIPSEL5_A> for u8 {
582    #[inline(always)]
583    fn from(variant: EXTIPSEL5_A) -> Self {
584        variant as _
585    }
586}
587impl EXTIPSEL5_R {
588    #[doc = "Get enumerated values variant"]
589    #[inline(always)]
590    pub fn variant(&self) -> Option<EXTIPSEL5_A> {
591        match self.bits {
592            0 => Some(EXTIPSEL5_A::PORTA),
593            1 => Some(EXTIPSEL5_A::PORTB),
594            2 => Some(EXTIPSEL5_A::PORTC),
595            3 => Some(EXTIPSEL5_A::PORTD),
596            4 => Some(EXTIPSEL5_A::PORTE),
597            5 => Some(EXTIPSEL5_A::PORTF),
598            _ => None,
599        }
600    }
601    #[doc = "Checks if the value of the field is `PORTA`"]
602    #[inline(always)]
603    pub fn is_porta(&self) -> bool {
604        *self == EXTIPSEL5_A::PORTA
605    }
606    #[doc = "Checks if the value of the field is `PORTB`"]
607    #[inline(always)]
608    pub fn is_portb(&self) -> bool {
609        *self == EXTIPSEL5_A::PORTB
610    }
611    #[doc = "Checks if the value of the field is `PORTC`"]
612    #[inline(always)]
613    pub fn is_portc(&self) -> bool {
614        *self == EXTIPSEL5_A::PORTC
615    }
616    #[doc = "Checks if the value of the field is `PORTD`"]
617    #[inline(always)]
618    pub fn is_portd(&self) -> bool {
619        *self == EXTIPSEL5_A::PORTD
620    }
621    #[doc = "Checks if the value of the field is `PORTE`"]
622    #[inline(always)]
623    pub fn is_porte(&self) -> bool {
624        *self == EXTIPSEL5_A::PORTE
625    }
626    #[doc = "Checks if the value of the field is `PORTF`"]
627    #[inline(always)]
628    pub fn is_portf(&self) -> bool {
629        *self == EXTIPSEL5_A::PORTF
630    }
631}
632#[doc = "Field `EXTIPSEL5` writer - External Interrupt 5 Port Select"]
633pub type EXTIPSEL5_W<'a, const O: u8> =
634    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL5_A, 3, O>;
635impl<'a, const O: u8> EXTIPSEL5_W<'a, O> {
636    #[doc = "Port A pin 5 selected for external interrupt 5"]
637    #[inline(always)]
638    pub fn porta(self) -> &'a mut W {
639        self.variant(EXTIPSEL5_A::PORTA)
640    }
641    #[doc = "Port B pin 5 selected for external interrupt 5"]
642    #[inline(always)]
643    pub fn portb(self) -> &'a mut W {
644        self.variant(EXTIPSEL5_A::PORTB)
645    }
646    #[doc = "Port C pin 5 selected for external interrupt 5"]
647    #[inline(always)]
648    pub fn portc(self) -> &'a mut W {
649        self.variant(EXTIPSEL5_A::PORTC)
650    }
651    #[doc = "Port D pin 5 selected for external interrupt 5"]
652    #[inline(always)]
653    pub fn portd(self) -> &'a mut W {
654        self.variant(EXTIPSEL5_A::PORTD)
655    }
656    #[doc = "Port E pin 5 selected for external interrupt 5"]
657    #[inline(always)]
658    pub fn porte(self) -> &'a mut W {
659        self.variant(EXTIPSEL5_A::PORTE)
660    }
661    #[doc = "Port F pin 5 selected for external interrupt 5"]
662    #[inline(always)]
663    pub fn portf(self) -> &'a mut W {
664        self.variant(EXTIPSEL5_A::PORTF)
665    }
666}
667#[doc = "Field `EXTIPSEL6` reader - External Interrupt 6 Port Select"]
668pub type EXTIPSEL6_R = crate::FieldReader<u8, EXTIPSEL6_A>;
669#[doc = "External Interrupt 6 Port Select\n\nValue on reset: 0"]
670#[derive(Clone, Copy, Debug, PartialEq, Eq)]
671#[repr(u8)]
672pub enum EXTIPSEL6_A {
673    #[doc = "0: Port A pin 6 selected for external interrupt 6"]
674    PORTA = 0,
675    #[doc = "1: Port B pin 6 selected for external interrupt 6"]
676    PORTB = 1,
677    #[doc = "2: Port C pin 6 selected for external interrupt 6"]
678    PORTC = 2,
679    #[doc = "3: Port D pin 6 selected for external interrupt 6"]
680    PORTD = 3,
681    #[doc = "4: Port E pin 6 selected for external interrupt 6"]
682    PORTE = 4,
683    #[doc = "5: Port F pin 6 selected for external interrupt 6"]
684    PORTF = 5,
685}
686impl From<EXTIPSEL6_A> for u8 {
687    #[inline(always)]
688    fn from(variant: EXTIPSEL6_A) -> Self {
689        variant as _
690    }
691}
692impl EXTIPSEL6_R {
693    #[doc = "Get enumerated values variant"]
694    #[inline(always)]
695    pub fn variant(&self) -> Option<EXTIPSEL6_A> {
696        match self.bits {
697            0 => Some(EXTIPSEL6_A::PORTA),
698            1 => Some(EXTIPSEL6_A::PORTB),
699            2 => Some(EXTIPSEL6_A::PORTC),
700            3 => Some(EXTIPSEL6_A::PORTD),
701            4 => Some(EXTIPSEL6_A::PORTE),
702            5 => Some(EXTIPSEL6_A::PORTF),
703            _ => None,
704        }
705    }
706    #[doc = "Checks if the value of the field is `PORTA`"]
707    #[inline(always)]
708    pub fn is_porta(&self) -> bool {
709        *self == EXTIPSEL6_A::PORTA
710    }
711    #[doc = "Checks if the value of the field is `PORTB`"]
712    #[inline(always)]
713    pub fn is_portb(&self) -> bool {
714        *self == EXTIPSEL6_A::PORTB
715    }
716    #[doc = "Checks if the value of the field is `PORTC`"]
717    #[inline(always)]
718    pub fn is_portc(&self) -> bool {
719        *self == EXTIPSEL6_A::PORTC
720    }
721    #[doc = "Checks if the value of the field is `PORTD`"]
722    #[inline(always)]
723    pub fn is_portd(&self) -> bool {
724        *self == EXTIPSEL6_A::PORTD
725    }
726    #[doc = "Checks if the value of the field is `PORTE`"]
727    #[inline(always)]
728    pub fn is_porte(&self) -> bool {
729        *self == EXTIPSEL6_A::PORTE
730    }
731    #[doc = "Checks if the value of the field is `PORTF`"]
732    #[inline(always)]
733    pub fn is_portf(&self) -> bool {
734        *self == EXTIPSEL6_A::PORTF
735    }
736}
737#[doc = "Field `EXTIPSEL6` writer - External Interrupt 6 Port Select"]
738pub type EXTIPSEL6_W<'a, const O: u8> =
739    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL6_A, 3, O>;
740impl<'a, const O: u8> EXTIPSEL6_W<'a, O> {
741    #[doc = "Port A pin 6 selected for external interrupt 6"]
742    #[inline(always)]
743    pub fn porta(self) -> &'a mut W {
744        self.variant(EXTIPSEL6_A::PORTA)
745    }
746    #[doc = "Port B pin 6 selected for external interrupt 6"]
747    #[inline(always)]
748    pub fn portb(self) -> &'a mut W {
749        self.variant(EXTIPSEL6_A::PORTB)
750    }
751    #[doc = "Port C pin 6 selected for external interrupt 6"]
752    #[inline(always)]
753    pub fn portc(self) -> &'a mut W {
754        self.variant(EXTIPSEL6_A::PORTC)
755    }
756    #[doc = "Port D pin 6 selected for external interrupt 6"]
757    #[inline(always)]
758    pub fn portd(self) -> &'a mut W {
759        self.variant(EXTIPSEL6_A::PORTD)
760    }
761    #[doc = "Port E pin 6 selected for external interrupt 6"]
762    #[inline(always)]
763    pub fn porte(self) -> &'a mut W {
764        self.variant(EXTIPSEL6_A::PORTE)
765    }
766    #[doc = "Port F pin 6 selected for external interrupt 6"]
767    #[inline(always)]
768    pub fn portf(self) -> &'a mut W {
769        self.variant(EXTIPSEL6_A::PORTF)
770    }
771}
772#[doc = "Field `EXTIPSEL7` reader - External Interrupt 7 Port Select"]
773pub type EXTIPSEL7_R = crate::FieldReader<u8, EXTIPSEL7_A>;
774#[doc = "External Interrupt 7 Port Select\n\nValue on reset: 0"]
775#[derive(Clone, Copy, Debug, PartialEq, Eq)]
776#[repr(u8)]
777pub enum EXTIPSEL7_A {
778    #[doc = "0: Port A pin 7 selected for external interrupt 7"]
779    PORTA = 0,
780    #[doc = "1: Port B pin 7 selected for external interrupt 7"]
781    PORTB = 1,
782    #[doc = "2: Port C pin 7 selected for external interrupt 7"]
783    PORTC = 2,
784    #[doc = "3: Port D pin 7 selected for external interrupt 7"]
785    PORTD = 3,
786    #[doc = "4: Port E pin 7 selected for external interrupt 7"]
787    PORTE = 4,
788    #[doc = "5: Port F pin 7 selected for external interrupt 7"]
789    PORTF = 5,
790}
791impl From<EXTIPSEL7_A> for u8 {
792    #[inline(always)]
793    fn from(variant: EXTIPSEL7_A) -> Self {
794        variant as _
795    }
796}
797impl EXTIPSEL7_R {
798    #[doc = "Get enumerated values variant"]
799    #[inline(always)]
800    pub fn variant(&self) -> Option<EXTIPSEL7_A> {
801        match self.bits {
802            0 => Some(EXTIPSEL7_A::PORTA),
803            1 => Some(EXTIPSEL7_A::PORTB),
804            2 => Some(EXTIPSEL7_A::PORTC),
805            3 => Some(EXTIPSEL7_A::PORTD),
806            4 => Some(EXTIPSEL7_A::PORTE),
807            5 => Some(EXTIPSEL7_A::PORTF),
808            _ => None,
809        }
810    }
811    #[doc = "Checks if the value of the field is `PORTA`"]
812    #[inline(always)]
813    pub fn is_porta(&self) -> bool {
814        *self == EXTIPSEL7_A::PORTA
815    }
816    #[doc = "Checks if the value of the field is `PORTB`"]
817    #[inline(always)]
818    pub fn is_portb(&self) -> bool {
819        *self == EXTIPSEL7_A::PORTB
820    }
821    #[doc = "Checks if the value of the field is `PORTC`"]
822    #[inline(always)]
823    pub fn is_portc(&self) -> bool {
824        *self == EXTIPSEL7_A::PORTC
825    }
826    #[doc = "Checks if the value of the field is `PORTD`"]
827    #[inline(always)]
828    pub fn is_portd(&self) -> bool {
829        *self == EXTIPSEL7_A::PORTD
830    }
831    #[doc = "Checks if the value of the field is `PORTE`"]
832    #[inline(always)]
833    pub fn is_porte(&self) -> bool {
834        *self == EXTIPSEL7_A::PORTE
835    }
836    #[doc = "Checks if the value of the field is `PORTF`"]
837    #[inline(always)]
838    pub fn is_portf(&self) -> bool {
839        *self == EXTIPSEL7_A::PORTF
840    }
841}
842#[doc = "Field `EXTIPSEL7` writer - External Interrupt 7 Port Select"]
843pub type EXTIPSEL7_W<'a, const O: u8> =
844    crate::FieldWriter<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL7_A, 3, O>;
845impl<'a, const O: u8> EXTIPSEL7_W<'a, O> {
846    #[doc = "Port A pin 7 selected for external interrupt 7"]
847    #[inline(always)]
848    pub fn porta(self) -> &'a mut W {
849        self.variant(EXTIPSEL7_A::PORTA)
850    }
851    #[doc = "Port B pin 7 selected for external interrupt 7"]
852    #[inline(always)]
853    pub fn portb(self) -> &'a mut W {
854        self.variant(EXTIPSEL7_A::PORTB)
855    }
856    #[doc = "Port C pin 7 selected for external interrupt 7"]
857    #[inline(always)]
858    pub fn portc(self) -> &'a mut W {
859        self.variant(EXTIPSEL7_A::PORTC)
860    }
861    #[doc = "Port D pin 7 selected for external interrupt 7"]
862    #[inline(always)]
863    pub fn portd(self) -> &'a mut W {
864        self.variant(EXTIPSEL7_A::PORTD)
865    }
866    #[doc = "Port E pin 7 selected for external interrupt 7"]
867    #[inline(always)]
868    pub fn porte(self) -> &'a mut W {
869        self.variant(EXTIPSEL7_A::PORTE)
870    }
871    #[doc = "Port F pin 7 selected for external interrupt 7"]
872    #[inline(always)]
873    pub fn portf(self) -> &'a mut W {
874        self.variant(EXTIPSEL7_A::PORTF)
875    }
876}
877impl R {
878    #[doc = "Bits 0:2 - External Interrupt 0 Port Select"]
879    #[inline(always)]
880    pub fn extipsel0(&self) -> EXTIPSEL0_R {
881        EXTIPSEL0_R::new((self.bits & 7) as u8)
882    }
883    #[doc = "Bits 4:6 - External Interrupt 1 Port Select"]
884    #[inline(always)]
885    pub fn extipsel1(&self) -> EXTIPSEL1_R {
886        EXTIPSEL1_R::new(((self.bits >> 4) & 7) as u8)
887    }
888    #[doc = "Bits 8:10 - External Interrupt 2 Port Select"]
889    #[inline(always)]
890    pub fn extipsel2(&self) -> EXTIPSEL2_R {
891        EXTIPSEL2_R::new(((self.bits >> 8) & 7) as u8)
892    }
893    #[doc = "Bits 12:14 - External Interrupt 3 Port Select"]
894    #[inline(always)]
895    pub fn extipsel3(&self) -> EXTIPSEL3_R {
896        EXTIPSEL3_R::new(((self.bits >> 12) & 7) as u8)
897    }
898    #[doc = "Bits 16:18 - External Interrupt 4 Port Select"]
899    #[inline(always)]
900    pub fn extipsel4(&self) -> EXTIPSEL4_R {
901        EXTIPSEL4_R::new(((self.bits >> 16) & 7) as u8)
902    }
903    #[doc = "Bits 20:22 - External Interrupt 5 Port Select"]
904    #[inline(always)]
905    pub fn extipsel5(&self) -> EXTIPSEL5_R {
906        EXTIPSEL5_R::new(((self.bits >> 20) & 7) as u8)
907    }
908    #[doc = "Bits 24:26 - External Interrupt 6 Port Select"]
909    #[inline(always)]
910    pub fn extipsel6(&self) -> EXTIPSEL6_R {
911        EXTIPSEL6_R::new(((self.bits >> 24) & 7) as u8)
912    }
913    #[doc = "Bits 28:30 - External Interrupt 7 Port Select"]
914    #[inline(always)]
915    pub fn extipsel7(&self) -> EXTIPSEL7_R {
916        EXTIPSEL7_R::new(((self.bits >> 28) & 7) as u8)
917    }
918}
919impl W {
920    #[doc = "Bits 0:2 - External Interrupt 0 Port Select"]
921    #[inline(always)]
922    #[must_use]
923    pub fn extipsel0(&mut self) -> EXTIPSEL0_W<0> {
924        EXTIPSEL0_W::new(self)
925    }
926    #[doc = "Bits 4:6 - External Interrupt 1 Port Select"]
927    #[inline(always)]
928    #[must_use]
929    pub fn extipsel1(&mut self) -> EXTIPSEL1_W<4> {
930        EXTIPSEL1_W::new(self)
931    }
932    #[doc = "Bits 8:10 - External Interrupt 2 Port Select"]
933    #[inline(always)]
934    #[must_use]
935    pub fn extipsel2(&mut self) -> EXTIPSEL2_W<8> {
936        EXTIPSEL2_W::new(self)
937    }
938    #[doc = "Bits 12:14 - External Interrupt 3 Port Select"]
939    #[inline(always)]
940    #[must_use]
941    pub fn extipsel3(&mut self) -> EXTIPSEL3_W<12> {
942        EXTIPSEL3_W::new(self)
943    }
944    #[doc = "Bits 16:18 - External Interrupt 4 Port Select"]
945    #[inline(always)]
946    #[must_use]
947    pub fn extipsel4(&mut self) -> EXTIPSEL4_W<16> {
948        EXTIPSEL4_W::new(self)
949    }
950    #[doc = "Bits 20:22 - External Interrupt 5 Port Select"]
951    #[inline(always)]
952    #[must_use]
953    pub fn extipsel5(&mut self) -> EXTIPSEL5_W<20> {
954        EXTIPSEL5_W::new(self)
955    }
956    #[doc = "Bits 24:26 - External Interrupt 6 Port Select"]
957    #[inline(always)]
958    #[must_use]
959    pub fn extipsel6(&mut self) -> EXTIPSEL6_W<24> {
960        EXTIPSEL6_W::new(self)
961    }
962    #[doc = "Bits 28:30 - External Interrupt 7 Port Select"]
963    #[inline(always)]
964    #[must_use]
965    pub fn extipsel7(&mut self) -> EXTIPSEL7_W<28> {
966        EXTIPSEL7_W::new(self)
967    }
968    #[doc = "Writes raw bits to the register."]
969    #[inline(always)]
970    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
971        self.0.bits(bits);
972        self
973    }
974}
975#[doc = "External Interrupt Port Select Low Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipsell](index.html) module"]
976pub struct EXTIPSELL_SPEC;
977impl crate::RegisterSpec for EXTIPSELL_SPEC {
978    type Ux = u32;
979}
980#[doc = "`read()` method returns [extipsell::R](R) reader structure"]
981impl crate::Readable for EXTIPSELL_SPEC {
982    type Reader = R;
983}
984#[doc = "`write(|w| ..)` method takes [extipsell::W](W) writer structure"]
985impl crate::Writable for EXTIPSELL_SPEC {
986    type Writer = W;
987    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
988    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
989}
990#[doc = "`reset()` method sets EXTIPSELL to value 0"]
991impl crate::Resettable for EXTIPSELL_SPEC {
992    const RESET_VALUE: Self::Ux = 0;
993}
efm32gg_pac/efm32gg230/gpio/extipsell.rs

efm32gg_pac/efm32gg230/gpio/
extipsell.rs
