efm32gg_pac/efm32gg230/dma/
ch7_ctrl.rs

1#[doc = "Register `CH7_CTRL` reader"]
2pub struct R(crate::R<CH7_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH7_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH7_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH7_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH7_CTRL` writer"]
17pub struct W(crate::W<CH7_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH7_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH7_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH7_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SIGSEL` reader - Signal Select"]
38pub type SIGSEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SIGSEL` writer - Signal Select"]
40pub type SIGSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, u8, 4, O>;
41#[doc = "Field `SOURCESEL` reader - Source Select"]
42pub type SOURCESEL_R = crate::FieldReader<u8, SOURCESEL_A>;
43#[doc = "Source Select\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum SOURCESEL_A {
47    #[doc = "0: No source selected"]
48    NONE = 0,
49    #[doc = "8: Analog to Digital Converter 0"]
50    ADC0 = 8,
51    #[doc = "10: Digital to Analog Converter 0"]
52    DAC0 = 10,
53    #[doc = "12: Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
54    USART0 = 12,
55    #[doc = "13: Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
56    USART1 = 13,
57    #[doc = "14: Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
58    USART2 = 14,
59    #[doc = "16: Low Energy UART 0"]
60    LEUART0 = 16,
61    #[doc = "17: Low Energy UART 1"]
62    LEUART1 = 17,
63    #[doc = "20: I2C 0"]
64    I2C0 = 20,
65    #[doc = "21: I2C 1"]
66    I2C1 = 21,
67    #[doc = "24: Timer 0"]
68    TIMER0 = 24,
69    #[doc = "25: Timer 1"]
70    TIMER1 = 25,
71    #[doc = "26: Timer 2"]
72    TIMER2 = 26,
73    #[doc = "27: Timer 3"]
74    TIMER3 = 27,
75    #[doc = "48: `110000`"]
76    MSC = 48,
77    #[doc = "49: Advanced Encryption Standard Accelerator"]
78    AES = 49,
79    #[doc = "50: Low Energy Sensor Interface"]
80    LESENSE = 50,
81}
82impl From<SOURCESEL_A> for u8 {
83    #[inline(always)]
84    fn from(variant: SOURCESEL_A) -> Self {
85        variant as _
86    }
87}
88impl SOURCESEL_R {
89    #[doc = "Get enumerated values variant"]
90    #[inline(always)]
91    pub fn variant(&self) -> Option<SOURCESEL_A> {
92        match self.bits {
93            0 => Some(SOURCESEL_A::NONE),
94            8 => Some(SOURCESEL_A::ADC0),
95            10 => Some(SOURCESEL_A::DAC0),
96            12 => Some(SOURCESEL_A::USART0),
97            13 => Some(SOURCESEL_A::USART1),
98            14 => Some(SOURCESEL_A::USART2),
99            16 => Some(SOURCESEL_A::LEUART0),
100            17 => Some(SOURCESEL_A::LEUART1),
101            20 => Some(SOURCESEL_A::I2C0),
102            21 => Some(SOURCESEL_A::I2C1),
103            24 => Some(SOURCESEL_A::TIMER0),
104            25 => Some(SOURCESEL_A::TIMER1),
105            26 => Some(SOURCESEL_A::TIMER2),
106            27 => Some(SOURCESEL_A::TIMER3),
107            48 => Some(SOURCESEL_A::MSC),
108            49 => Some(SOURCESEL_A::AES),
109            50 => Some(SOURCESEL_A::LESENSE),
110            _ => None,
111        }
112    }
113    #[doc = "Checks if the value of the field is `NONE`"]
114    #[inline(always)]
115    pub fn is_none(&self) -> bool {
116        *self == SOURCESEL_A::NONE
117    }
118    #[doc = "Checks if the value of the field is `ADC0`"]
119    #[inline(always)]
120    pub fn is_adc0(&self) -> bool {
121        *self == SOURCESEL_A::ADC0
122    }
123    #[doc = "Checks if the value of the field is `DAC0`"]
124    #[inline(always)]
125    pub fn is_dac0(&self) -> bool {
126        *self == SOURCESEL_A::DAC0
127    }
128    #[doc = "Checks if the value of the field is `USART0`"]
129    #[inline(always)]
130    pub fn is_usart0(&self) -> bool {
131        *self == SOURCESEL_A::USART0
132    }
133    #[doc = "Checks if the value of the field is `USART1`"]
134    #[inline(always)]
135    pub fn is_usart1(&self) -> bool {
136        *self == SOURCESEL_A::USART1
137    }
138    #[doc = "Checks if the value of the field is `USART2`"]
139    #[inline(always)]
140    pub fn is_usart2(&self) -> bool {
141        *self == SOURCESEL_A::USART2
142    }
143    #[doc = "Checks if the value of the field is `LEUART0`"]
144    #[inline(always)]
145    pub fn is_leuart0(&self) -> bool {
146        *self == SOURCESEL_A::LEUART0
147    }
148    #[doc = "Checks if the value of the field is `LEUART1`"]
149    #[inline(always)]
150    pub fn is_leuart1(&self) -> bool {
151        *self == SOURCESEL_A::LEUART1
152    }
153    #[doc = "Checks if the value of the field is `I2C0`"]
154    #[inline(always)]
155    pub fn is_i2c0(&self) -> bool {
156        *self == SOURCESEL_A::I2C0
157    }
158    #[doc = "Checks if the value of the field is `I2C1`"]
159    #[inline(always)]
160    pub fn is_i2c1(&self) -> bool {
161        *self == SOURCESEL_A::I2C1
162    }
163    #[doc = "Checks if the value of the field is `TIMER0`"]
164    #[inline(always)]
165    pub fn is_timer0(&self) -> bool {
166        *self == SOURCESEL_A::TIMER0
167    }
168    #[doc = "Checks if the value of the field is `TIMER1`"]
169    #[inline(always)]
170    pub fn is_timer1(&self) -> bool {
171        *self == SOURCESEL_A::TIMER1
172    }
173    #[doc = "Checks if the value of the field is `TIMER2`"]
174    #[inline(always)]
175    pub fn is_timer2(&self) -> bool {
176        *self == SOURCESEL_A::TIMER2
177    }
178    #[doc = "Checks if the value of the field is `TIMER3`"]
179    #[inline(always)]
180    pub fn is_timer3(&self) -> bool {
181        *self == SOURCESEL_A::TIMER3
182    }
183    #[doc = "Checks if the value of the field is `MSC`"]
184    #[inline(always)]
185    pub fn is_msc(&self) -> bool {
186        *self == SOURCESEL_A::MSC
187    }
188    #[doc = "Checks if the value of the field is `AES`"]
189    #[inline(always)]
190    pub fn is_aes(&self) -> bool {
191        *self == SOURCESEL_A::AES
192    }
193    #[doc = "Checks if the value of the field is `LESENSE`"]
194    #[inline(always)]
195    pub fn is_lesense(&self) -> bool {
196        *self == SOURCESEL_A::LESENSE
197    }
198}
199#[doc = "Field `SOURCESEL` writer - Source Select"]
200pub type SOURCESEL_W<'a, const O: u8> =
201    crate::FieldWriter<'a, u32, CH7_CTRL_SPEC, u8, SOURCESEL_A, 6, O>;
202impl<'a, const O: u8> SOURCESEL_W<'a, O> {
203    #[doc = "No source selected"]
204    #[inline(always)]
205    pub fn none(self) -> &'a mut W {
206        self.variant(SOURCESEL_A::NONE)
207    }
208    #[doc = "Analog to Digital Converter 0"]
209    #[inline(always)]
210    pub fn adc0(self) -> &'a mut W {
211        self.variant(SOURCESEL_A::ADC0)
212    }
213    #[doc = "Digital to Analog Converter 0"]
214    #[inline(always)]
215    pub fn dac0(self) -> &'a mut W {
216        self.variant(SOURCESEL_A::DAC0)
217    }
218    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
219    #[inline(always)]
220    pub fn usart0(self) -> &'a mut W {
221        self.variant(SOURCESEL_A::USART0)
222    }
223    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
224    #[inline(always)]
225    pub fn usart1(self) -> &'a mut W {
226        self.variant(SOURCESEL_A::USART1)
227    }
228    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
229    #[inline(always)]
230    pub fn usart2(self) -> &'a mut W {
231        self.variant(SOURCESEL_A::USART2)
232    }
233    #[doc = "Low Energy UART 0"]
234    #[inline(always)]
235    pub fn leuart0(self) -> &'a mut W {
236        self.variant(SOURCESEL_A::LEUART0)
237    }
238    #[doc = "Low Energy UART 1"]
239    #[inline(always)]
240    pub fn leuart1(self) -> &'a mut W {
241        self.variant(SOURCESEL_A::LEUART1)
242    }
243    #[doc = "I2C 0"]
244    #[inline(always)]
245    pub fn i2c0(self) -> &'a mut W {
246        self.variant(SOURCESEL_A::I2C0)
247    }
248    #[doc = "I2C 1"]
249    #[inline(always)]
250    pub fn i2c1(self) -> &'a mut W {
251        self.variant(SOURCESEL_A::I2C1)
252    }
253    #[doc = "Timer 0"]
254    #[inline(always)]
255    pub fn timer0(self) -> &'a mut W {
256        self.variant(SOURCESEL_A::TIMER0)
257    }
258    #[doc = "Timer 1"]
259    #[inline(always)]
260    pub fn timer1(self) -> &'a mut W {
261        self.variant(SOURCESEL_A::TIMER1)
262    }
263    #[doc = "Timer 2"]
264    #[inline(always)]
265    pub fn timer2(self) -> &'a mut W {
266        self.variant(SOURCESEL_A::TIMER2)
267    }
268    #[doc = "Timer 3"]
269    #[inline(always)]
270    pub fn timer3(self) -> &'a mut W {
271        self.variant(SOURCESEL_A::TIMER3)
272    }
273    #[doc = "`110000`"]
274    #[inline(always)]
275    pub fn msc(self) -> &'a mut W {
276        self.variant(SOURCESEL_A::MSC)
277    }
278    #[doc = "Advanced Encryption Standard Accelerator"]
279    #[inline(always)]
280    pub fn aes(self) -> &'a mut W {
281        self.variant(SOURCESEL_A::AES)
282    }
283    #[doc = "Low Energy Sensor Interface"]
284    #[inline(always)]
285    pub fn lesense(self) -> &'a mut W {
286        self.variant(SOURCESEL_A::LESENSE)
287    }
288}
289impl R {
290    #[doc = "Bits 0:3 - Signal Select"]
291    #[inline(always)]
292    pub fn sigsel(&self) -> SIGSEL_R {
293        SIGSEL_R::new((self.bits & 0x0f) as u8)
294    }
295    #[doc = "Bits 16:21 - Source Select"]
296    #[inline(always)]
297    pub fn sourcesel(&self) -> SOURCESEL_R {
298        SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8)
299    }
300}
301impl W {
302    #[doc = "Bits 0:3 - Signal Select"]
303    #[inline(always)]
304    #[must_use]
305    pub fn sigsel(&mut self) -> SIGSEL_W<0> {
306        SIGSEL_W::new(self)
307    }
308    #[doc = "Bits 16:21 - Source Select"]
309    #[inline(always)]
310    #[must_use]
311    pub fn sourcesel(&mut self) -> SOURCESEL_W<16> {
312        SOURCESEL_W::new(self)
313    }
314    #[doc = "Writes raw bits to the register."]
315    #[inline(always)]
316    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
317        self.0.bits(bits);
318        self
319    }
320}
321#[doc = "Channel Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch7_ctrl](index.html) module"]
322pub struct CH7_CTRL_SPEC;
323impl crate::RegisterSpec for CH7_CTRL_SPEC {
324    type Ux = u32;
325}
326#[doc = "`read()` method returns [ch7_ctrl::R](R) reader structure"]
327impl crate::Readable for CH7_CTRL_SPEC {
328    type Reader = R;
329}
330#[doc = "`write(|w| ..)` method takes [ch7_ctrl::W](W) writer structure"]
331impl crate::Writable for CH7_CTRL_SPEC {
332    type Writer = W;
333    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
334    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
335}
336#[doc = "`reset()` method sets CH7_CTRL to value 0"]
337impl crate::Resettable for CH7_CTRL_SPEC {
338    const RESET_VALUE: Self::Ux = 0;
339}
efm32gg_pac/efm32gg230/dma/ch7_ctrl.rs

efm32gg_pac/efm32gg230/dma/
ch7_ctrl.rs
