efm32gg_pac/efm32gg230/cmu/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `HFRCORDY` writer - HFRCO Ready Interrupt Flag Clear"]
23pub type HFRCORDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
24#[doc = "Field `HFXORDY` writer - HFXO Ready Interrupt Flag Clear"]
25pub type HFXORDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
26#[doc = "Field `LFRCORDY` writer - LFRCO Ready Interrupt Flag Clear"]
27pub type LFRCORDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
28#[doc = "Field `LFXORDY` writer - LFXO Ready Interrupt Flag Clear"]
29pub type LFXORDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
30#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCO Ready Interrupt Flag Clear"]
31pub type AUXHFRCORDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
32#[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Flag Clear"]
33pub type CALRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
34#[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Flag Clear"]
35pub type CALOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
36impl W {
37    #[doc = "Bit 0 - HFRCO Ready Interrupt Flag Clear"]
38    #[inline(always)]
39    #[must_use]
40    pub fn hfrcordy(&mut self) -> HFRCORDY_W<0> {
41        HFRCORDY_W::new(self)
42    }
43    #[doc = "Bit 1 - HFXO Ready Interrupt Flag Clear"]
44    #[inline(always)]
45    #[must_use]
46    pub fn hfxordy(&mut self) -> HFXORDY_W<1> {
47        HFXORDY_W::new(self)
48    }
49    #[doc = "Bit 2 - LFRCO Ready Interrupt Flag Clear"]
50    #[inline(always)]
51    #[must_use]
52    pub fn lfrcordy(&mut self) -> LFRCORDY_W<2> {
53        LFRCORDY_W::new(self)
54    }
55    #[doc = "Bit 3 - LFXO Ready Interrupt Flag Clear"]
56    #[inline(always)]
57    #[must_use]
58    pub fn lfxordy(&mut self) -> LFXORDY_W<3> {
59        LFXORDY_W::new(self)
60    }
61    #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Flag Clear"]
62    #[inline(always)]
63    #[must_use]
64    pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W<4> {
65        AUXHFRCORDY_W::new(self)
66    }
67    #[doc = "Bit 5 - Calibration Ready Interrupt Flag Clear"]
68    #[inline(always)]
69    #[must_use]
70    pub fn calrdy(&mut self) -> CALRDY_W<5> {
71        CALRDY_W::new(self)
72    }
73    #[doc = "Bit 6 - Calibration Overflow Interrupt Flag Clear"]
74    #[inline(always)]
75    #[must_use]
76    pub fn calof(&mut self) -> CALOF_W<6> {
77        CALOF_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
87pub struct IFC_SPEC;
88impl crate::RegisterSpec for IFC_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
92impl crate::Writable for IFC_SPEC {
93    type Writer = W;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
96}
97#[doc = "`reset()` method sets IFC to value 0"]
98impl crate::Resettable for IFC_SPEC {
99    const RESET_VALUE: Self::Ux = 0;
100}
efm32gg_pac/efm32gg230/cmu/ifc.rs

efm32gg_pac/efm32gg230/cmu/
ifc.rs
