efm32gg_pac/efm32gg995/ebi/
rdtiming3.rs1#[doc = "Register `RDTIMING3` reader"]
2pub struct R(crate::R<RDTIMING3_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RDTIMING3_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RDTIMING3_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RDTIMING3_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `RDTIMING3` writer"]
17pub struct W(crate::W<RDTIMING3_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RDTIMING3_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RDTIMING3_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RDTIMING3_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RDSETUP` reader - Read Setup Time"]
38pub type RDSETUP_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `RDSETUP` writer - Read Setup Time"]
40pub type RDSETUP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RDTIMING3_SPEC, u8, u8, 2, O>;
41#[doc = "Field `RDSTRB` reader - Read Strobe Time"]
42pub type RDSTRB_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `RDSTRB` writer - Read Strobe Time"]
44pub type RDSTRB_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RDTIMING3_SPEC, u8, u8, 6, O>;
45#[doc = "Field `RDHOLD` reader - Read Hold Time"]
46pub type RDHOLD_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `RDHOLD` writer - Read Hold Time"]
48pub type RDHOLD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RDTIMING3_SPEC, u8, u8, 2, O>;
49#[doc = "Field `HALFRE` reader - Half Cycle REn Strobe Duration Enable"]
50pub type HALFRE_R = crate::BitReader<bool>;
51#[doc = "Field `HALFRE` writer - Half Cycle REn Strobe Duration Enable"]
52pub type HALFRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDTIMING3_SPEC, bool, O>;
53#[doc = "Field `PREFETCH` reader - Prefetch Enable"]
54pub type PREFETCH_R = crate::BitReader<bool>;
55#[doc = "Field `PREFETCH` writer - Prefetch Enable"]
56pub type PREFETCH_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDTIMING3_SPEC, bool, O>;
57#[doc = "Field `PAGEMODE` reader - Page Mode Access Enable"]
58pub type PAGEMODE_R = crate::BitReader<bool>;
59#[doc = "Field `PAGEMODE` writer - Page Mode Access Enable"]
60pub type PAGEMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RDTIMING3_SPEC, bool, O>;
61impl R {
62 #[doc = "Bits 0:1 - Read Setup Time"]
63 #[inline(always)]
64 pub fn rdsetup(&self) -> RDSETUP_R {
65 RDSETUP_R::new((self.bits & 3) as u8)
66 }
67 #[doc = "Bits 8:13 - Read Strobe Time"]
68 #[inline(always)]
69 pub fn rdstrb(&self) -> RDSTRB_R {
70 RDSTRB_R::new(((self.bits >> 8) & 0x3f) as u8)
71 }
72 #[doc = "Bits 16:17 - Read Hold Time"]
73 #[inline(always)]
74 pub fn rdhold(&self) -> RDHOLD_R {
75 RDHOLD_R::new(((self.bits >> 16) & 3) as u8)
76 }
77 #[doc = "Bit 28 - Half Cycle REn Strobe Duration Enable"]
78 #[inline(always)]
79 pub fn halfre(&self) -> HALFRE_R {
80 HALFRE_R::new(((self.bits >> 28) & 1) != 0)
81 }
82 #[doc = "Bit 29 - Prefetch Enable"]
83 #[inline(always)]
84 pub fn prefetch(&self) -> PREFETCH_R {
85 PREFETCH_R::new(((self.bits >> 29) & 1) != 0)
86 }
87 #[doc = "Bit 30 - Page Mode Access Enable"]
88 #[inline(always)]
89 pub fn pagemode(&self) -> PAGEMODE_R {
90 PAGEMODE_R::new(((self.bits >> 30) & 1) != 0)
91 }
92}
93impl W {
94 #[doc = "Bits 0:1 - Read Setup Time"]
95 #[inline(always)]
96 #[must_use]
97 pub fn rdsetup(&mut self) -> RDSETUP_W<0> {
98 RDSETUP_W::new(self)
99 }
100 #[doc = "Bits 8:13 - Read Strobe Time"]
101 #[inline(always)]
102 #[must_use]
103 pub fn rdstrb(&mut self) -> RDSTRB_W<8> {
104 RDSTRB_W::new(self)
105 }
106 #[doc = "Bits 16:17 - Read Hold Time"]
107 #[inline(always)]
108 #[must_use]
109 pub fn rdhold(&mut self) -> RDHOLD_W<16> {
110 RDHOLD_W::new(self)
111 }
112 #[doc = "Bit 28 - Half Cycle REn Strobe Duration Enable"]
113 #[inline(always)]
114 #[must_use]
115 pub fn halfre(&mut self) -> HALFRE_W<28> {
116 HALFRE_W::new(self)
117 }
118 #[doc = "Bit 29 - Prefetch Enable"]
119 #[inline(always)]
120 #[must_use]
121 pub fn prefetch(&mut self) -> PREFETCH_W<29> {
122 PREFETCH_W::new(self)
123 }
124 #[doc = "Bit 30 - Page Mode Access Enable"]
125 #[inline(always)]
126 #[must_use]
127 pub fn pagemode(&mut self) -> PAGEMODE_W<30> {
128 PAGEMODE_W::new(self)
129 }
130 #[doc = "Writes raw bits to the register."]
131 #[inline(always)]
132 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133 self.0.bits(bits);
134 self
135 }
136}
137#[doc = "Read Timing Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdtiming3](index.html) module"]
138pub struct RDTIMING3_SPEC;
139impl crate::RegisterSpec for RDTIMING3_SPEC {
140 type Ux = u32;
141}
142#[doc = "`read()` method returns [rdtiming3::R](R) reader structure"]
143impl crate::Readable for RDTIMING3_SPEC {
144 type Reader = R;
145}
146#[doc = "`write(|w| ..)` method takes [rdtiming3::W](W) writer structure"]
147impl crate::Writable for RDTIMING3_SPEC {
148 type Writer = W;
149 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
150 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
151}
152#[doc = "`reset()` method sets RDTIMING3 to value 0x0003_3f03"]
153impl crate::Resettable for RDTIMING3_SPEC {
154 const RESET_VALUE: Self::Ux = 0x0003_3f03;
155}