efm32gg_pac/efm32gg230/lesense/
route.rs1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ROUTE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ROUTE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CH0PEN` reader - CH0 Pin Enable"]
38pub type CH0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CH0PEN` writer - CH0 Pin Enable"]
40pub type CH0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
41#[doc = "Field `CH1PEN` reader - CH0 Pin Enable"]
42pub type CH1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CH1PEN` writer - CH0 Pin Enable"]
44pub type CH1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
45#[doc = "Field `CH2PEN` reader - CH2 Pin Enable"]
46pub type CH2PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CH2PEN` writer - CH2 Pin Enable"]
48pub type CH2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
49#[doc = "Field `CH3PEN` reader - CH3 Pin Enable"]
50pub type CH3PEN_R = crate::BitReader<bool>;
51#[doc = "Field `CH3PEN` writer - CH3 Pin Enable"]
52pub type CH3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
53#[doc = "Field `CH4PEN` reader - CH4 Pin Enable"]
54pub type CH4PEN_R = crate::BitReader<bool>;
55#[doc = "Field `CH4PEN` writer - CH4 Pin Enable"]
56pub type CH4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
57#[doc = "Field `CH5PEN` reader - CH5 Pin Enable"]
58pub type CH5PEN_R = crate::BitReader<bool>;
59#[doc = "Field `CH5PEN` writer - CH5 Pin Enable"]
60pub type CH5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
61#[doc = "Field `CH6PEN` reader - CH6 Pin Enable"]
62pub type CH6PEN_R = crate::BitReader<bool>;
63#[doc = "Field `CH6PEN` writer - CH6 Pin Enable"]
64pub type CH6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
65#[doc = "Field `CH7PEN` reader - CH7 Pin Enable"]
66pub type CH7PEN_R = crate::BitReader<bool>;
67#[doc = "Field `CH7PEN` writer - CH7 Pin Enable"]
68pub type CH7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
69#[doc = "Field `CH8PEN` reader - CH8 Pin Enable"]
70pub type CH8PEN_R = crate::BitReader<bool>;
71#[doc = "Field `CH8PEN` writer - CH8 Pin Enable"]
72pub type CH8PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
73#[doc = "Field `CH9PEN` reader - CH9 Pin Enable"]
74pub type CH9PEN_R = crate::BitReader<bool>;
75#[doc = "Field `CH9PEN` writer - CH9 Pin Enable"]
76pub type CH9PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
77#[doc = "Field `CH10PEN` reader - CH10 Pin Enable"]
78pub type CH10PEN_R = crate::BitReader<bool>;
79#[doc = "Field `CH10PEN` writer - CH10 Pin Enable"]
80pub type CH10PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
81#[doc = "Field `CH11PEN` reader - CH11 Pin Enable"]
82pub type CH11PEN_R = crate::BitReader<bool>;
83#[doc = "Field `CH11PEN` writer - CH11 Pin Enable"]
84pub type CH11PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
85#[doc = "Field `CH12PEN` reader - CH12 Pin Enable"]
86pub type CH12PEN_R = crate::BitReader<bool>;
87#[doc = "Field `CH12PEN` writer - CH12 Pin Enable"]
88pub type CH12PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
89#[doc = "Field `CH13PEN` reader - CH13 Pin Enable"]
90pub type CH13PEN_R = crate::BitReader<bool>;
91#[doc = "Field `CH13PEN` writer - CH13 Pin Enable"]
92pub type CH13PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
93#[doc = "Field `CH14PEN` reader - CH14 Pin Enable"]
94pub type CH14PEN_R = crate::BitReader<bool>;
95#[doc = "Field `CH14PEN` writer - CH14 Pin Enable"]
96pub type CH14PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
97#[doc = "Field `CH15PEN` reader - CH15 Pin Enable"]
98pub type CH15PEN_R = crate::BitReader<bool>;
99#[doc = "Field `CH15PEN` writer - CH15 Pin Enable"]
100pub type CH15PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
101#[doc = "Field `ALTEX0PEN` reader - ALTEX0 Pin Enable"]
102pub type ALTEX0PEN_R = crate::BitReader<bool>;
103#[doc = "Field `ALTEX0PEN` writer - ALTEX0 Pin Enable"]
104pub type ALTEX0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
105#[doc = "Field `ALTEX1PEN` reader - ALTEX1 Pin Enable"]
106pub type ALTEX1PEN_R = crate::BitReader<bool>;
107#[doc = "Field `ALTEX1PEN` writer - ALTEX1 Pin Enable"]
108pub type ALTEX1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
109#[doc = "Field `ALTEX2PEN` reader - ALTEX2 Pin Enable"]
110pub type ALTEX2PEN_R = crate::BitReader<bool>;
111#[doc = "Field `ALTEX2PEN` writer - ALTEX2 Pin Enable"]
112pub type ALTEX2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
113#[doc = "Field `ALTEX3PEN` reader - ALTEX3 Pin Enable"]
114pub type ALTEX3PEN_R = crate::BitReader<bool>;
115#[doc = "Field `ALTEX3PEN` writer - ALTEX3 Pin Enable"]
116pub type ALTEX3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
117#[doc = "Field `ALTEX4PEN` reader - ALTEX4 Pin Enable"]
118pub type ALTEX4PEN_R = crate::BitReader<bool>;
119#[doc = "Field `ALTEX4PEN` writer - ALTEX4 Pin Enable"]
120pub type ALTEX4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
121#[doc = "Field `ALTEX5PEN` reader - ALTEX5 Pin Enable"]
122pub type ALTEX5PEN_R = crate::BitReader<bool>;
123#[doc = "Field `ALTEX5PEN` writer - ALTEX5 Pin Enable"]
124pub type ALTEX5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
125#[doc = "Field `ALTEX6PEN` reader - ALTEX6 Pin Enable"]
126pub type ALTEX6PEN_R = crate::BitReader<bool>;
127#[doc = "Field `ALTEX6PEN` writer - ALTEX6 Pin Enable"]
128pub type ALTEX6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
129#[doc = "Field `ALTEX7PEN` reader - ALTEX7 Pin Enable"]
130pub type ALTEX7PEN_R = crate::BitReader<bool>;
131#[doc = "Field `ALTEX7PEN` writer - ALTEX7 Pin Enable"]
132pub type ALTEX7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, O>;
133impl R {
134 #[doc = "Bit 0 - CH0 Pin Enable"]
135 #[inline(always)]
136 pub fn ch0pen(&self) -> CH0PEN_R {
137 CH0PEN_R::new((self.bits & 1) != 0)
138 }
139 #[doc = "Bit 1 - CH0 Pin Enable"]
140 #[inline(always)]
141 pub fn ch1pen(&self) -> CH1PEN_R {
142 CH1PEN_R::new(((self.bits >> 1) & 1) != 0)
143 }
144 #[doc = "Bit 2 - CH2 Pin Enable"]
145 #[inline(always)]
146 pub fn ch2pen(&self) -> CH2PEN_R {
147 CH2PEN_R::new(((self.bits >> 2) & 1) != 0)
148 }
149 #[doc = "Bit 3 - CH3 Pin Enable"]
150 #[inline(always)]
151 pub fn ch3pen(&self) -> CH3PEN_R {
152 CH3PEN_R::new(((self.bits >> 3) & 1) != 0)
153 }
154 #[doc = "Bit 4 - CH4 Pin Enable"]
155 #[inline(always)]
156 pub fn ch4pen(&self) -> CH4PEN_R {
157 CH4PEN_R::new(((self.bits >> 4) & 1) != 0)
158 }
159 #[doc = "Bit 5 - CH5 Pin Enable"]
160 #[inline(always)]
161 pub fn ch5pen(&self) -> CH5PEN_R {
162 CH5PEN_R::new(((self.bits >> 5) & 1) != 0)
163 }
164 #[doc = "Bit 6 - CH6 Pin Enable"]
165 #[inline(always)]
166 pub fn ch6pen(&self) -> CH6PEN_R {
167 CH6PEN_R::new(((self.bits >> 6) & 1) != 0)
168 }
169 #[doc = "Bit 7 - CH7 Pin Enable"]
170 #[inline(always)]
171 pub fn ch7pen(&self) -> CH7PEN_R {
172 CH7PEN_R::new(((self.bits >> 7) & 1) != 0)
173 }
174 #[doc = "Bit 8 - CH8 Pin Enable"]
175 #[inline(always)]
176 pub fn ch8pen(&self) -> CH8PEN_R {
177 CH8PEN_R::new(((self.bits >> 8) & 1) != 0)
178 }
179 #[doc = "Bit 9 - CH9 Pin Enable"]
180 #[inline(always)]
181 pub fn ch9pen(&self) -> CH9PEN_R {
182 CH9PEN_R::new(((self.bits >> 9) & 1) != 0)
183 }
184 #[doc = "Bit 10 - CH10 Pin Enable"]
185 #[inline(always)]
186 pub fn ch10pen(&self) -> CH10PEN_R {
187 CH10PEN_R::new(((self.bits >> 10) & 1) != 0)
188 }
189 #[doc = "Bit 11 - CH11 Pin Enable"]
190 #[inline(always)]
191 pub fn ch11pen(&self) -> CH11PEN_R {
192 CH11PEN_R::new(((self.bits >> 11) & 1) != 0)
193 }
194 #[doc = "Bit 12 - CH12 Pin Enable"]
195 #[inline(always)]
196 pub fn ch12pen(&self) -> CH12PEN_R {
197 CH12PEN_R::new(((self.bits >> 12) & 1) != 0)
198 }
199 #[doc = "Bit 13 - CH13 Pin Enable"]
200 #[inline(always)]
201 pub fn ch13pen(&self) -> CH13PEN_R {
202 CH13PEN_R::new(((self.bits >> 13) & 1) != 0)
203 }
204 #[doc = "Bit 14 - CH14 Pin Enable"]
205 #[inline(always)]
206 pub fn ch14pen(&self) -> CH14PEN_R {
207 CH14PEN_R::new(((self.bits >> 14) & 1) != 0)
208 }
209 #[doc = "Bit 15 - CH15 Pin Enable"]
210 #[inline(always)]
211 pub fn ch15pen(&self) -> CH15PEN_R {
212 CH15PEN_R::new(((self.bits >> 15) & 1) != 0)
213 }
214 #[doc = "Bit 16 - ALTEX0 Pin Enable"]
215 #[inline(always)]
216 pub fn altex0pen(&self) -> ALTEX0PEN_R {
217 ALTEX0PEN_R::new(((self.bits >> 16) & 1) != 0)
218 }
219 #[doc = "Bit 17 - ALTEX1 Pin Enable"]
220 #[inline(always)]
221 pub fn altex1pen(&self) -> ALTEX1PEN_R {
222 ALTEX1PEN_R::new(((self.bits >> 17) & 1) != 0)
223 }
224 #[doc = "Bit 18 - ALTEX2 Pin Enable"]
225 #[inline(always)]
226 pub fn altex2pen(&self) -> ALTEX2PEN_R {
227 ALTEX2PEN_R::new(((self.bits >> 18) & 1) != 0)
228 }
229 #[doc = "Bit 19 - ALTEX3 Pin Enable"]
230 #[inline(always)]
231 pub fn altex3pen(&self) -> ALTEX3PEN_R {
232 ALTEX3PEN_R::new(((self.bits >> 19) & 1) != 0)
233 }
234 #[doc = "Bit 20 - ALTEX4 Pin Enable"]
235 #[inline(always)]
236 pub fn altex4pen(&self) -> ALTEX4PEN_R {
237 ALTEX4PEN_R::new(((self.bits >> 20) & 1) != 0)
238 }
239 #[doc = "Bit 21 - ALTEX5 Pin Enable"]
240 #[inline(always)]
241 pub fn altex5pen(&self) -> ALTEX5PEN_R {
242 ALTEX5PEN_R::new(((self.bits >> 21) & 1) != 0)
243 }
244 #[doc = "Bit 22 - ALTEX6 Pin Enable"]
245 #[inline(always)]
246 pub fn altex6pen(&self) -> ALTEX6PEN_R {
247 ALTEX6PEN_R::new(((self.bits >> 22) & 1) != 0)
248 }
249 #[doc = "Bit 23 - ALTEX7 Pin Enable"]
250 #[inline(always)]
251 pub fn altex7pen(&self) -> ALTEX7PEN_R {
252 ALTEX7PEN_R::new(((self.bits >> 23) & 1) != 0)
253 }
254}
255impl W {
256 #[doc = "Bit 0 - CH0 Pin Enable"]
257 #[inline(always)]
258 #[must_use]
259 pub fn ch0pen(&mut self) -> CH0PEN_W<0> {
260 CH0PEN_W::new(self)
261 }
262 #[doc = "Bit 1 - CH0 Pin Enable"]
263 #[inline(always)]
264 #[must_use]
265 pub fn ch1pen(&mut self) -> CH1PEN_W<1> {
266 CH1PEN_W::new(self)
267 }
268 #[doc = "Bit 2 - CH2 Pin Enable"]
269 #[inline(always)]
270 #[must_use]
271 pub fn ch2pen(&mut self) -> CH2PEN_W<2> {
272 CH2PEN_W::new(self)
273 }
274 #[doc = "Bit 3 - CH3 Pin Enable"]
275 #[inline(always)]
276 #[must_use]
277 pub fn ch3pen(&mut self) -> CH3PEN_W<3> {
278 CH3PEN_W::new(self)
279 }
280 #[doc = "Bit 4 - CH4 Pin Enable"]
281 #[inline(always)]
282 #[must_use]
283 pub fn ch4pen(&mut self) -> CH4PEN_W<4> {
284 CH4PEN_W::new(self)
285 }
286 #[doc = "Bit 5 - CH5 Pin Enable"]
287 #[inline(always)]
288 #[must_use]
289 pub fn ch5pen(&mut self) -> CH5PEN_W<5> {
290 CH5PEN_W::new(self)
291 }
292 #[doc = "Bit 6 - CH6 Pin Enable"]
293 #[inline(always)]
294 #[must_use]
295 pub fn ch6pen(&mut self) -> CH6PEN_W<6> {
296 CH6PEN_W::new(self)
297 }
298 #[doc = "Bit 7 - CH7 Pin Enable"]
299 #[inline(always)]
300 #[must_use]
301 pub fn ch7pen(&mut self) -> CH7PEN_W<7> {
302 CH7PEN_W::new(self)
303 }
304 #[doc = "Bit 8 - CH8 Pin Enable"]
305 #[inline(always)]
306 #[must_use]
307 pub fn ch8pen(&mut self) -> CH8PEN_W<8> {
308 CH8PEN_W::new(self)
309 }
310 #[doc = "Bit 9 - CH9 Pin Enable"]
311 #[inline(always)]
312 #[must_use]
313 pub fn ch9pen(&mut self) -> CH9PEN_W<9> {
314 CH9PEN_W::new(self)
315 }
316 #[doc = "Bit 10 - CH10 Pin Enable"]
317 #[inline(always)]
318 #[must_use]
319 pub fn ch10pen(&mut self) -> CH10PEN_W<10> {
320 CH10PEN_W::new(self)
321 }
322 #[doc = "Bit 11 - CH11 Pin Enable"]
323 #[inline(always)]
324 #[must_use]
325 pub fn ch11pen(&mut self) -> CH11PEN_W<11> {
326 CH11PEN_W::new(self)
327 }
328 #[doc = "Bit 12 - CH12 Pin Enable"]
329 #[inline(always)]
330 #[must_use]
331 pub fn ch12pen(&mut self) -> CH12PEN_W<12> {
332 CH12PEN_W::new(self)
333 }
334 #[doc = "Bit 13 - CH13 Pin Enable"]
335 #[inline(always)]
336 #[must_use]
337 pub fn ch13pen(&mut self) -> CH13PEN_W<13> {
338 CH13PEN_W::new(self)
339 }
340 #[doc = "Bit 14 - CH14 Pin Enable"]
341 #[inline(always)]
342 #[must_use]
343 pub fn ch14pen(&mut self) -> CH14PEN_W<14> {
344 CH14PEN_W::new(self)
345 }
346 #[doc = "Bit 15 - CH15 Pin Enable"]
347 #[inline(always)]
348 #[must_use]
349 pub fn ch15pen(&mut self) -> CH15PEN_W<15> {
350 CH15PEN_W::new(self)
351 }
352 #[doc = "Bit 16 - ALTEX0 Pin Enable"]
353 #[inline(always)]
354 #[must_use]
355 pub fn altex0pen(&mut self) -> ALTEX0PEN_W<16> {
356 ALTEX0PEN_W::new(self)
357 }
358 #[doc = "Bit 17 - ALTEX1 Pin Enable"]
359 #[inline(always)]
360 #[must_use]
361 pub fn altex1pen(&mut self) -> ALTEX1PEN_W<17> {
362 ALTEX1PEN_W::new(self)
363 }
364 #[doc = "Bit 18 - ALTEX2 Pin Enable"]
365 #[inline(always)]
366 #[must_use]
367 pub fn altex2pen(&mut self) -> ALTEX2PEN_W<18> {
368 ALTEX2PEN_W::new(self)
369 }
370 #[doc = "Bit 19 - ALTEX3 Pin Enable"]
371 #[inline(always)]
372 #[must_use]
373 pub fn altex3pen(&mut self) -> ALTEX3PEN_W<19> {
374 ALTEX3PEN_W::new(self)
375 }
376 #[doc = "Bit 20 - ALTEX4 Pin Enable"]
377 #[inline(always)]
378 #[must_use]
379 pub fn altex4pen(&mut self) -> ALTEX4PEN_W<20> {
380 ALTEX4PEN_W::new(self)
381 }
382 #[doc = "Bit 21 - ALTEX5 Pin Enable"]
383 #[inline(always)]
384 #[must_use]
385 pub fn altex5pen(&mut self) -> ALTEX5PEN_W<21> {
386 ALTEX5PEN_W::new(self)
387 }
388 #[doc = "Bit 22 - ALTEX6 Pin Enable"]
389 #[inline(always)]
390 #[must_use]
391 pub fn altex6pen(&mut self) -> ALTEX6PEN_W<22> {
392 ALTEX6PEN_W::new(self)
393 }
394 #[doc = "Bit 23 - ALTEX7 Pin Enable"]
395 #[inline(always)]
396 #[must_use]
397 pub fn altex7pen(&mut self) -> ALTEX7PEN_W<23> {
398 ALTEX7PEN_W::new(self)
399 }
400 #[doc = "Writes raw bits to the register."]
401 #[inline(always)]
402 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
403 self.0.bits(bits);
404 self
405 }
406}
407#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
408pub struct ROUTE_SPEC;
409impl crate::RegisterSpec for ROUTE_SPEC {
410 type Ux = u32;
411}
412#[doc = "`read()` method returns [route::R](R) reader structure"]
413impl crate::Readable for ROUTE_SPEC {
414 type Reader = R;
415}
416#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
417impl crate::Writable for ROUTE_SPEC {
418 type Writer = W;
419 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
420 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
421}
422#[doc = "`reset()` method sets ROUTE to value 0"]
423impl crate::Resettable for ROUTE_SPEC {
424 const RESET_VALUE: Self::Ux = 0;
425}