efm32g890_pac/lcd/
syncbusy.rs

1#[doc = "Register `SYNCBUSY` reader"]
2pub struct R(crate::R<SYNCBUSY_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYNCBUSY_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYNCBUSY_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `CTRL` reader - CTRL Register Busy"]
17pub type CTRL_R = crate::BitReader<bool>;
18#[doc = "Field `BACTRL` reader - BACTRL Register Busy"]
19pub type BACTRL_R = crate::BitReader<bool>;
20#[doc = "Field `AREGA` reader - AREGA Register Busy"]
21pub type AREGA_R = crate::BitReader<bool>;
22#[doc = "Field `AREGB` reader - AREGB Register Busy"]
23pub type AREGB_R = crate::BitReader<bool>;
24#[doc = "Field `SEGD0L` reader - SEGD0L Register Busy"]
25pub type SEGD0L_R = crate::BitReader<bool>;
26#[doc = "Field `SEGD1L` reader - SEGD1L Register Busy"]
27pub type SEGD1L_R = crate::BitReader<bool>;
28#[doc = "Field `SEGD2L` reader - SEGD2L Register Busy"]
29pub type SEGD2L_R = crate::BitReader<bool>;
30#[doc = "Field `SEGD3L` reader - SEGD3L Register Busy"]
31pub type SEGD3L_R = crate::BitReader<bool>;
32#[doc = "Field `SEGD0H` reader - SEGD0H Register Busy"]
33pub type SEGD0H_R = crate::BitReader<bool>;
34#[doc = "Field `SEGD1H` reader - SEGD1H Register Busy"]
35pub type SEGD1H_R = crate::BitReader<bool>;
36#[doc = "Field `SEGD2H` reader - SEGD2H Register Busy"]
37pub type SEGD2H_R = crate::BitReader<bool>;
38#[doc = "Field `SEGD3H` reader - SEGD3H Register Busy"]
39pub type SEGD3H_R = crate::BitReader<bool>;
40impl R {
41    #[doc = "Bit 0 - CTRL Register Busy"]
42    #[inline(always)]
43    pub fn ctrl(&self) -> CTRL_R {
44        CTRL_R::new((self.bits & 1) != 0)
45    }
46    #[doc = "Bit 1 - BACTRL Register Busy"]
47    #[inline(always)]
48    pub fn bactrl(&self) -> BACTRL_R {
49        BACTRL_R::new(((self.bits >> 1) & 1) != 0)
50    }
51    #[doc = "Bit 2 - AREGA Register Busy"]
52    #[inline(always)]
53    pub fn arega(&self) -> AREGA_R {
54        AREGA_R::new(((self.bits >> 2) & 1) != 0)
55    }
56    #[doc = "Bit 3 - AREGB Register Busy"]
57    #[inline(always)]
58    pub fn aregb(&self) -> AREGB_R {
59        AREGB_R::new(((self.bits >> 3) & 1) != 0)
60    }
61    #[doc = "Bit 4 - SEGD0L Register Busy"]
62    #[inline(always)]
63    pub fn segd0l(&self) -> SEGD0L_R {
64        SEGD0L_R::new(((self.bits >> 4) & 1) != 0)
65    }
66    #[doc = "Bit 5 - SEGD1L Register Busy"]
67    #[inline(always)]
68    pub fn segd1l(&self) -> SEGD1L_R {
69        SEGD1L_R::new(((self.bits >> 5) & 1) != 0)
70    }
71    #[doc = "Bit 6 - SEGD2L Register Busy"]
72    #[inline(always)]
73    pub fn segd2l(&self) -> SEGD2L_R {
74        SEGD2L_R::new(((self.bits >> 6) & 1) != 0)
75    }
76    #[doc = "Bit 7 - SEGD3L Register Busy"]
77    #[inline(always)]
78    pub fn segd3l(&self) -> SEGD3L_R {
79        SEGD3L_R::new(((self.bits >> 7) & 1) != 0)
80    }
81    #[doc = "Bit 8 - SEGD0H Register Busy"]
82    #[inline(always)]
83    pub fn segd0h(&self) -> SEGD0H_R {
84        SEGD0H_R::new(((self.bits >> 8) & 1) != 0)
85    }
86    #[doc = "Bit 9 - SEGD1H Register Busy"]
87    #[inline(always)]
88    pub fn segd1h(&self) -> SEGD1H_R {
89        SEGD1H_R::new(((self.bits >> 9) & 1) != 0)
90    }
91    #[doc = "Bit 10 - SEGD2H Register Busy"]
92    #[inline(always)]
93    pub fn segd2h(&self) -> SEGD2H_R {
94        SEGD2H_R::new(((self.bits >> 10) & 1) != 0)
95    }
96    #[doc = "Bit 11 - SEGD3H Register Busy"]
97    #[inline(always)]
98    pub fn segd3h(&self) -> SEGD3H_R {
99        SEGD3H_R::new(((self.bits >> 11) & 1) != 0)
100    }
101}
102#[doc = "Synchronization Busy Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
103pub struct SYNCBUSY_SPEC;
104impl crate::RegisterSpec for SYNCBUSY_SPEC {
105    type Ux = u32;
106}
107#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
108impl crate::Readable for SYNCBUSY_SPEC {
109    type Reader = R;
110}
111#[doc = "`reset()` method sets SYNCBUSY to value 0"]
112impl crate::Resettable for SYNCBUSY_SPEC {
113    #[inline(always)]
114    fn reset_value() -> Self::Ux {
115        0
116    }
117}
efm32g890_pac/lcd/syncbusy.rs

efm32g890_pac/lcd/
syncbusy.rs
