efm32g290_pac/dma/
ch0_ctrl.rs

1#[doc = "Register `CH0_CTRL` reader"]
2pub struct R(crate::R<CH0_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH0_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH0_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH0_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH0_CTRL` writer"]
17pub struct W(crate::W<CH0_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH0_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH0_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH0_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SIGSEL` reader - Signal Select"]
38pub type SIGSEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SIGSEL` writer - Signal Select"]
40pub type SIGSEL_W<'a> = crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, u8, 4, 0>;
41#[doc = "Source Select\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum SOURCESEL_A {
45    #[doc = "0: No source selected"]
46    NONE = 0,
47    #[doc = "8: Analog to Digital Converter 0"]
48    ADC0 = 8,
49    #[doc = "10: Digital to Analog Converter 0"]
50    DAC0 = 10,
51    #[doc = "12: Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
52    USART0 = 12,
53    #[doc = "13: Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
54    USART1 = 13,
55    #[doc = "14: Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
56    USART2 = 14,
57    #[doc = "16: Low Energy UART 0"]
58    LEUART0 = 16,
59    #[doc = "17: Low Energy UART 1"]
60    LEUART1 = 17,
61    #[doc = "20: I2C 0"]
62    I2C0 = 20,
63    #[doc = "24: Timer 0"]
64    TIMER0 = 24,
65    #[doc = "25: Timer 1"]
66    TIMER1 = 25,
67    #[doc = "26: Timer 2"]
68    TIMER2 = 26,
69    #[doc = "44: Universal Asynchronous Receiver/Transmitter 0"]
70    UART0 = 44,
71    #[doc = "48: `110000`"]
72    MSC = 48,
73    #[doc = "49: Advanced Encryption Standard Accelerator"]
74    AES = 49,
75}
76impl From<SOURCESEL_A> for u8 {
77    #[inline(always)]
78    fn from(variant: SOURCESEL_A) -> Self {
79        variant as _
80    }
81}
82#[doc = "Field `SOURCESEL` reader - Source Select"]
83pub type SOURCESEL_R = crate::FieldReader<u8, SOURCESEL_A>;
84impl SOURCESEL_R {
85    #[doc = "Get enumerated values variant"]
86    #[inline(always)]
87    pub fn variant(&self) -> Option<SOURCESEL_A> {
88        match self.bits {
89            0 => Some(SOURCESEL_A::NONE),
90            8 => Some(SOURCESEL_A::ADC0),
91            10 => Some(SOURCESEL_A::DAC0),
92            12 => Some(SOURCESEL_A::USART0),
93            13 => Some(SOURCESEL_A::USART1),
94            14 => Some(SOURCESEL_A::USART2),
95            16 => Some(SOURCESEL_A::LEUART0),
96            17 => Some(SOURCESEL_A::LEUART1),
97            20 => Some(SOURCESEL_A::I2C0),
98            24 => Some(SOURCESEL_A::TIMER0),
99            25 => Some(SOURCESEL_A::TIMER1),
100            26 => Some(SOURCESEL_A::TIMER2),
101            44 => Some(SOURCESEL_A::UART0),
102            48 => Some(SOURCESEL_A::MSC),
103            49 => Some(SOURCESEL_A::AES),
104            _ => None,
105        }
106    }
107    #[doc = "Checks if the value of the field is `NONE`"]
108    #[inline(always)]
109    pub fn is_none(&self) -> bool {
110        *self == SOURCESEL_A::NONE
111    }
112    #[doc = "Checks if the value of the field is `ADC0`"]
113    #[inline(always)]
114    pub fn is_adc0(&self) -> bool {
115        *self == SOURCESEL_A::ADC0
116    }
117    #[doc = "Checks if the value of the field is `DAC0`"]
118    #[inline(always)]
119    pub fn is_dac0(&self) -> bool {
120        *self == SOURCESEL_A::DAC0
121    }
122    #[doc = "Checks if the value of the field is `USART0`"]
123    #[inline(always)]
124    pub fn is_usart0(&self) -> bool {
125        *self == SOURCESEL_A::USART0
126    }
127    #[doc = "Checks if the value of the field is `USART1`"]
128    #[inline(always)]
129    pub fn is_usart1(&self) -> bool {
130        *self == SOURCESEL_A::USART1
131    }
132    #[doc = "Checks if the value of the field is `USART2`"]
133    #[inline(always)]
134    pub fn is_usart2(&self) -> bool {
135        *self == SOURCESEL_A::USART2
136    }
137    #[doc = "Checks if the value of the field is `LEUART0`"]
138    #[inline(always)]
139    pub fn is_leuart0(&self) -> bool {
140        *self == SOURCESEL_A::LEUART0
141    }
142    #[doc = "Checks if the value of the field is `LEUART1`"]
143    #[inline(always)]
144    pub fn is_leuart1(&self) -> bool {
145        *self == SOURCESEL_A::LEUART1
146    }
147    #[doc = "Checks if the value of the field is `I2C0`"]
148    #[inline(always)]
149    pub fn is_i2c0(&self) -> bool {
150        *self == SOURCESEL_A::I2C0
151    }
152    #[doc = "Checks if the value of the field is `TIMER0`"]
153    #[inline(always)]
154    pub fn is_timer0(&self) -> bool {
155        *self == SOURCESEL_A::TIMER0
156    }
157    #[doc = "Checks if the value of the field is `TIMER1`"]
158    #[inline(always)]
159    pub fn is_timer1(&self) -> bool {
160        *self == SOURCESEL_A::TIMER1
161    }
162    #[doc = "Checks if the value of the field is `TIMER2`"]
163    #[inline(always)]
164    pub fn is_timer2(&self) -> bool {
165        *self == SOURCESEL_A::TIMER2
166    }
167    #[doc = "Checks if the value of the field is `UART0`"]
168    #[inline(always)]
169    pub fn is_uart0(&self) -> bool {
170        *self == SOURCESEL_A::UART0
171    }
172    #[doc = "Checks if the value of the field is `MSC`"]
173    #[inline(always)]
174    pub fn is_msc(&self) -> bool {
175        *self == SOURCESEL_A::MSC
176    }
177    #[doc = "Checks if the value of the field is `AES`"]
178    #[inline(always)]
179    pub fn is_aes(&self) -> bool {
180        *self == SOURCESEL_A::AES
181    }
182}
183#[doc = "Field `SOURCESEL` writer - Source Select"]
184pub type SOURCESEL_W<'a> = crate::FieldWriter<'a, u32, CH0_CTRL_SPEC, u8, SOURCESEL_A, 6, 16>;
185impl<'a> SOURCESEL_W<'a> {
186    #[doc = "No source selected"]
187    #[inline(always)]
188    pub fn none(self) -> &'a mut W {
189        self.variant(SOURCESEL_A::NONE)
190    }
191    #[doc = "Analog to Digital Converter 0"]
192    #[inline(always)]
193    pub fn adc0(self) -> &'a mut W {
194        self.variant(SOURCESEL_A::ADC0)
195    }
196    #[doc = "Digital to Analog Converter 0"]
197    #[inline(always)]
198    pub fn dac0(self) -> &'a mut W {
199        self.variant(SOURCESEL_A::DAC0)
200    }
201    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
202    #[inline(always)]
203    pub fn usart0(self) -> &'a mut W {
204        self.variant(SOURCESEL_A::USART0)
205    }
206    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
207    #[inline(always)]
208    pub fn usart1(self) -> &'a mut W {
209        self.variant(SOURCESEL_A::USART1)
210    }
211    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
212    #[inline(always)]
213    pub fn usart2(self) -> &'a mut W {
214        self.variant(SOURCESEL_A::USART2)
215    }
216    #[doc = "Low Energy UART 0"]
217    #[inline(always)]
218    pub fn leuart0(self) -> &'a mut W {
219        self.variant(SOURCESEL_A::LEUART0)
220    }
221    #[doc = "Low Energy UART 1"]
222    #[inline(always)]
223    pub fn leuart1(self) -> &'a mut W {
224        self.variant(SOURCESEL_A::LEUART1)
225    }
226    #[doc = "I2C 0"]
227    #[inline(always)]
228    pub fn i2c0(self) -> &'a mut W {
229        self.variant(SOURCESEL_A::I2C0)
230    }
231    #[doc = "Timer 0"]
232    #[inline(always)]
233    pub fn timer0(self) -> &'a mut W {
234        self.variant(SOURCESEL_A::TIMER0)
235    }
236    #[doc = "Timer 1"]
237    #[inline(always)]
238    pub fn timer1(self) -> &'a mut W {
239        self.variant(SOURCESEL_A::TIMER1)
240    }
241    #[doc = "Timer 2"]
242    #[inline(always)]
243    pub fn timer2(self) -> &'a mut W {
244        self.variant(SOURCESEL_A::TIMER2)
245    }
246    #[doc = "Universal Asynchronous Receiver/Transmitter 0"]
247    #[inline(always)]
248    pub fn uart0(self) -> &'a mut W {
249        self.variant(SOURCESEL_A::UART0)
250    }
251    #[doc = "`110000`"]
252    #[inline(always)]
253    pub fn msc(self) -> &'a mut W {
254        self.variant(SOURCESEL_A::MSC)
255    }
256    #[doc = "Advanced Encryption Standard Accelerator"]
257    #[inline(always)]
258    pub fn aes(self) -> &'a mut W {
259        self.variant(SOURCESEL_A::AES)
260    }
261}
262impl R {
263    #[doc = "Bits 0:3 - Signal Select"]
264    #[inline(always)]
265    pub fn sigsel(&self) -> SIGSEL_R {
266        SIGSEL_R::new((self.bits & 0x0f) as u8)
267    }
268    #[doc = "Bits 16:21 - Source Select"]
269    #[inline(always)]
270    pub fn sourcesel(&self) -> SOURCESEL_R {
271        SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8)
272    }
273}
274impl W {
275    #[doc = "Bits 0:3 - Signal Select"]
276    #[inline(always)]
277    pub fn sigsel(&mut self) -> SIGSEL_W {
278        SIGSEL_W::new(self)
279    }
280    #[doc = "Bits 16:21 - Source Select"]
281    #[inline(always)]
282    pub fn sourcesel(&mut self) -> SOURCESEL_W {
283        SOURCESEL_W::new(self)
284    }
285    #[doc = "Writes raw bits to the register."]
286    #[inline(always)]
287    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
288        self.0.bits(bits);
289        self
290    }
291}
292#[doc = "Channel Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0_ctrl](index.html) module"]
293pub struct CH0_CTRL_SPEC;
294impl crate::RegisterSpec for CH0_CTRL_SPEC {
295    type Ux = u32;
296}
297#[doc = "`read()` method returns [ch0_ctrl::R](R) reader structure"]
298impl crate::Readable for CH0_CTRL_SPEC {
299    type Reader = R;
300}
301#[doc = "`write(|w| ..)` method takes [ch0_ctrl::W](W) writer structure"]
302impl crate::Writable for CH0_CTRL_SPEC {
303    type Writer = W;
304}
305#[doc = "`reset()` method sets CH0_CTRL to value 0"]
306impl crate::Resettable for CH0_CTRL_SPEC {
307    #[inline(always)]
308    fn reset_value() -> Self::Ux {
309        0
310    }
311}
efm32g290_pac/dma/ch0_ctrl.rs

efm32g290_pac/dma/
ch0_ctrl.rs
