efm32g230_pac/usart2/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RXEN` writer - Receiver Enable"]
23pub type RXEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 0>;
24#[doc = "Field `RXDIS` writer - Receiver Disable"]
25pub type RXDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 1>;
26#[doc = "Field `TXEN` writer - Transmitter Enable"]
27pub type TXEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 2>;
28#[doc = "Field `TXDIS` writer - Transmitter Disable"]
29pub type TXDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 3>;
30#[doc = "Field `MASTEREN` writer - Master Enable"]
31pub type MASTEREN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 4>;
32#[doc = "Field `MASTERDIS` writer - Master Disable"]
33pub type MASTERDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 5>;
34#[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"]
35pub type RXBLOCKEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 6>;
36#[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"]
37pub type RXBLOCKDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 7>;
38#[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"]
39pub type TXTRIEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 8>;
40#[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"]
41pub type TXTRIDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 9>;
42#[doc = "Field `CLEARTX` writer - Clear TX"]
43pub type CLEARTX_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 10>;
44#[doc = "Field `CLEARRX` writer - Clear RX"]
45pub type CLEARRX_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 11>;
46impl W {
47    #[doc = "Bit 0 - Receiver Enable"]
48    #[inline(always)]
49    pub fn rxen(&mut self) -> RXEN_W {
50        RXEN_W::new(self)
51    }
52    #[doc = "Bit 1 - Receiver Disable"]
53    #[inline(always)]
54    pub fn rxdis(&mut self) -> RXDIS_W {
55        RXDIS_W::new(self)
56    }
57    #[doc = "Bit 2 - Transmitter Enable"]
58    #[inline(always)]
59    pub fn txen(&mut self) -> TXEN_W {
60        TXEN_W::new(self)
61    }
62    #[doc = "Bit 3 - Transmitter Disable"]
63    #[inline(always)]
64    pub fn txdis(&mut self) -> TXDIS_W {
65        TXDIS_W::new(self)
66    }
67    #[doc = "Bit 4 - Master Enable"]
68    #[inline(always)]
69    pub fn masteren(&mut self) -> MASTEREN_W {
70        MASTEREN_W::new(self)
71    }
72    #[doc = "Bit 5 - Master Disable"]
73    #[inline(always)]
74    pub fn masterdis(&mut self) -> MASTERDIS_W {
75        MASTERDIS_W::new(self)
76    }
77    #[doc = "Bit 6 - Receiver Block Enable"]
78    #[inline(always)]
79    pub fn rxblocken(&mut self) -> RXBLOCKEN_W {
80        RXBLOCKEN_W::new(self)
81    }
82    #[doc = "Bit 7 - Receiver Block Disable"]
83    #[inline(always)]
84    pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W {
85        RXBLOCKDIS_W::new(self)
86    }
87    #[doc = "Bit 8 - Transmitter Tristate Enable"]
88    #[inline(always)]
89    pub fn txtrien(&mut self) -> TXTRIEN_W {
90        TXTRIEN_W::new(self)
91    }
92    #[doc = "Bit 9 - Transmitter Tristate Disable"]
93    #[inline(always)]
94    pub fn txtridis(&mut self) -> TXTRIDIS_W {
95        TXTRIDIS_W::new(self)
96    }
97    #[doc = "Bit 10 - Clear TX"]
98    #[inline(always)]
99    pub fn cleartx(&mut self) -> CLEARTX_W {
100        CLEARTX_W::new(self)
101    }
102    #[doc = "Bit 11 - Clear RX"]
103    #[inline(always)]
104    pub fn clearrx(&mut self) -> CLEARRX_W {
105        CLEARRX_W::new(self)
106    }
107    #[doc = "Writes raw bits to the register."]
108    #[inline(always)]
109    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
110        self.0.bits(bits);
111        self
112    }
113}
114#[doc = "Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
115pub struct CMD_SPEC;
116impl crate::RegisterSpec for CMD_SPEC {
117    type Ux = u32;
118}
119#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
120impl crate::Writable for CMD_SPEC {
121    type Writer = W;
122}
123#[doc = "`reset()` method sets CMD to value 0"]
124impl crate::Resettable for CMD_SPEC {
125    #[inline(always)]
126    fn reset_value() -> Self::Ux {
127        0
128    }
129}
efm32g230_pac/usart2/cmd.rs

efm32g230_pac/usart2/
cmd.rs
