efm32g230_pac/dma/
chsreqstatus.rs

1#[doc = "Register `CHSREQSTATUS` reader"]
2pub struct R(crate::R<CHSREQSTATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CHSREQSTATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CHSREQSTATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CHSREQSTATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `CH0SREQSTATUS` reader - Channel 0 Single Request Status"]
17pub type CH0SREQSTATUS_R = crate::BitReader<bool>;
18#[doc = "Field `CH1SREQSTATUS` reader - Channel 1 Single Request Status"]
19pub type CH1SREQSTATUS_R = crate::BitReader<bool>;
20#[doc = "Field `CH2SREQSTATUS` reader - Channel 2 Single Request Status"]
21pub type CH2SREQSTATUS_R = crate::BitReader<bool>;
22#[doc = "Field `CH3SREQSTATUS` reader - Channel 3 Single Request Status"]
23pub type CH3SREQSTATUS_R = crate::BitReader<bool>;
24#[doc = "Field `CH4SREQSTATUS` reader - Channel 4 Single Request Status"]
25pub type CH4SREQSTATUS_R = crate::BitReader<bool>;
26#[doc = "Field `CH5SREQSTATUS` reader - Channel 5 Single Request Status"]
27pub type CH5SREQSTATUS_R = crate::BitReader<bool>;
28#[doc = "Field `CH6SREQSTATUS` reader - Channel 6 Single Request Status"]
29pub type CH6SREQSTATUS_R = crate::BitReader<bool>;
30#[doc = "Field `CH7SREQSTATUS` reader - Channel 7 Single Request Status"]
31pub type CH7SREQSTATUS_R = crate::BitReader<bool>;
32impl R {
33    #[doc = "Bit 0 - Channel 0 Single Request Status"]
34    #[inline(always)]
35    pub fn ch0sreqstatus(&self) -> CH0SREQSTATUS_R {
36        CH0SREQSTATUS_R::new((self.bits & 1) != 0)
37    }
38    #[doc = "Bit 1 - Channel 1 Single Request Status"]
39    #[inline(always)]
40    pub fn ch1sreqstatus(&self) -> CH1SREQSTATUS_R {
41        CH1SREQSTATUS_R::new(((self.bits >> 1) & 1) != 0)
42    }
43    #[doc = "Bit 2 - Channel 2 Single Request Status"]
44    #[inline(always)]
45    pub fn ch2sreqstatus(&self) -> CH2SREQSTATUS_R {
46        CH2SREQSTATUS_R::new(((self.bits >> 2) & 1) != 0)
47    }
48    #[doc = "Bit 3 - Channel 3 Single Request Status"]
49    #[inline(always)]
50    pub fn ch3sreqstatus(&self) -> CH3SREQSTATUS_R {
51        CH3SREQSTATUS_R::new(((self.bits >> 3) & 1) != 0)
52    }
53    #[doc = "Bit 4 - Channel 4 Single Request Status"]
54    #[inline(always)]
55    pub fn ch4sreqstatus(&self) -> CH4SREQSTATUS_R {
56        CH4SREQSTATUS_R::new(((self.bits >> 4) & 1) != 0)
57    }
58    #[doc = "Bit 5 - Channel 5 Single Request Status"]
59    #[inline(always)]
60    pub fn ch5sreqstatus(&self) -> CH5SREQSTATUS_R {
61        CH5SREQSTATUS_R::new(((self.bits >> 5) & 1) != 0)
62    }
63    #[doc = "Bit 6 - Channel 6 Single Request Status"]
64    #[inline(always)]
65    pub fn ch6sreqstatus(&self) -> CH6SREQSTATUS_R {
66        CH6SREQSTATUS_R::new(((self.bits >> 6) & 1) != 0)
67    }
68    #[doc = "Bit 7 - Channel 7 Single Request Status"]
69    #[inline(always)]
70    pub fn ch7sreqstatus(&self) -> CH7SREQSTATUS_R {
71        CH7SREQSTATUS_R::new(((self.bits >> 7) & 1) != 0)
72    }
73}
74#[doc = "Channel Single Request Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chsreqstatus](index.html) module"]
75pub struct CHSREQSTATUS_SPEC;
76impl crate::RegisterSpec for CHSREQSTATUS_SPEC {
77    type Ux = u32;
78}
79#[doc = "`read()` method returns [chsreqstatus::R](R) reader structure"]
80impl crate::Readable for CHSREQSTATUS_SPEC {
81    type Reader = R;
82}
83#[doc = "`reset()` method sets CHSREQSTATUS to value 0"]
84impl crate::Resettable for CHSREQSTATUS_SPEC {
85    #[inline(always)]
86    fn reset_value() -> Self::Ux {
87        0
88    }
89}
efm32g230_pac/dma/chsreqstatus.rs

efm32g230_pac/dma/
chsreqstatus.rs
