efm32g230_pac/cmu/
oscencmd.rs1#[doc = "Register `OSCENCMD` writer"]
2pub struct W(crate::W<OSCENCMD_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<OSCENCMD_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<OSCENCMD_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<OSCENCMD_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `HFRCOEN` writer - HFRCO Enable"]
23pub type HFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 0>;
24#[doc = "Field `HFRCODIS` writer - HFRCO Disable"]
25pub type HFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 1>;
26#[doc = "Field `HFXOEN` writer - HFXO Enable"]
27pub type HFXOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 2>;
28#[doc = "Field `HFXODIS` writer - HFXO Disable"]
29pub type HFXODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 3>;
30#[doc = "Field `AUXHFRCOEN` writer - AUXHFRCO Enable"]
31pub type AUXHFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 4>;
32#[doc = "Field `AUXHFRCODIS` writer - AUXHFRCO Disable"]
33pub type AUXHFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 5>;
34#[doc = "Field `LFRCOEN` writer - LFRCO Enable"]
35pub type LFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 6>;
36#[doc = "Field `LFRCODIS` writer - LFRCO Disable"]
37pub type LFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 7>;
38#[doc = "Field `LFXOEN` writer - LFXO Enable"]
39pub type LFXOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 8>;
40#[doc = "Field `LFXODIS` writer - LFXO Disable"]
41pub type LFXODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 9>;
42impl W {
43 #[doc = "Bit 0 - HFRCO Enable"]
44 #[inline(always)]
45 pub fn hfrcoen(&mut self) -> HFRCOEN_W {
46 HFRCOEN_W::new(self)
47 }
48 #[doc = "Bit 1 - HFRCO Disable"]
49 #[inline(always)]
50 pub fn hfrcodis(&mut self) -> HFRCODIS_W {
51 HFRCODIS_W::new(self)
52 }
53 #[doc = "Bit 2 - HFXO Enable"]
54 #[inline(always)]
55 pub fn hfxoen(&mut self) -> HFXOEN_W {
56 HFXOEN_W::new(self)
57 }
58 #[doc = "Bit 3 - HFXO Disable"]
59 #[inline(always)]
60 pub fn hfxodis(&mut self) -> HFXODIS_W {
61 HFXODIS_W::new(self)
62 }
63 #[doc = "Bit 4 - AUXHFRCO Enable"]
64 #[inline(always)]
65 pub fn auxhfrcoen(&mut self) -> AUXHFRCOEN_W {
66 AUXHFRCOEN_W::new(self)
67 }
68 #[doc = "Bit 5 - AUXHFRCO Disable"]
69 #[inline(always)]
70 pub fn auxhfrcodis(&mut self) -> AUXHFRCODIS_W {
71 AUXHFRCODIS_W::new(self)
72 }
73 #[doc = "Bit 6 - LFRCO Enable"]
74 #[inline(always)]
75 pub fn lfrcoen(&mut self) -> LFRCOEN_W {
76 LFRCOEN_W::new(self)
77 }
78 #[doc = "Bit 7 - LFRCO Disable"]
79 #[inline(always)]
80 pub fn lfrcodis(&mut self) -> LFRCODIS_W {
81 LFRCODIS_W::new(self)
82 }
83 #[doc = "Bit 8 - LFXO Enable"]
84 #[inline(always)]
85 pub fn lfxoen(&mut self) -> LFXOEN_W {
86 LFXOEN_W::new(self)
87 }
88 #[doc = "Bit 9 - LFXO Disable"]
89 #[inline(always)]
90 pub fn lfxodis(&mut self) -> LFXODIS_W {
91 LFXODIS_W::new(self)
92 }
93 #[doc = "Writes raw bits to the register."]
94 #[inline(always)]
95 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
96 self.0.bits(bits);
97 self
98 }
99}
100#[doc = "Oscillator Enable/Disable Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [oscencmd](index.html) module"]
101pub struct OSCENCMD_SPEC;
102impl crate::RegisterSpec for OSCENCMD_SPEC {
103 type Ux = u32;
104}
105#[doc = "`write(|w| ..)` method takes [oscencmd::W](W) writer structure"]
106impl crate::Writable for OSCENCMD_SPEC {
107 type Writer = W;
108}
109#[doc = "`reset()` method sets OSCENCMD to value 0"]
110impl crate::Resettable for OSCENCMD_SPEC {
111 #[inline(always)]
112 fn reset_value() -> Self::Ux {
113 0
114 }
115}