memcpy/
main.rs

1use eeric::prelude::*;
2
3use format as F;
4use Instruction as I;
5
6// Example:
7// loop:
8//    vsetvli t0, a2, e8, m8, ta, ma   # Vectors of 8b
9//    vle8.v v0, (a1)               # Load bytes
10//      add a1, a1, t0              # Bump pointer
11//      sub a2, a2, t0              # Decrement count
12//    vse8.v v0, (a3)               # Store bytes
13//      add a3, a3, t0              # Bump pointer
14//      bnez a2, loop               # Any more?
15//      ret
16
17fn main() {
18    // Important note: eeric as low-level back-end abstraction layer does not support pseudo-instructions
19    // Burden of decoding pseudo-instructions is on the front-end layer
20    // E.G: ret == I::Jalr (F::I { rd: ZERO, rs1: RA, imm: 0 }),
21
22    use alias::*;
23
24    let mut core = RvCoreBuilder::default()
25        .instructions(vec![
26            I::Vsetvli(F::Vsetvli {
27                rd: T0,
28                rs1: A2,
29                vtypei: 0b_1_1_000_011,
30            }),
31            I::Vlv {
32                eew: BaseSew::E8,
33                data: F::Vl {
34                    vd: 0,
35                    rs1: A1,
36                    vm: false,
37                },
38            },
39            I::Add(F::R {
40                rd: A1,
41                rs1: A1,
42                rs2: T0,
43            }),
44            I::Sub(F::R {
45                rd: A2,
46                rs1: A2,
47                rs2: T0,
48            }),
49            I::Vsv {
50                eew: BaseSew::E8,
51                data: F::Vs {
52                    vs3: 0,
53                    rs1: A3,
54                    vm: false,
55                },
56            },
57            I::Add(F::R {
58                rd: A3,
59                rs1: A3,
60                rs2: T0,
61            }),
62            I::Bne(F::S {
63                rs1: A2,
64                rs2: ZERO,
65                imm12: -24,
66            }),
67            I::Jalr(F::I {
68                rd: ZERO,
69                rs1: RA,
70                imm12: 0,
71            }),
72        ])
73        .build();
74
75    for machine_state in core.run() {
76        println!("{:?}", machine_state);
77    }
78}
memcpy/main.rs

memcpy/
main.rs
