Expand description
Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.34.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports§
pub use self::uart0 as uart1;pub use self::qspi0 as qspi1;pub use self::pwm0 as pwm1;pub use self::qspi0 as qspi2;pub use self::pwm0 as pwm2;
Modules§
- aonclk
- Always-On Clock Configuration
- backup
- Backup Registers
- generic
- Common register and bit access and modify traits
- gpio0
- General Purpose Input Output
- i2c0
- Inter-Integrated Circuit Master Interface (FE310-G002 only)
- interrupt
- Interrupt numbers, priority levels, and HART IDs.
- otp
- One Time Programmable Memory
- pmu
- PMU
- prci
- Power Reset Clock Interrupts
- pwm0
- 8-bit timer with 4 cmp
- qspi0
- Quad Serial Peripheral Interface
- rtc
- Watchdog
- uart0
- Universal Asynchronous Receiver Transmitter
- wdog
- Watchdog
Structs§
- Aonclk
- Always-On Clock Configuration
- Backup
- Backup Registers
- CLINT
- CLINT peripheral
- Gpio0
- General Purpose Input Output
- I2c0
- Inter-Integrated Circuit Master Interface (FE310-G002 only)
- Otp
- One Time Programmable Memory
- PLIC
- PLIC peripheral
- Peripherals
- All the peripherals.
- Pmu
- PMU
- Prci
- Power Reset Clock Interrupts
- Pwm0
- 8-bit timer with 4 cmp
- Pwm1
- 8-bit timer with 4 cmp
- Pwm2
- 8-bit timer with 4 cmp
- Qspi0
- Quad Serial Peripheral Interface
- Qspi1
- Quad Serial Peripheral Interface
- Qspi2
- Quad Serial Peripheral Interface
- Rtc
- Watchdog
- Uart0
- Universal Asynchronous Receiver Transmitter
- Uart1
- Universal Asynchronous Receiver Transmitter
- Wdog
- Watchdog