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Module dataplane

Module dataplane 

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The CI TS data-plane device: CiDataDevice.

Separate-CI hardware (CXD2099-class CI bridges — a PCIe/USB CI card with no integrated demod) exposes two devices. The control plane is the CA device (CaDevice, caM): the EN 50221 APDU exchange (resource manager, sessions, ca_pmt). The data plane is ciM: the host writes the scrambled Transport Stream into it and reads the descrambled TS back out. This module abstracts the data plane the same way CaDevice abstracts the control plane, so the host-fed descramble path can be driven by a real device (linux feature) or an in-memory mock.

All TS I/O is in whole 188-byte packets (TS_PACKET_LEN); a non-aligned buffer is rejected with io::ErrorKind::InvalidInput.

Structs§

MockCiDataDevice
In-memory CiDataDevice for tests and the differential harness.
PartialWrite
Payload of the io::ErrorKind::WouldBlock error a CiDataDevice::write returns when the device buffer filled before all of the TS was accepted. Read it back with partial_write_progress.

Constants§

TS_PACKET_LEN
MPEG-2 TS packet length (ISO/IEC 13818-1): 188 bytes.

Traits§

CiDataDevice
The TS data-plane device of a separate-CI module (/dev/dvb/adapterN/ciM).

Functions§

partial_write_progress
The whole-packet byte count a CiDataDevice::write error accepted before the device filled, or None when err is not a PartialWrite.