Expand description
§DRV8301 Gate Driver Interface
This crate provides a bisync-based driver for the DRV8301 three-phase gate driver IC,
built upon the device-driver crate for robust, declarative register
definitions via a YAML manifest. It supports both asynchronous (async)
and blocking operation through a unified API, using the bisync crate
for seamless compatibility with both embedded-hal and embedded-hal-async traits.
§Features
- Declarative Register Map: Full device configuration defined in
device.yaml. - Unified Async/Blocking Support: Write your code once and use it in both async and blocking contexts via bisync.
- Type-Safe API: High-level functions for common operations (e.g., setting overcurrent thresholds)
and a generated low-level API (
ll) for direct register access. - Comprehensive Register Coverage: Supports the full feature set of the DRV8301.
defmtandlogIntegration: Optional support for logging and debugging.
§Getting Started
To use the driver, instantiate Drv8301 (blocking) or Drv8301Async (async) with your SPI bus implementation:
let spi_device = todo!();
let mut drv = Drv8301::new(spi_device);
// Check for faults
let has_fault = drv.has_fault()?;For async environments, use Drv8301Async (re-exported from the asynchronous module):
let spi_device = todo!();
let mut drv = Drv8301Async::new(spi_device);
// Check for faults
let has_fault = drv.has_fault().await?;For a detailed register map, please refer to the device.yaml file in the
repository.
§Warning!
Caution! This chip controls power FETs that can handle high voltages and currents. Incorrect configuration can potentially damage FETs, motors, or other components. Proceed with care and always consult the DRV8301 datasheet.
Modules§
- field_
sets - Module containing the generated fieldsets of the registers and commands
Structs§
- Drv8301
- Drv8301
Async - DrvInterface
- DrvLow
Level - Root block of the DrvLowLevel driver
- Fault
Status - Complete fault status from both DRV8301 status registers
Enums§
- DrvError
- Gate
Current - Peak gate drive current settings
- OcAdj
Set - VDS overcurrent threshold settings (typical values)
- OcpMode
- Overcurrent protection operating mode
- Octw
Mode - nOCTW pin reporting mode
- Shunt
Amplifier Gain - Current shunt amplifier gain settings