Struct drone_stm32f1::reg::Value
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pub struct Value<R> { /* fields omitted */ }Register value type.
Methods
impl Value<Tpiuspp>[src]
fn mode(&mut self, mode: TpiusppMode) -> &mut Value<Tpiuspp>[src]
Selects a pin protocol.
impl Value<Tpiuffc>[src]
fn formatter_enable(&mut self, enable: bool) -> &mut Value<Tpiuffc>[src]
Sets EnFCont bit.
Activates or deactivates TPIU formatter.
impl Value<Itmtp>[src]
fn trace_enable(&mut self, mask: ItmtpMask, enable: bool) -> &mut Value<Itmtp>[src]
Enable tracing a range of ports by mask.
impl Value<Itmtc>[src]
fn itm_enable(&mut self, enable: bool) -> &mut Value<Itmtc>[src]
Sets ITMENA bit.
Global Enable Bit of the ITM.
fn atb_id(&mut self, id: u32) -> &mut Value<Itmtc>[src]
Sets ATB ID which identifies the source of the trace data.
Panics
If id is greater or equals to 0x80.
fn busy(&self) -> bool[src]
Returns busy status.
impl Value<Itmla>[src]
impl Value<Mcucr>[src]
fn trace_mode(&mut self, config: McucrTraceMode) -> &mut Value<Mcucr>[src]
Trace pin assignment control.
impl Value<Demcr>[src]
fn trace_enable(&mut self, enable: bool) -> &mut Value<Demcr>[src]
Sets TRCENA bit.
Global enable for all DWT and ITM features.
impl Value<Acr>[src]
fn latency(&mut self, wait_states: AcrWaitStates) -> &mut Value<Acr>[src]
The ratio of the SYSCLK (system clock) period to the Flash access time.
impl<T> Value<Crl<T>>[src]
fn pin_mode(&mut self, pin: CrlPin, config: CrMode) -> &mut Value<Crl<T>>[src]
Sets pin mode configuration bits.
impl<T> Value<Crh<T>>[src]
fn pin_mode(&mut self, pin: CrhPin, config: CrMode) -> &mut Value<Crh<T>>[src]
Sets pin mode configuration bits.
impl Value<Cfgr>[src]
fn pll_multiplication(&mut self, value: u32) -> &mut Value<Cfgr>[src]
fn system_clock(&mut self, clock: CfgrSystemClock) -> &mut Value<Cfgr>[src]
System clock switch.
fn system_clock_status(&mut self) -> CfgrSystemClock[src]
System clock switch status.
impl Value<Aircr>[src]
fn unlock(&mut self) -> &mut Value<Aircr>[src]
Register writes must include this method, otherwise the write is ignored.
fn reset(&mut self) -> &mut Value<Aircr>[src]
System Reset Request.
impl Value<Ctrl>[src]
fn tick(&mut self, enable: bool) -> &mut Value<Ctrl>[src]
Sets TICKINT bit.
SysTick exception request enable.
fn enable(&mut self, enable: bool) -> &mut Value<Ctrl>[src]
Sets ENABLE bit.
Counter enable.
impl Value<Load>[src]
fn value(&mut self, value: u32) -> &mut Value<Load>[src]
Specifies the start value to load into the VAL register when the counter is enabled and when it reaches 0.
Panics
If value is greater than 0xFF_FFFF.
Trait Implementations
impl AcrBits<Value> for Value<Acr>
fn prefetch_enable(&mut self, enable: bool) -> &mut Self[src]
Prefetch buffer enable.
fn half_cycle(&mut self, enable: bool) -> &mut Self[src]
Flash half cycle access enable.
impl BsrrBits<A, Value> for Value<Bsrr<A>>
impl BsrrBits<B, Value> for Value<Bsrr<B>>
impl BsrrBits<C, Value> for Value<Bsrr<C>>
impl BsrrBits<D, Value> for Value<Bsrr<D>>
impl BsrrBits<E, Value> for Value<Bsrr<E>>
impl BsrrBits<F, Value> for Value<Bsrr<F>>
impl BsrrBits<G, Value> for Value<Bsrr<G>>
impl CrBits<Value> for Value<Cr>
fn pll_enable(&mut self, enable: bool) -> &mut Self[src]
PLL enable.
fn hse_enable(&mut self, enable: bool) -> &mut Self[src]
HSE clock enable.
fn hse_bypass(&mut self, bypass: bool) -> &mut Self[src]
External high-speed clock bypass.
fn pll_ready(&self) -> bool[src]
PLL clock ready flag.
fn hse_ready(&self) -> bool[src]
External high-speed clock ready flag.
fn css_enable(&mut self, enable: bool) -> &mut Self[src]
Clock security system enable.
impl CfgrBits<Value> for Value<Cfgr>
fn pll_source(&mut self, source: CfgrPllSource) -> &mut Self[src]
PLL entry clock source.
fn pll_hse_prescaler(&mut self, prescaler: CfgrPllHsePrescaler) -> &mut Self[src]
HSE divider for PLL entry.
impl CirBits<Value> for Value<Cir>
fn css_clear(&mut self) -> &mut Self[src]
Clock security system interrupt clear.
fn css(&self) -> bool[src]
Clock security system interrupt flag.
impl Apb2enrBits<Value> for Value<Apb2enr>
fn port_enable(&mut self, port: Apb2enrIop, enable: bool) -> &mut Self[src]
Enables an IO port clock.
impl<R> RawValue<R> for Value<R>
fn new(value: u32) -> Value<R>
Constructs a new register value wrapper handler.
fn get(&self) -> u32
Returns a raw register value.
fn set(&mut self, value: u32) -> &mut Value<R>
Replaces a raw register value.
fn write_bits(&mut self, source: u32, width: u32, offset: u32) -> &mut Self[src]
Copies any number of low order bits from a source into the same number of adjacent bits at any position in the stored register value. Read more
fn read_bits(&self, width: u32, offset: u32) -> u32[src]
Reads any number of low order bits at any position from the stored register value. Read more