display_types/
input.rs

1bitflags::bitflags! {
2    /// Boolean flags from EDID byte `0x14` (Video Input Definition).
3    ///
4    /// Bit 7 (`DIGITAL`) determines the input type. Bits 4–0 are only meaningful
5    /// for analog displays. The multi-bit fields in this byte (color bit depth,
6    /// video interface type, and analog sync level) are not represented here —
7    /// those require dedicated enum types.
8    #[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9    #[derive(Debug, Clone, Copy, PartialEq, Eq)]
10    pub struct VideoInputFlags: u8 {
11        /// Digital input. When clear, the display uses an analog input interface.
12        const DIGITAL          = 0x80;
13        /// Blank-to-black setup (pedestal) expected (analog only).
14        const BLANK_TO_BLACK   = 0x10;
15        /// Separate sync signals are supported (analog only).
16        const SEPARATE_SYNC    = 0x08;
17        /// Composite sync on HSync is supported (analog only).
18        const COMPOSITE_SYNC   = 0x04;
19        /// Sync on green is supported (analog only).
20        const SYNC_ON_GREEN    = 0x02;
21        /// VSync pulse must be serrated when composite or sync-on-green is used (analog only).
22        const SERRATION        = 0x01;
23    }
24}
25
26/// Video white and sync levels for an analog display, decoded from EDID base block
27/// byte `0x14` bits 6–5.
28///
29/// Specifies the signal voltage levels used for video white and sync, relative to blank.
30#[non_exhaustive]
31#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
32#[derive(Debug, Clone, Copy, PartialEq, Eq)]
33pub enum AnalogSyncLevel {
34    /// 0.700 V video / 0.300 V sync / 1.000 V total (most common).
35    V700_300,
36    /// 0.714 V video / 0.286 V sync / 1.000 V total (EGA/CGA-compatible).
37    V714_286,
38    /// 1.000 V video / 0.400 V sync / 1.400 V total.
39    V1000_400,
40    /// 0.700 V video / 0.000 V sync / 0.700 V total.
41    V700_0,
42}
43
44/// Video interface type, decoded from EDID base block byte `0x14` bits 3–0.
45///
46/// Only valid for digital input displays. `None` is used for the undefined (0x0)
47/// and reserved (0x6–0xF) values.
48#[non_exhaustive]
49#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
50#[derive(Debug, Clone, Copy, PartialEq, Eq)]
51pub enum VideoInterface {
52    /// DVI interface.
53    Dvi,
54    /// HDMI-a interface.
55    HdmiA,
56    /// HDMI-b interface.
57    HdmiB,
58    /// MDDI (Mobile Display Digital Interface).
59    Mddi,
60    /// DisplayPort interface.
61    DisplayPort,
62}
display_types/input.rs

display_types/
input.rs
