Struct disasm6502::instruction::Instruction

pub struct Instruction {
    pub opcode: OpCode,
    pub cycles: u8,
    pub addr_mode: AddrMode,
    pub address: u16,
    pub operand: Option<u16>,
    pub extra_cycle: bool,
    pub illegal: bool,
    pub registers_read: RegVec,
    pub registers_written: RegVec,
}

Decoded 6502 instruction.

Fields

opcode: OpCode

instruction opcode

cycles: u8

cycle count for the instruction

addr_mode: AddrMode

instruction addressing mode

address: u16

address of the instruction in memory buffer

operand: Option<u16>

optional instruction operand

extra_cycle: bool

instruction may take an extra cycle if zero page boundary is crossed

illegal: bool

instruction is illegal/undocumented

registers_read: RegVec

registers read by this instruction (optional)

registers_written: RegVec

registers written by this instruction (optional)

Methods

impl Instruction

fn as_hex_str(&self) -> String

Convert instruction to fixed length string of hex values (opcode + operand, if applicable).

Examples

extern crate disasm6502;

let memory = vec![0x05, 0x0B, 0x6C, 0x01, 0x02];

// set program counter to 0 - will decode first instruction
let mut pc: usize = 0;

// interprets 0x05 as an instruction, places it at $0800
let instruction = disasm6502::instruction::decode(0x0800, &mut pc, &memory);

// prints: "0x05 0x0B   " (instruction + operand value)
println!("{}", instruction.as_hex_str());

fn as_str(&self) -> String

Convert instruction to assembler mnemonic.

Examples

extern crate disasm6502;

let memory = vec![0x05, 0x0B, 0x6C, 0x01, 0x02];

// set program counter to 0 - will decode first instruction
let mut pc: usize = 0;

// interprets 0x05 as an instruction, places it at $0800
let instruction = disasm6502::instruction::decode(0x0800, &mut pc, &memory);

// prints: "ORA $0B"
println!("{}", instruction.as_str());

Trait Implementations

impl Display for Instruction

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.