da14697_pac/
gpreg.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"GPREG registers"]
28unsafe impl ::core::marker::Send for super::Gpreg {}
29unsafe impl ::core::marker::Sync for super::Gpreg {}
30impl super::Gpreg {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Various debug information register."]
38    #[inline(always)]
39    pub const fn debug_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::DebugReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::DebugReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(8usize),
45            )
46        }
47    }
48
49    #[doc = "General purpose system control register."]
50    #[inline(always)]
51    pub const fn gp_control_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::GpControlReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::GpControlReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(16usize),
57            )
58        }
59    }
60
61    #[doc = "General purpose system status register."]
62    #[inline(always)]
63    pub const fn gp_status_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::GpStatusReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::GpStatusReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(12usize),
69            )
70        }
71    }
72
73    #[doc = "Controls unfreezing of various timers/counters (incl. DMA and USB)."]
74    #[inline(always)]
75    pub const fn reset_freeze_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::ResetFreezeReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::ResetFreezeReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(4usize),
81            )
82        }
83    }
84
85    #[doc = "Controls freezing of various timers/counters (incl. DMA and USB)."]
86    #[inline(always)]
87    pub const fn set_freeze_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::SetFreezeReg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::SetFreezeReg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(0usize),
93            )
94        }
95    }
96
97    #[doc = "USB pads control register"]
98    #[inline(always)]
99    pub const fn usbpad_reg(
100        &self,
101    ) -> &'static crate::common::Reg<self::UsbpadReg_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::UsbpadReg_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(24usize),
105            )
106        }
107    }
108}
109#[doc(hidden)]
110#[derive(Copy, Clone, Eq, PartialEq)]
111pub struct DebugReg_SPEC;
112impl crate::sealed::RegSpec for DebugReg_SPEC {
113    type DataType = u32;
114}
115
116#[doc = "Various debug information register."]
117pub type DebugReg = crate::RegValueT<DebugReg_SPEC>;
118
119impl DebugReg {
120    #[doc = "Select the cross CPU halt sensitivity.\n0: Level triggered,\n1: Pulse triggered.\nNote: This bit is retained."]
121    #[inline(always)]
122    pub fn cross_cpu_halt_sensitivity(
123        self,
124    ) -> crate::common::RegisterFieldBool<8, 1, 0, DebugReg_SPEC, crate::common::RW> {
125        crate::common::RegisterFieldBool::<8, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
126            self, 0,
127        )
128    }
129
130    #[doc = "1: Stall the processor core out of reset (only after a wake-up from JTAG). Debugger access continue when the core is stalled. When set to \'0\' again the core resumes instruction execution.\nThis feature is independent of the PDC (Power Domain Controller) settings. If this bit is set and there is SW/JTAG activity during deep sleep, the SYS CPU is stalled after the wake-up.\nNote: This bit is retained."]
131    #[inline(always)]
132    pub fn sys_cpuwait_on_jtag(
133        self,
134    ) -> crate::common::RegisterFieldBool<7, 1, 0, DebugReg_SPEC, crate::common::RW> {
135        crate::common::RegisterFieldBool::<7, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
136            self, 0,
137        )
138    }
139
140    #[doc = "1: Stall the processor core out of reset (always after a wake-up). Debugger access continue when the core is stalled. When set to \'0\' again the core resumes instruction execution.\nNote: This bit is retained."]
141    #[inline(always)]
142    pub fn sys_cpuwait(
143        self,
144    ) -> crate::common::RegisterFieldBool<6, 1, 0, DebugReg_SPEC, crate::common::RW> {
145        crate::common::RegisterFieldBool::<6, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
146            self, 0,
147        )
148    }
149
150    #[doc = "1: CMAC CPU is halted."]
151    #[inline(always)]
152    pub fn cmac_cpu_is_halted(
153        self,
154    ) -> crate::common::RegisterFieldBool<5, 1, 0, DebugReg_SPEC, crate::common::R> {
155        crate::common::RegisterFieldBool::<5, 1, 0, DebugReg_SPEC, crate::common::R>::from_register(
156            self, 0,
157        )
158    }
159
160    #[doc = "1: SYS CPU (ARM CM33) is halted."]
161    #[inline(always)]
162    pub fn sys_cpu_is_halted(
163        self,
164    ) -> crate::common::RegisterFieldBool<4, 1, 0, DebugReg_SPEC, crate::common::R> {
165        crate::common::RegisterFieldBool::<4, 1, 0, DebugReg_SPEC, crate::common::R>::from_register(
166            self, 0,
167        )
168    }
169
170    #[doc = "1: Enable CMAC CPU halting to the SYS CPU (ARM CM33).\nNote 1: This bit is retained.\nNote 2: Set this bit to \'0\' before going into deep sleep to prevent unpredictable halting behavior after waking up."]
171    #[inline(always)]
172    pub fn halt_cmac_sys_cpu_en(
173        self,
174    ) -> crate::common::RegisterFieldBool<3, 1, 0, DebugReg_SPEC, crate::common::RW> {
175        crate::common::RegisterFieldBool::<3, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
176            self, 0,
177        )
178    }
179
180    #[doc = "1: Enable SYS CPU (ARM CM33) halting to the CMAC CPU.\nNote 1: This bit is retained.\nNote 2: Set this bit to \'0\' before going into deep sleep to prevent unpredictable halting behavior after waking up."]
181    #[inline(always)]
182    pub fn halt_sys_cmac_cpu_en(
183        self,
184    ) -> crate::common::RegisterFieldBool<2, 1, 0, DebugReg_SPEC, crate::common::RW> {
185        crate::common::RegisterFieldBool::<2, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
186            self, 0,
187        )
188    }
189
190    #[doc = "1: Enable Freezing on-chip peripherals (see Note 2) by the CMAC CPU.\nNote 1: This bit is retained.\nNote 2: See \\[RE\\]SET_FREEZE_REG for the specific on-chip peripherals."]
191    #[inline(always)]
192    pub fn cmac_cpu_freeze_en(
193        self,
194    ) -> crate::common::RegisterFieldBool<1, 1, 0, DebugReg_SPEC, crate::common::RW> {
195        crate::common::RegisterFieldBool::<1, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
196            self, 0,
197        )
198    }
199
200    #[doc = "1: Enable Freezing on-chip peripherals (see Note 2) by the SYS CPU (ARM CM33).\nDefault \'1\', freezing of the on-chip peripherals is enabled when the Cortex-M33 is halted in DEBUG State.\nIf \'0\', freezing of the on-chip peripherals is only depending on \\[RE\\]SET_FREEZE_REG except the system watchdog timer. The system watchdog timer is always frozen when the Cortex-M33 is halted in DEBUG State.\nNote 1: This bit is retained.\nNote 2: See \\[RE\\]SET_FREEZE_REG for the specific on-chip peripherals."]
201    #[inline(always)]
202    pub fn sys_cpu_freeze_en(
203        self,
204    ) -> crate::common::RegisterFieldBool<0, 1, 0, DebugReg_SPEC, crate::common::RW> {
205        crate::common::RegisterFieldBool::<0, 1, 0, DebugReg_SPEC, crate::common::RW>::from_register(
206            self, 0,
207        )
208    }
209}
210impl ::core::default::Default for DebugReg {
211    #[inline(always)]
212    fn default() -> DebugReg {
213        <crate::RegValueT<DebugReg_SPEC> as RegisterValue<_>>::new(257)
214    }
215}
216
217#[doc(hidden)]
218#[derive(Copy, Clone, Eq, PartialEq)]
219pub struct GpControlReg_SPEC;
220impl crate::sealed::RegSpec for GpControlReg_SPEC {
221    type DataType = u32;
222}
223
224#[doc = "General purpose system control register."]
225pub type GpControlReg = crate::RegValueT<GpControlReg_SPEC>;
226
227impl GpControlReg {
228    #[doc = "If \'1\', the AHB-to-AHB bridge is bypassed, reducing the wait cycles needed to access the CMAC Register File, only when the system clock source is the XTAL and both hclk and cmac_hclk are running at 32 MHz, i.e. at the XTAL clock rate."]
229    #[inline(always)]
230    pub fn cmac_h2h_bridge_bypass(
231        self,
232    ) -> crate::common::RegisterFieldBool<1, 1, 0, GpControlReg_SPEC, crate::common::RW> {
233        crate::common::RegisterFieldBool::<1,1,0,GpControlReg_SPEC,crate::common::RW>::from_register(self,0)
234    }
235}
236impl ::core::default::Default for GpControlReg {
237    #[inline(always)]
238    fn default() -> GpControlReg {
239        <crate::RegValueT<GpControlReg_SPEC> as RegisterValue<_>>::new(0)
240    }
241}
242
243#[doc(hidden)]
244#[derive(Copy, Clone, Eq, PartialEq)]
245pub struct GpStatusReg_SPEC;
246impl crate::sealed::RegSpec for GpStatusReg_SPEC {
247    type DataType = u32;
248}
249
250#[doc = "General purpose system status register."]
251pub type GpStatusReg = crate::RegValueT<GpStatusReg_SPEC>;
252
253impl GpStatusReg {
254    #[doc = "If \'1\', it designates that the chip is in Calibration Phase i.e. the OTP has been initially programmed but no Calibration has occured."]
255    #[inline(always)]
256    pub fn cal_phase(
257        self,
258    ) -> crate::common::RegisterFieldBool<0, 1, 0, GpStatusReg_SPEC, crate::common::RW> {
259        crate::common::RegisterFieldBool::<0,1,0,GpStatusReg_SPEC,crate::common::RW>::from_register(self,0)
260    }
261}
262impl ::core::default::Default for GpStatusReg {
263    #[inline(always)]
264    fn default() -> GpStatusReg {
265        <crate::RegValueT<GpStatusReg_SPEC> as RegisterValue<_>>::new(0)
266    }
267}
268
269#[doc(hidden)]
270#[derive(Copy, Clone, Eq, PartialEq)]
271pub struct ResetFreezeReg_SPEC;
272impl crate::sealed::RegSpec for ResetFreezeReg_SPEC {
273    type DataType = u32;
274}
275
276#[doc = "Controls unfreezing of various timers/counters (incl. DMA and USB)."]
277pub type ResetFreezeReg = crate::RegValueT<ResetFreezeReg_SPEC>;
278
279impl ResetFreezeReg {
280    #[doc = "If \'1\', the CMAC SW Watchdog Timer continues, \'0\' is discarded."]
281    #[inline(always)]
282    pub fn frz_cmac_wdog(
283        self,
284    ) -> crate::common::RegisterFieldBool<10, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
285        crate::common::RegisterFieldBool::<10,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
286    }
287
288    #[doc = "If \'1\', the SW Timer4 continues, \'0\' is discarded."]
289    #[inline(always)]
290    pub fn frz_swtim4(
291        self,
292    ) -> crate::common::RegisterFieldBool<9, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
293        crate::common::RegisterFieldBool::<9,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
294    }
295
296    #[doc = "If \'1\', the SW Timer3 continues, \'0\' is discarded."]
297    #[inline(always)]
298    pub fn frz_swtim3(
299        self,
300    ) -> crate::common::RegisterFieldBool<8, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
301        crate::common::RegisterFieldBool::<8,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
302    }
303
304    #[doc = "If \'1\', the PWM LED continues, \'0\' is discarded."]
305    #[inline(always)]
306    pub fn frz_pwmled(
307        self,
308    ) -> crate::common::RegisterFieldBool<7, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
309        crate::common::RegisterFieldBool::<7,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
310    }
311
312    #[doc = "If \'1\', the SW Timer2 continues, \'0\' is discarded."]
313    #[inline(always)]
314    pub fn frz_swtim2(
315        self,
316    ) -> crate::common::RegisterFieldBool<6, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
317        crate::common::RegisterFieldBool::<6,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
318    }
319
320    #[doc = "If \'1\', the DMA continues, \'0\' is discarded."]
321    #[inline(always)]
322    pub fn frz_dma(
323        self,
324    ) -> crate::common::RegisterFieldBool<5, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
325        crate::common::RegisterFieldBool::<5,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
326    }
327
328    #[doc = "If \'1\', the USB continues, \'0\' is discarded."]
329    #[inline(always)]
330    pub fn frz_usb(
331        self,
332    ) -> crate::common::RegisterFieldBool<4, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
333        crate::common::RegisterFieldBool::<4,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
334    }
335
336    #[doc = "If \'1\', the SYS SW Watchdog Timer continues, \'0\' is discarded."]
337    #[inline(always)]
338    pub fn frz_sys_wdog(
339        self,
340    ) -> crate::common::RegisterFieldBool<3, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
341        crate::common::RegisterFieldBool::<3,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
342    }
343
344    #[inline(always)]
345    pub fn frz_reserved(
346        self,
347    ) -> crate::common::RegisterFieldBool<2, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
348        crate::common::RegisterFieldBool::<2,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
349    }
350
351    #[doc = "If \'1\', the SW Timer continues, \'0\' is discarded."]
352    #[inline(always)]
353    pub fn frz_swtim(
354        self,
355    ) -> crate::common::RegisterFieldBool<1, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
356        crate::common::RegisterFieldBool::<1,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
357    }
358
359    #[doc = "If \'1\', the Wake Up Timer continues, \'0\' is discarded."]
360    #[inline(always)]
361    pub fn frz_wkuptim(
362        self,
363    ) -> crate::common::RegisterFieldBool<0, 1, 0, ResetFreezeReg_SPEC, crate::common::RW> {
364        crate::common::RegisterFieldBool::<0,1,0,ResetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
365    }
366}
367impl ::core::default::Default for ResetFreezeReg {
368    #[inline(always)]
369    fn default() -> ResetFreezeReg {
370        <crate::RegValueT<ResetFreezeReg_SPEC> as RegisterValue<_>>::new(0)
371    }
372}
373
374#[doc(hidden)]
375#[derive(Copy, Clone, Eq, PartialEq)]
376pub struct SetFreezeReg_SPEC;
377impl crate::sealed::RegSpec for SetFreezeReg_SPEC {
378    type DataType = u32;
379}
380
381#[doc = "Controls freezing of various timers/counters (incl. DMA and USB)."]
382pub type SetFreezeReg = crate::RegValueT<SetFreezeReg_SPEC>;
383
384impl SetFreezeReg {
385    #[doc = "If \'1\', the CMAC SW Watchdog Timer is frozen, \'0\' is discarded."]
386    #[inline(always)]
387    pub fn frz_cmac_wdog(
388        self,
389    ) -> crate::common::RegisterFieldBool<10, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
390        crate::common::RegisterFieldBool::<10,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
391    }
392
393    #[doc = "If \'1\', the SW Timer4 is frozen, \'0\' is discarded."]
394    #[inline(always)]
395    pub fn frz_swtim4(
396        self,
397    ) -> crate::common::RegisterFieldBool<9, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
398        crate::common::RegisterFieldBool::<9,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
399    }
400
401    #[doc = "If \'1\', the SW Timer3 is frozen, \'0\' is discarded."]
402    #[inline(always)]
403    pub fn frz_swtim3(
404        self,
405    ) -> crate::common::RegisterFieldBool<8, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
406        crate::common::RegisterFieldBool::<8,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
407    }
408
409    #[doc = "If \'1\', the PWM LED is frozen, \'0\' is discarded."]
410    #[inline(always)]
411    pub fn frz_pwmled(
412        self,
413    ) -> crate::common::RegisterFieldBool<7, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
414        crate::common::RegisterFieldBool::<7,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
415    }
416
417    #[doc = "If \'1\', the SW Timer2 is frozen, \'0\' is discarded."]
418    #[inline(always)]
419    pub fn frz_swtim2(
420        self,
421    ) -> crate::common::RegisterFieldBool<6, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
422        crate::common::RegisterFieldBool::<6,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
423    }
424
425    #[doc = "If \'1\', the DMA is frozen, \'0\' is discarded."]
426    #[inline(always)]
427    pub fn frz_dma(
428        self,
429    ) -> crate::common::RegisterFieldBool<5, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
430        crate::common::RegisterFieldBool::<5,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
431    }
432
433    #[doc = "If \'1\', the USB is frozen, \'0\' is discarded."]
434    #[inline(always)]
435    pub fn frz_usb(
436        self,
437    ) -> crate::common::RegisterFieldBool<4, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
438        crate::common::RegisterFieldBool::<4,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
439    }
440
441    #[doc = "If \'1\', the SYS SW Watchdog Timer is frozen, \'0\' is discarded. WATCHDOG_CTRL_REG\\[NMI_RST\\] must be \'0\' to allow the freeze function."]
442    #[inline(always)]
443    pub fn frz_sys_wdog(
444        self,
445    ) -> crate::common::RegisterFieldBool<3, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
446        crate::common::RegisterFieldBool::<3,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
447    }
448
449    #[inline(always)]
450    pub fn frz_reserved(
451        self,
452    ) -> crate::common::RegisterFieldBool<2, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
453        crate::common::RegisterFieldBool::<2,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
454    }
455
456    #[doc = "If \'1\', the SW Timer is frozen, \'0\' is discarded."]
457    #[inline(always)]
458    pub fn frz_swtim(
459        self,
460    ) -> crate::common::RegisterFieldBool<1, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
461        crate::common::RegisterFieldBool::<1,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
462    }
463
464    #[doc = "If \'1\', the Wake Up Timer is frozen, \'0\' is discarded."]
465    #[inline(always)]
466    pub fn frz_wkuptim(
467        self,
468    ) -> crate::common::RegisterFieldBool<0, 1, 0, SetFreezeReg_SPEC, crate::common::RW> {
469        crate::common::RegisterFieldBool::<0,1,0,SetFreezeReg_SPEC,crate::common::RW>::from_register(self,0)
470    }
471}
472impl ::core::default::Default for SetFreezeReg {
473    #[inline(always)]
474    fn default() -> SetFreezeReg {
475        <crate::RegValueT<SetFreezeReg_SPEC> as RegisterValue<_>>::new(0)
476    }
477}
478
479#[doc(hidden)]
480#[derive(Copy, Clone, Eq, PartialEq)]
481pub struct UsbpadReg_SPEC;
482impl crate::sealed::RegSpec for UsbpadReg_SPEC {
483    type DataType = u32;
484}
485
486#[doc = "USB pads control register"]
487pub type UsbpadReg = crate::RegValueT<UsbpadReg_SPEC>;
488
489impl UsbpadReg {
490    #[doc = "0: Pull up resistor SW2 is controlled by the USB controller. It is off when the USB is not enabled.\n1: Force the pull up resistor on USBP to be 2.3Kohm"]
491    #[inline(always)]
492    pub fn usbphy_force_sw2_on(
493        self,
494    ) -> crate::common::RegisterFieldBool<2, 1, 0, UsbpadReg_SPEC, crate::common::RW> {
495        crate::common::RegisterFieldBool::<2,1,0,UsbpadReg_SPEC,crate::common::RW>::from_register(self,0)
496    }
497
498    #[doc = "0: Pull up resistor SW1 is controlled by the USB controller. It is off when the USB is not enabled.\n1: Force the pull up resistor on USBP to be switched off."]
499    #[inline(always)]
500    pub fn usbphy_force_sw1_off(
501        self,
502    ) -> crate::common::RegisterFieldBool<1, 1, 0, UsbpadReg_SPEC, crate::common::RW> {
503        crate::common::RegisterFieldBool::<1,1,0,UsbpadReg_SPEC,crate::common::RW>::from_register(self,0)
504    }
505
506    #[doc = "0: The power for the USB PHY and USB pads is switched on when the USB is enabled.\n1: The power for the USB PHY and USB pads is forced on."]
507    #[inline(always)]
508    pub fn usbpad_en(
509        self,
510    ) -> crate::common::RegisterFieldBool<0, 1, 0, UsbpadReg_SPEC, crate::common::RW> {
511        crate::common::RegisterFieldBool::<0,1,0,UsbpadReg_SPEC,crate::common::RW>::from_register(self,0)
512    }
513}
514impl ::core::default::Default for UsbpadReg {
515    #[inline(always)]
516    fn default() -> UsbpadReg {
517        <crate::RegValueT<UsbpadReg_SPEC> as RegisterValue<_>>::new(0)
518    }
519}
da14697_pac/gpreg.rs

da14697_pac/
gpreg.rs
