da14697_pac/
cmac_timer_slp.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"CMAC_TIMER_SLP registers"]
28unsafe impl ::core::marker::Send for super::CmacTimerSlp {}
29unsafe impl ::core::marker::Sync for super::CmacTimerSlp {}
30impl super::CmacTimerSlp {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CMAC Sleep Control 2 (no RMW)"]
38    #[inline(always)]
39    pub const fn cm_slp_ctrl2_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::CmSlpCtrl2Reg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::CmSlpCtrl2Reg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(4usize),
45            )
46        }
47    }
48
49    #[doc = "CMAC Sleep Control 1 (allowed to RMW)"]
50    #[inline(always)]
51    pub const fn cm_slp_ctrl_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::CmSlpCtrlReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::CmSlpCtrlReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(0usize),
57            )
58        }
59    }
60
61    #[doc = "CMAC Sleep Timer"]
62    #[inline(always)]
63    pub const fn cm_slp_timer_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::CmSlpTimerReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::CmSlpTimerReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(8usize),
69            )
70        }
71    }
72}
73#[doc(hidden)]
74#[derive(Copy, Clone, Eq, PartialEq)]
75pub struct CmSlpCtrl2Reg_SPEC;
76impl crate::sealed::RegSpec for CmSlpCtrl2Reg_SPEC {
77    type DataType = u32;
78}
79
80#[doc = "CMAC Sleep Control 2 (no RMW)"]
81pub type CmSlpCtrl2Reg = crate::RegValueT<CmSlpCtrl2Reg_SPEC>;
82
83impl CmSlpCtrl2Reg {
84    #[doc = "Provides the current state of CMAC_WAKEUP_ON_SWD.\nWriting \'1\' will clear this bit.\nWriting \'0\' has no effect.\nWhen CM_SLP_CTRL_REG->CMAC_WAKEUP_ON_SWD_EN=1 and the Radio Power Domain is down and SYS_CTRL_REG->CMAC_DEBUGGER_ENABLE=1 then any negative edge on SWDCLK pin will set the CMAC_WAKEUP_ON_SWD.\nThe CMAC_WAKEUP_ON_SWD logically OR-ed with SLP_TIMER_IRQ is connected to PDC and thus it is able to wake up the CMAC, allowing the connection of CMAC Cortex with the debugger.\nNote: If the pins are not used as CMAC SWD, then keep SYS_CTRL_REG->CMAC_DEBUGGER_ENABLE=0 to avoid false wakeup triggers."]
85    #[inline(always)]
86    pub fn cmac_wakeup_on_swd_state(
87        self,
88    ) -> crate::common::RegisterFieldBool<8, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::RW> {
89        crate::common::RegisterFieldBool::<8,1,0,CmSlpCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
90    }
91
92    #[doc = "Refer to CM_SLP_CTRL_REG->SLP_TIMER_ACTIVE"]
93    #[inline(always)]
94    pub fn slp_timer_active(
95        self,
96    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::R> {
97        crate::common::RegisterFieldBool::<7,1,0,CmSlpCtrl2Reg_SPEC,crate::common::R>::from_register(self,0)
98    }
99
100    #[doc = "Refer to CM_SLP_CTRL_REG->LP_CLK_STATE."]
101    #[inline(always)]
102    pub fn lp_clk_state(
103        self,
104    ) -> crate::common::RegisterFieldBool<6, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::R> {
105        crate::common::RegisterFieldBool::<6,1,0,CmSlpCtrl2Reg_SPEC,crate::common::R>::from_register(self,0)
106    }
107
108    #[doc = "Timer sign"]
109    #[inline(always)]
110    pub fn slp_timer_cnt_sign(
111        self,
112    ) -> crate::common::RegisterFieldBool<5, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::R> {
113        crate::common::RegisterFieldBool::<5,1,0,CmSlpCtrl2Reg_SPEC,crate::common::R>::from_register(self,0)
114    }
115
116    #[doc = "Writing \'1\' will cause the IRQ to be set. This field remains to \'1\' until the IRQ is set.\nWriting \'0\' has no effect.\nSystem CPU SW may use this field to force CMAC to wakeup through SLP_TIMER.\nNote that typically SW wakes up CMAC through the SYS2CMAC_IRQ (via PDC)."]
117    #[inline(always)]
118    pub fn slp_timer_irq_set(
119        self,
120    ) -> crate::common::RegisterFieldBool<2, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::RW> {
121        crate::common::RegisterFieldBool::<2,1,0,CmSlpCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
122    }
123
124    #[doc = "Writing \'1\' will cause the IRQ to be cleared. This field remains to \'1\' until the IRQ is cleared.\nWriting \'0\' has no effect.\nNote that clearing the IRQ is not possible as long as the Timer is \"1\", since the Expire event has higher priority."]
125    #[inline(always)]
126    pub fn slp_timer_irq_clr(
127        self,
128    ) -> crate::common::RegisterFieldBool<1, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::RW> {
129        crate::common::RegisterFieldBool::<1,1,0,CmSlpCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
130    }
131
132    #[doc = "Provides the current state of the CMAC Sleep Timer IRQ."]
133    #[inline(always)]
134    pub fn slp_timer_irq_state(
135        self,
136    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmSlpCtrl2Reg_SPEC, crate::common::R> {
137        crate::common::RegisterFieldBool::<0,1,0,CmSlpCtrl2Reg_SPEC,crate::common::R>::from_register(self,0)
138    }
139}
140impl ::core::default::Default for CmSlpCtrl2Reg {
141    #[inline(always)]
142    fn default() -> CmSlpCtrl2Reg {
143        <crate::RegValueT<CmSlpCtrl2Reg_SPEC> as RegisterValue<_>>::new(0)
144    }
145}
146
147#[doc(hidden)]
148#[derive(Copy, Clone, Eq, PartialEq)]
149pub struct CmSlpCtrlReg_SPEC;
150impl crate::sealed::RegSpec for CmSlpCtrlReg_SPEC {
151    type DataType = u32;
152}
153
154#[doc = "CMAC Sleep Control 1 (allowed to RMW)"]
155pub type CmSlpCtrlReg = crate::RegValueT<CmSlpCtrlReg_SPEC>;
156
157impl CmSlpCtrlReg {
158    #[doc = "If \'1\' then enable the generation of CMAC_WAKEUP_ON_SWD."]
159    #[inline(always)]
160    pub fn cmac_wakeup_on_swd_en(
161        self,
162    ) -> crate::common::RegisterFieldBool<24, 1, 0, CmSlpCtrlReg_SPEC, crate::common::RW> {
163        crate::common::RegisterFieldBool::<24,1,0,CmSlpCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
164    }
165
166    #[doc = "T Clock"]
167    #[inline(always)]
168    pub fn tclk_from_lpclk(
169        self,
170    ) -> crate::common::RegisterFieldBool<9, 1, 0, CmSlpCtrlReg_SPEC, crate::common::RW> {
171        crate::common::RegisterFieldBool::<9,1,0,CmSlpCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
172    }
173
174    #[doc = "T Clock"]
175    #[inline(always)]
176    pub fn tclk_from_pclk(
177        self,
178    ) -> crate::common::RegisterFieldBool<8, 1, 0, CmSlpCtrlReg_SPEC, crate::common::RW> {
179        crate::common::RegisterFieldBool::<8,1,0,CmSlpCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
180    }
181
182    #[doc = "Refer to SLP_TIMER_SW"]
183    #[inline(always)]
184    pub fn slp_timer_active(
185        self,
186    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmSlpCtrlReg_SPEC, crate::common::R> {
187        crate::common::RegisterFieldBool::<7,1,0,CmSlpCtrlReg_SPEC,crate::common::R>::from_register(self,0)
188    }
189
190    #[doc = "LP_CLK state"]
191    #[inline(always)]
192    pub fn lp_clk_state(
193        self,
194    ) -> crate::common::RegisterFieldBool<6, 1, 0, CmSlpCtrlReg_SPEC, crate::common::R> {
195        crate::common::RegisterFieldBool::<6,1,0,CmSlpCtrlReg_SPEC,crate::common::R>::from_register(self,0)
196    }
197
198    #[doc = "Refer to CM_SLP_CTRL2_REG->SLP_TIMER_CNT_SIGN."]
199    #[inline(always)]
200    pub fn slp_timer_cnt_sign(
201        self,
202    ) -> crate::common::RegisterFieldBool<5, 1, 0, CmSlpCtrlReg_SPEC, crate::common::R> {
203        crate::common::RegisterFieldBool::<5,1,0,CmSlpCtrlReg_SPEC,crate::common::R>::from_register(self,0)
204    }
205
206    #[doc = "Timer SW"]
207    #[inline(always)]
208    pub fn slp_timer_sw(
209        self,
210    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmSlpCtrlReg_SPEC, crate::common::RW> {
211        crate::common::RegisterFieldBool::<0,1,0,CmSlpCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
212    }
213}
214impl ::core::default::Default for CmSlpCtrlReg {
215    #[inline(always)]
216    fn default() -> CmSlpCtrlReg {
217        <crate::RegValueT<CmSlpCtrlReg_SPEC> as RegisterValue<_>>::new(0)
218    }
219}
220
221#[doc(hidden)]
222#[derive(Copy, Clone, Eq, PartialEq)]
223pub struct CmSlpTimerReg_SPEC;
224impl crate::sealed::RegSpec for CmSlpTimerReg_SPEC {
225    type DataType = u32;
226}
227
228#[doc = "CMAC Sleep Timer"]
229pub type CmSlpTimerReg = crate::RegValueT<CmSlpTimerReg_SPEC>;
230
231impl CmSlpTimerReg {
232    #[doc = "Timer value"]
233    #[inline(always)]
234    pub fn cm_slp_timer_value(
235        self,
236    ) -> crate::common::RegisterField<
237        0,
238        0xffffffff,
239        1,
240        0,
241        u32,
242        u32,
243        CmSlpTimerReg_SPEC,
244        crate::common::RW,
245    > {
246        crate::common::RegisterField::<
247            0,
248            0xffffffff,
249            1,
250            0,
251            u32,
252            u32,
253            CmSlpTimerReg_SPEC,
254            crate::common::RW,
255        >::from_register(self, 0)
256    }
257}
258impl ::core::default::Default for CmSlpTimerReg {
259    #[inline(always)]
260    fn default() -> CmSlpTimerReg {
261        <crate::RegValueT<CmSlpTimerReg_SPEC> as RegisterValue<_>>::new(0)
262    }
263}
da14697_pac/cmac_timer_slp.rs

da14697_pac/
cmac_timer_slp.rs
