da14682_pac/
gp_timers.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:10 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"GP_TIMERS registers"]
28unsafe impl ::core::marker::Send for super::GpTimers {}
29unsafe impl ::core::marker::Sync for super::GpTimers {}
30impl super::GpTimers {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Breath configuration register"]
38    #[inline(always)]
39    pub const fn breath_cfg_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::BreathCfgReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::BreathCfgReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(24usize),
45            )
46        }
47    }
48
49    #[doc = "Breath control register"]
50    #[inline(always)]
51    pub const fn breath_ctrl_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::BreathCtrlReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::BreathCtrlReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(30usize),
57            )
58        }
59    }
60
61    #[doc = "Breath max duty cycle register"]
62    #[inline(always)]
63    pub const fn breath_duty_max_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::BreathDutyMaxReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::BreathDutyMaxReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(26usize),
69            )
70        }
71    }
72
73    #[doc = "Breath min duty cycle register"]
74    #[inline(always)]
75    pub const fn breath_duty_min_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::BreathDutyMinReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::BreathDutyMinReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(28usize),
81            )
82        }
83    }
84
85    #[doc = "Defines end Cycle for PWM2"]
86    #[inline(always)]
87    pub const fn pwm2_end_cycle(
88        &self,
89    ) -> &'static crate::common::Reg<self::Pwm2EndCycle_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Pwm2EndCycle_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(14usize),
93            )
94        }
95    }
96
97    #[doc = "Defines start Cycle for PWM2"]
98    #[inline(always)]
99    pub const fn pwm2_start_cycle(
100        &self,
101    ) -> &'static crate::common::Reg<self::Pwm2StartCycle_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Pwm2StartCycle_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(8usize),
105            )
106        }
107    }
108
109    #[doc = "Defines end Cycle for PWM3"]
110    #[inline(always)]
111    pub const fn pwm3_end_cycle(
112        &self,
113    ) -> &'static crate::common::Reg<self::Pwm3EndCycle_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Pwm3EndCycle_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(16usize),
117            )
118        }
119    }
120
121    #[doc = "Defines start Cycle for PWM3"]
122    #[inline(always)]
123    pub const fn pwm3_start_cycle(
124        &self,
125    ) -> &'static crate::common::Reg<self::Pwm3StartCycle_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::Pwm3StartCycle_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(10usize),
129            )
130        }
131    }
132
133    #[doc = "Defines end Cycle for PWM4"]
134    #[inline(always)]
135    pub const fn pwm4_end_cycle(
136        &self,
137    ) -> &'static crate::common::Reg<self::Pwm4EndCycle_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::Pwm4EndCycle_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(18usize),
141            )
142        }
143    }
144
145    #[doc = "Defines start Cycle for PWM4"]
146    #[inline(always)]
147    pub const fn pwm4_start_cycle(
148        &self,
149    ) -> &'static crate::common::Reg<self::Pwm4StartCycle_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::Pwm4StartCycle_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(12usize),
153            )
154        }
155    }
156
157    #[doc = "Timer0 control register"]
158    #[inline(always)]
159    pub const fn timer0_ctrl_reg(
160        &self,
161    ) -> &'static crate::common::Reg<self::Timer0CtrlReg_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::Timer0CtrlReg_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(0usize),
165            )
166        }
167    }
168
169    #[doc = "Timer0 on control register"]
170    #[inline(always)]
171    pub const fn timer0_on_reg(
172        &self,
173    ) -> &'static crate::common::Reg<self::Timer0OnReg_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::Timer0OnReg_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(2usize),
177            )
178        }
179    }
180
181    #[doc = "16 bits reload value for Timer0"]
182    #[inline(always)]
183    pub const fn timer0_reload_m_reg(
184        &self,
185    ) -> &'static crate::common::Reg<self::Timer0ReloadMReg_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::Timer0ReloadMReg_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(4usize),
189            )
190        }
191    }
192
193    #[doc = "16 bits reload value for Timer0"]
194    #[inline(always)]
195    pub const fn timer0_reload_n_reg(
196        &self,
197    ) -> &'static crate::common::Reg<self::Timer0ReloadNReg_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::Timer0ReloadNReg_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(6usize),
201            )
202        }
203    }
204
205    #[doc = "PWM 2 3 4 Control register"]
206    #[inline(always)]
207    pub const fn triple_pwm_ctrl_reg(
208        &self,
209    ) -> &'static crate::common::Reg<self::TriplePwmCtrlReg_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::TriplePwmCtrlReg_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(22usize),
213            )
214        }
215    }
216
217    #[doc = "Defines the PMW2,3,4 frequency"]
218    #[inline(always)]
219    pub const fn triple_pwm_frequency(
220        &self,
221    ) -> &'static crate::common::Reg<self::TriplePwmFrequency_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::TriplePwmFrequency_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(20usize),
225            )
226        }
227    }
228}
229#[doc(hidden)]
230#[derive(Copy, Clone, Eq, PartialEq)]
231pub struct BreathCfgReg_SPEC;
232impl crate::sealed::RegSpec for BreathCfgReg_SPEC {
233    type DataType = u16;
234}
235
236#[doc = "Breath configuration register"]
237pub type BreathCfgReg = crate::RegValueT<BreathCfgReg_SPEC>;
238
239impl BreathCfgReg {
240    #[doc = "Defines the number of PWM periods minus 1, in which duty cycle will be constant"]
241    #[inline(always)]
242    pub fn brth_step(
243        self,
244    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, BreathCfgReg_SPEC, crate::common::RW>
245    {
246        crate::common::RegisterField::<8,0xff,1,0,u8,u8,BreathCfgReg_SPEC,crate::common::RW>::from_register(self,0)
247    }
248
249    #[doc = "Defines the breath PWM frequecny. Breath PWM frequency is 16MHz / (BRTH_DIV+1)"]
250    #[inline(always)]
251    pub fn brth_div(
252        self,
253    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, BreathCfgReg_SPEC, crate::common::RW>
254    {
255        crate::common::RegisterField::<0,0xff,1,0,u8,u8,BreathCfgReg_SPEC,crate::common::RW>::from_register(self,0)
256    }
257}
258impl ::core::default::Default for BreathCfgReg {
259    #[inline(always)]
260    fn default() -> BreathCfgReg {
261        <crate::RegValueT<BreathCfgReg_SPEC> as RegisterValue<_>>::new(511)
262    }
263}
264
265#[doc(hidden)]
266#[derive(Copy, Clone, Eq, PartialEq)]
267pub struct BreathCtrlReg_SPEC;
268impl crate::sealed::RegSpec for BreathCtrlReg_SPEC {
269    type DataType = u16;
270}
271
272#[doc = "Breath control register"]
273pub type BreathCtrlReg = crate::RegValueT<BreathCtrlReg_SPEC>;
274
275impl BreathCtrlReg {
276    #[doc = "Defines the output polarity. \'0\' line is low in idle state. \'1\' line is high in idle state."]
277    #[inline(always)]
278    pub fn brth_pwm_pol(
279        self,
280    ) -> crate::common::RegisterFieldBool<1, 1, 0, BreathCtrlReg_SPEC, crate::common::RW> {
281        crate::common::RegisterFieldBool::<1,1,0,BreathCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
282    }
283
284    #[doc = "\'1\' enable the Breath operation"]
285    #[inline(always)]
286    pub fn brth_en(
287        self,
288    ) -> crate::common::RegisterFieldBool<0, 1, 0, BreathCtrlReg_SPEC, crate::common::RW> {
289        crate::common::RegisterFieldBool::<0,1,0,BreathCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
290    }
291}
292impl ::core::default::Default for BreathCtrlReg {
293    #[inline(always)]
294    fn default() -> BreathCtrlReg {
295        <crate::RegValueT<BreathCtrlReg_SPEC> as RegisterValue<_>>::new(0)
296    }
297}
298
299#[doc(hidden)]
300#[derive(Copy, Clone, Eq, PartialEq)]
301pub struct BreathDutyMaxReg_SPEC;
302impl crate::sealed::RegSpec for BreathDutyMaxReg_SPEC {
303    type DataType = u16;
304}
305
306#[doc = "Breath max duty cycle register"]
307pub type BreathDutyMaxReg = crate::RegValueT<BreathDutyMaxReg_SPEC>;
308
309impl BreathDutyMaxReg {
310    #[doc = "Defines the maximum duty cycle of the PWM breath function. Max duty cycle = BRTH_DUTY_MAX / (BRTH_DIV+1)"]
311    #[inline(always)]
312    pub fn brth_duty_max(
313        self,
314    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, BreathDutyMaxReg_SPEC, crate::common::RW>
315    {
316        crate::common::RegisterField::<
317            0,
318            0xff,
319            1,
320            0,
321            u8,
322            u8,
323            BreathDutyMaxReg_SPEC,
324            crate::common::RW,
325        >::from_register(self, 0)
326    }
327}
328impl ::core::default::Default for BreathDutyMaxReg {
329    #[inline(always)]
330    fn default() -> BreathDutyMaxReg {
331        <crate::RegValueT<BreathDutyMaxReg_SPEC> as RegisterValue<_>>::new(10)
332    }
333}
334
335#[doc(hidden)]
336#[derive(Copy, Clone, Eq, PartialEq)]
337pub struct BreathDutyMinReg_SPEC;
338impl crate::sealed::RegSpec for BreathDutyMinReg_SPEC {
339    type DataType = u16;
340}
341
342#[doc = "Breath min duty cycle register"]
343pub type BreathDutyMinReg = crate::RegValueT<BreathDutyMinReg_SPEC>;
344
345impl BreathDutyMinReg {
346    #[doc = "Defines the minimum duty cycle of the PWM breath function. Min duty cycle = BRTH_DUTY_MIN / (BRTH_DIV+1)"]
347    #[inline(always)]
348    pub fn brth_duty_min(
349        self,
350    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, BreathDutyMinReg_SPEC, crate::common::RW>
351    {
352        crate::common::RegisterField::<
353            0,
354            0xff,
355            1,
356            0,
357            u8,
358            u8,
359            BreathDutyMinReg_SPEC,
360            crate::common::RW,
361        >::from_register(self, 0)
362    }
363}
364impl ::core::default::Default for BreathDutyMinReg {
365    #[inline(always)]
366    fn default() -> BreathDutyMinReg {
367        <crate::RegValueT<BreathDutyMinReg_SPEC> as RegisterValue<_>>::new(1)
368    }
369}
370
371#[doc(hidden)]
372#[derive(Copy, Clone, Eq, PartialEq)]
373pub struct Pwm2EndCycle_SPEC;
374impl crate::sealed::RegSpec for Pwm2EndCycle_SPEC {
375    type DataType = u16;
376}
377
378#[doc = "Defines end Cycle for PWM2"]
379pub type Pwm2EndCycle = crate::RegValueT<Pwm2EndCycle_SPEC>;
380
381impl Pwm2EndCycle {
382    #[doc = "Defines the cycle in which the PWM becomes low. If end_cycle is larger then freq and start_cycle is not larger then freq, output is always 1"]
383    #[inline(always)]
384    pub fn end_cycle(
385        self,
386    ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Pwm2EndCycle_SPEC, crate::common::RW>
387    {
388        crate::common::RegisterField::<
389            0,
390            0x3fff,
391            1,
392            0,
393            u16,
394            u16,
395            Pwm2EndCycle_SPEC,
396            crate::common::RW,
397        >::from_register(self, 0)
398    }
399}
400impl ::core::default::Default for Pwm2EndCycle {
401    #[inline(always)]
402    fn default() -> Pwm2EndCycle {
403        <crate::RegValueT<Pwm2EndCycle_SPEC> as RegisterValue<_>>::new(0)
404    }
405}
406
407#[doc(hidden)]
408#[derive(Copy, Clone, Eq, PartialEq)]
409pub struct Pwm2StartCycle_SPEC;
410impl crate::sealed::RegSpec for Pwm2StartCycle_SPEC {
411    type DataType = u16;
412}
413
414#[doc = "Defines start Cycle for PWM2"]
415pub type Pwm2StartCycle = crate::RegValueT<Pwm2StartCycle_SPEC>;
416
417impl Pwm2StartCycle {
418    #[doc = "Defines the cycle in which the PWM becomes high. if start_cycle is larger than freq or end_cycle is equal to start_cycle, pwm out is always 0"]
419    #[inline(always)]
420    pub fn start_cycle(
421        self,
422    ) -> crate::common::RegisterField<
423        0,
424        0x3fff,
425        1,
426        0,
427        u16,
428        u16,
429        Pwm2StartCycle_SPEC,
430        crate::common::RW,
431    > {
432        crate::common::RegisterField::<
433            0,
434            0x3fff,
435            1,
436            0,
437            u16,
438            u16,
439            Pwm2StartCycle_SPEC,
440            crate::common::RW,
441        >::from_register(self, 0)
442    }
443}
444impl ::core::default::Default for Pwm2StartCycle {
445    #[inline(always)]
446    fn default() -> Pwm2StartCycle {
447        <crate::RegValueT<Pwm2StartCycle_SPEC> as RegisterValue<_>>::new(0)
448    }
449}
450
451#[doc(hidden)]
452#[derive(Copy, Clone, Eq, PartialEq)]
453pub struct Pwm3EndCycle_SPEC;
454impl crate::sealed::RegSpec for Pwm3EndCycle_SPEC {
455    type DataType = u16;
456}
457
458#[doc = "Defines end Cycle for PWM3"]
459pub type Pwm3EndCycle = crate::RegValueT<Pwm3EndCycle_SPEC>;
460
461impl Pwm3EndCycle {
462    #[doc = "Defines the cycle in which the PWM becomes low. If end_cycle is larger then freq and start_cycle is not larger then freq, output is always 1"]
463    #[inline(always)]
464    pub fn end_cycle(
465        self,
466    ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Pwm3EndCycle_SPEC, crate::common::RW>
467    {
468        crate::common::RegisterField::<
469            0,
470            0x3fff,
471            1,
472            0,
473            u16,
474            u16,
475            Pwm3EndCycle_SPEC,
476            crate::common::RW,
477        >::from_register(self, 0)
478    }
479}
480impl ::core::default::Default for Pwm3EndCycle {
481    #[inline(always)]
482    fn default() -> Pwm3EndCycle {
483        <crate::RegValueT<Pwm3EndCycle_SPEC> as RegisterValue<_>>::new(0)
484    }
485}
486
487#[doc(hidden)]
488#[derive(Copy, Clone, Eq, PartialEq)]
489pub struct Pwm3StartCycle_SPEC;
490impl crate::sealed::RegSpec for Pwm3StartCycle_SPEC {
491    type DataType = u16;
492}
493
494#[doc = "Defines start Cycle for PWM3"]
495pub type Pwm3StartCycle = crate::RegValueT<Pwm3StartCycle_SPEC>;
496
497impl Pwm3StartCycle {
498    #[doc = "Defines the cycle in which the PWM becomes high. if start_cycle is larger than freq or end_cycle is equal to start_cycle, pwm out is always 0"]
499    #[inline(always)]
500    pub fn start_cycle(
501        self,
502    ) -> crate::common::RegisterField<
503        0,
504        0x3fff,
505        1,
506        0,
507        u16,
508        u16,
509        Pwm3StartCycle_SPEC,
510        crate::common::RW,
511    > {
512        crate::common::RegisterField::<
513            0,
514            0x3fff,
515            1,
516            0,
517            u16,
518            u16,
519            Pwm3StartCycle_SPEC,
520            crate::common::RW,
521        >::from_register(self, 0)
522    }
523}
524impl ::core::default::Default for Pwm3StartCycle {
525    #[inline(always)]
526    fn default() -> Pwm3StartCycle {
527        <crate::RegValueT<Pwm3StartCycle_SPEC> as RegisterValue<_>>::new(0)
528    }
529}
530
531#[doc(hidden)]
532#[derive(Copy, Clone, Eq, PartialEq)]
533pub struct Pwm4EndCycle_SPEC;
534impl crate::sealed::RegSpec for Pwm4EndCycle_SPEC {
535    type DataType = u16;
536}
537
538#[doc = "Defines end Cycle for PWM4"]
539pub type Pwm4EndCycle = crate::RegValueT<Pwm4EndCycle_SPEC>;
540
541impl Pwm4EndCycle {
542    #[doc = "Defines the cycle in which the PWM becomes low. If end_cycle is larger then freq and start_cycle is not larger then freq, output is always 1"]
543    #[inline(always)]
544    pub fn end_cycle(
545        self,
546    ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Pwm4EndCycle_SPEC, crate::common::RW>
547    {
548        crate::common::RegisterField::<
549            0,
550            0x3fff,
551            1,
552            0,
553            u16,
554            u16,
555            Pwm4EndCycle_SPEC,
556            crate::common::RW,
557        >::from_register(self, 0)
558    }
559}
560impl ::core::default::Default for Pwm4EndCycle {
561    #[inline(always)]
562    fn default() -> Pwm4EndCycle {
563        <crate::RegValueT<Pwm4EndCycle_SPEC> as RegisterValue<_>>::new(0)
564    }
565}
566
567#[doc(hidden)]
568#[derive(Copy, Clone, Eq, PartialEq)]
569pub struct Pwm4StartCycle_SPEC;
570impl crate::sealed::RegSpec for Pwm4StartCycle_SPEC {
571    type DataType = u16;
572}
573
574#[doc = "Defines start Cycle for PWM4"]
575pub type Pwm4StartCycle = crate::RegValueT<Pwm4StartCycle_SPEC>;
576
577impl Pwm4StartCycle {
578    #[doc = "Defines the cycle in which the PWM becomes high. if start_cycle is larger than freq or end_cycle is equal to start_cycle, pwm out is always 0"]
579    #[inline(always)]
580    pub fn start_cycle(
581        self,
582    ) -> crate::common::RegisterField<
583        0,
584        0x3fff,
585        1,
586        0,
587        u16,
588        u16,
589        Pwm4StartCycle_SPEC,
590        crate::common::RW,
591    > {
592        crate::common::RegisterField::<
593            0,
594            0x3fff,
595            1,
596            0,
597            u16,
598            u16,
599            Pwm4StartCycle_SPEC,
600            crate::common::RW,
601        >::from_register(self, 0)
602    }
603}
604impl ::core::default::Default for Pwm4StartCycle {
605    #[inline(always)]
606    fn default() -> Pwm4StartCycle {
607        <crate::RegValueT<Pwm4StartCycle_SPEC> as RegisterValue<_>>::new(0)
608    }
609}
610
611#[doc(hidden)]
612#[derive(Copy, Clone, Eq, PartialEq)]
613pub struct Timer0CtrlReg_SPEC;
614impl crate::sealed::RegSpec for Timer0CtrlReg_SPEC {
615    type DataType = u16;
616}
617
618#[doc = "Timer0 control register"]
619pub type Timer0CtrlReg = crate::RegValueT<Timer0CtrlReg_SPEC>;
620
621impl Timer0CtrlReg {
622    #[doc = "\'0\' = PWM signals are \'1\' during high time.\n\'1\' = PWM signals send out the (fast) clock divided by 2 during high time."]
623    #[inline(always)]
624    pub fn pwm_mode(
625        self,
626    ) -> crate::common::RegisterFieldBool<3, 1, 0, Timer0CtrlReg_SPEC, crate::common::RW> {
627        crate::common::RegisterFieldBool::<3,1,0,Timer0CtrlReg_SPEC,crate::common::RW>::from_register(self,0)
628    }
629
630    #[doc = "\'1\' = Timer0 uses selected clock frequency as is.\n\'0\' = Timer0 uses selected clock frequency divided by 10.\nNote that this applies only to the ON-counter."]
631    #[inline(always)]
632    pub fn tim0_clk_div(
633        self,
634    ) -> crate::common::RegisterFieldBool<2, 1, 0, Timer0CtrlReg_SPEC, crate::common::RW> {
635        crate::common::RegisterFieldBool::<2,1,0,Timer0CtrlReg_SPEC,crate::common::RW>::from_register(self,0)
636    }
637
638    #[doc = "\'1\' = Timer0 uses fast clock frequency.\n\'0\' = Timer0 uses 32 kHz (slow) clock frequency."]
639    #[inline(always)]
640    pub fn tim0_clk_sel(
641        self,
642    ) -> crate::common::RegisterFieldBool<1, 1, 0, Timer0CtrlReg_SPEC, crate::common::RW> {
643        crate::common::RegisterFieldBool::<1,1,0,Timer0CtrlReg_SPEC,crate::common::RW>::from_register(self,0)
644    }
645
646    #[doc = "\'0\' = Timer0 is off and in reset state.\n\'1\' = Timer0 is running."]
647    #[inline(always)]
648    pub fn tim0_ctrl(
649        self,
650    ) -> crate::common::RegisterFieldBool<0, 1, 0, Timer0CtrlReg_SPEC, crate::common::RW> {
651        crate::common::RegisterFieldBool::<0,1,0,Timer0CtrlReg_SPEC,crate::common::RW>::from_register(self,0)
652    }
653}
654impl ::core::default::Default for Timer0CtrlReg {
655    #[inline(always)]
656    fn default() -> Timer0CtrlReg {
657        <crate::RegValueT<Timer0CtrlReg_SPEC> as RegisterValue<_>>::new(0)
658    }
659}
660
661#[doc(hidden)]
662#[derive(Copy, Clone, Eq, PartialEq)]
663pub struct Timer0OnReg_SPEC;
664impl crate::sealed::RegSpec for Timer0OnReg_SPEC {
665    type DataType = u16;
666}
667
668#[doc = "Timer0 on control register"]
669pub type Timer0OnReg = crate::RegValueT<Timer0OnReg_SPEC>;
670
671impl Timer0OnReg {
672    #[doc = "Timer0 On reload value.\nIf read the actual counter value ON_CNTer is returned"]
673    #[inline(always)]
674    pub fn tim0_on(
675        self,
676    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Timer0OnReg_SPEC, crate::common::W>
677    {
678        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Timer0OnReg_SPEC,crate::common::W>::from_register(self,0)
679    }
680}
681impl ::core::default::Default for Timer0OnReg {
682    #[inline(always)]
683    fn default() -> Timer0OnReg {
684        <crate::RegValueT<Timer0OnReg_SPEC> as RegisterValue<_>>::new(0)
685    }
686}
687
688#[doc(hidden)]
689#[derive(Copy, Clone, Eq, PartialEq)]
690pub struct Timer0ReloadMReg_SPEC;
691impl crate::sealed::RegSpec for Timer0ReloadMReg_SPEC {
692    type DataType = u16;
693}
694
695#[doc = "16 bits reload value for Timer0"]
696pub type Timer0ReloadMReg = crate::RegValueT<Timer0ReloadMReg_SPEC>;
697
698impl Timer0ReloadMReg {
699    #[doc = "Timer0 \'high\' reload value.\nIf read the actual counter value T0_CNTer is returned"]
700    #[inline(always)]
701    pub fn tim0_m(
702        self,
703    ) -> crate::common::RegisterField<
704        0,
705        0xffff,
706        1,
707        0,
708        u16,
709        u16,
710        Timer0ReloadMReg_SPEC,
711        crate::common::W,
712    > {
713        crate::common::RegisterField::<
714            0,
715            0xffff,
716            1,
717            0,
718            u16,
719            u16,
720            Timer0ReloadMReg_SPEC,
721            crate::common::W,
722        >::from_register(self, 0)
723    }
724}
725impl ::core::default::Default for Timer0ReloadMReg {
726    #[inline(always)]
727    fn default() -> Timer0ReloadMReg {
728        <crate::RegValueT<Timer0ReloadMReg_SPEC> as RegisterValue<_>>::new(0)
729    }
730}
731
732#[doc(hidden)]
733#[derive(Copy, Clone, Eq, PartialEq)]
734pub struct Timer0ReloadNReg_SPEC;
735impl crate::sealed::RegSpec for Timer0ReloadNReg_SPEC {
736    type DataType = u16;
737}
738
739#[doc = "16 bits reload value for Timer0"]
740pub type Timer0ReloadNReg = crate::RegValueT<Timer0ReloadNReg_SPEC>;
741
742impl Timer0ReloadNReg {
743    #[doc = "Timer0 \'low\' reload value.\nIf read the actual counter value T0_CNTer is returned"]
744    #[inline(always)]
745    pub fn tim0_n(
746        self,
747    ) -> crate::common::RegisterField<
748        0,
749        0xffff,
750        1,
751        0,
752        u16,
753        u16,
754        Timer0ReloadNReg_SPEC,
755        crate::common::W,
756    > {
757        crate::common::RegisterField::<
758            0,
759            0xffff,
760            1,
761            0,
762            u16,
763            u16,
764            Timer0ReloadNReg_SPEC,
765            crate::common::W,
766        >::from_register(self, 0)
767    }
768}
769impl ::core::default::Default for Timer0ReloadNReg {
770    #[inline(always)]
771    fn default() -> Timer0ReloadNReg {
772        <crate::RegValueT<Timer0ReloadNReg_SPEC> as RegisterValue<_>>::new(0)
773    }
774}
775
776#[doc(hidden)]
777#[derive(Copy, Clone, Eq, PartialEq)]
778pub struct TriplePwmCtrlReg_SPEC;
779impl crate::sealed::RegSpec for TriplePwmCtrlReg_SPEC {
780    type DataType = u16;
781}
782
783#[doc = "PWM 2 3 4 Control register"]
784pub type TriplePwmCtrlReg = crate::RegValueT<TriplePwmCtrlReg_SPEC>;
785
786impl TriplePwmCtrlReg {
787    #[doc = "\'1\' = Triple PWM uses fast clock frequency.\n\'0\' = Triple PWM uses 32 Khz (slow) clock frequency"]
788    #[inline(always)]
789    pub fn triple_pwm_clk_sel(
790        self,
791    ) -> crate::common::RegisterFieldBool<3, 1, 0, TriplePwmCtrlReg_SPEC, crate::common::RW> {
792        crate::common::RegisterFieldBool::<3,1,0,TriplePwmCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
793    }
794
795    #[doc = "\'1\' = HW can pause PWM 2,3,4 and BREATH timer"]
796    #[inline(always)]
797    pub fn hw_pause_en(
798        self,
799    ) -> crate::common::RegisterFieldBool<2, 1, 0, TriplePwmCtrlReg_SPEC, crate::common::RW> {
800        crate::common::RegisterFieldBool::<2,1,0,TriplePwmCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
801    }
802
803    #[doc = "\'1\' = PWM 2 3 4 and BREATH timer (if applicable) are paused"]
804    #[inline(always)]
805    pub fn sw_pause_en(
806        self,
807    ) -> crate::common::RegisterFieldBool<1, 1, 0, TriplePwmCtrlReg_SPEC, crate::common::RW> {
808        crate::common::RegisterFieldBool::<1,1,0,TriplePwmCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
809    }
810
811    #[doc = "\'1\' = PWM 2 3 4 is enabled"]
812    #[inline(always)]
813    pub fn triple_pwm_enable(
814        self,
815    ) -> crate::common::RegisterFieldBool<0, 1, 0, TriplePwmCtrlReg_SPEC, crate::common::RW> {
816        crate::common::RegisterFieldBool::<0,1,0,TriplePwmCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
817    }
818}
819impl ::core::default::Default for TriplePwmCtrlReg {
820    #[inline(always)]
821    fn default() -> TriplePwmCtrlReg {
822        <crate::RegValueT<TriplePwmCtrlReg_SPEC> as RegisterValue<_>>::new(12)
823    }
824}
825
826#[doc(hidden)]
827#[derive(Copy, Clone, Eq, PartialEq)]
828pub struct TriplePwmFrequency_SPEC;
829impl crate::sealed::RegSpec for TriplePwmFrequency_SPEC {
830    type DataType = u16;
831}
832
833#[doc = "Defines the PMW2,3,4 frequency"]
834pub type TriplePwmFrequency = crate::RegValueT<TriplePwmFrequency_SPEC>;
835
836impl TriplePwmFrequency {
837    #[doc = "Defines the frequency of PWM 2 3 4, period = TMR2_CLK * ( FREQ+1)"]
838    #[inline(always)]
839    pub fn freq(
840        self,
841    ) -> crate::common::RegisterField<
842        0,
843        0x3fff,
844        1,
845        0,
846        u16,
847        u16,
848        TriplePwmFrequency_SPEC,
849        crate::common::RW,
850    > {
851        crate::common::RegisterField::<
852            0,
853            0x3fff,
854            1,
855            0,
856            u16,
857            u16,
858            TriplePwmFrequency_SPEC,
859            crate::common::RW,
860        >::from_register(self, 0)
861    }
862}
863impl ::core::default::Default for TriplePwmFrequency {
864    #[inline(always)]
865    fn default() -> TriplePwmFrequency {
866        <crate::RegValueT<TriplePwmFrequency_SPEC> as RegisterValue<_>>::new(0)
867    }
868}
da14682_pac/gp_timers.rs

da14682_pac/
gp_timers.rs
