da14682_pac/
dcdc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:10 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"DCDC registers"]
28unsafe impl ::core::marker::Send for super::Dcdc {}
29unsafe impl ::core::marker::Sync for super::Dcdc {}
30impl super::Dcdc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "DCDC First Control Register"]
38    #[inline(always)]
39    pub const fn dcdc_ctrl_0_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::DcdcCtrl0Reg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::DcdcCtrl0Reg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(2usize),
45            )
46        }
47    }
48
49    #[doc = "DCDC Second Control Register"]
50    #[inline(always)]
51    pub const fn dcdc_ctrl_1_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::DcdcCtrl1Reg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::DcdcCtrl1Reg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4usize),
57            )
58        }
59    }
60
61    #[doc = "DCDC Third Control Register"]
62    #[inline(always)]
63    pub const fn dcdc_ctrl_2_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::DcdcCtrl2Reg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::DcdcCtrl2Reg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(6usize),
69            )
70        }
71    }
72
73    #[doc = "DCDC Interrupt Clear Register"]
74    #[inline(always)]
75    pub const fn dcdc_irq_clear_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::DcdcIrqClearReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::DcdcIrqClearReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(54usize),
81            )
82        }
83    }
84
85    #[doc = "DCDC Interrupt Clear Register"]
86    #[inline(always)]
87    pub const fn dcdc_irq_mask_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::DcdcIrqMaskReg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::DcdcIrqMaskReg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(56usize),
93            )
94        }
95    }
96
97    #[doc = "DCDC Interrupt Status Register"]
98    #[inline(always)]
99    pub const fn dcdc_irq_status_reg(
100        &self,
101    ) -> &'static crate::common::Reg<self::DcdcIrqStatusReg_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::DcdcIrqStatusReg_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(52usize),
105            )
106        }
107    }
108
109    #[doc = "DCDC First Retention Mode Register"]
110    #[inline(always)]
111    pub const fn dcdc_ret_0_reg(
112        &self,
113    ) -> &'static crate::common::Reg<self::DcdcRet0Reg_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::DcdcRet0Reg_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(24usize),
117            )
118        }
119    }
120
121    #[doc = "DCDC Second Retention Mode Register"]
122    #[inline(always)]
123    pub const fn dcdc_ret_1_reg(
124        &self,
125    ) -> &'static crate::common::Reg<self::DcdcRet1Reg_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::DcdcRet1Reg_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(26usize),
129            )
130        }
131    }
132
133    #[doc = "DCDC First Status Register"]
134    #[inline(always)]
135    pub const fn dcdc_status_0_reg(
136        &self,
137    ) -> &'static crate::common::Reg<self::DcdcStatus0Reg_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::DcdcStatus0Reg_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(34usize),
141            )
142        }
143    }
144
145    #[doc = "DCDC Second Status Register"]
146    #[inline(always)]
147    pub const fn dcdc_status_1_reg(
148        &self,
149    ) -> &'static crate::common::Reg<self::DcdcStatus1Reg_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::DcdcStatus1Reg_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(36usize),
153            )
154        }
155    }
156
157    #[doc = "DCDC Third Status Register"]
158    #[inline(always)]
159    pub const fn dcdc_status_2_reg(
160        &self,
161    ) -> &'static crate::common::Reg<self::DcdcStatus2Reg_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::DcdcStatus2Reg_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(38usize),
165            )
166        }
167    }
168
169    #[doc = "DCDC Fourth Status Register"]
170    #[inline(always)]
171    pub const fn dcdc_status_3_reg(
172        &self,
173    ) -> &'static crate::common::Reg<self::DcdcStatus3Reg_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::DcdcStatus3Reg_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(40usize),
177            )
178        }
179    }
180
181    #[doc = "DCDC Fifth Status Register"]
182    #[inline(always)]
183    pub const fn dcdc_status_4_reg(
184        &self,
185    ) -> &'static crate::common::Reg<self::DcdcStatus4Reg_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::DcdcStatus4Reg_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(42usize),
189            )
190        }
191    }
192
193    #[doc = "DCDC Test Register"]
194    #[inline(always)]
195    pub const fn dcdc_test_0_reg(
196        &self,
197    ) -> &'static crate::common::Reg<self::DcdcTest0Reg_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::DcdcTest0Reg_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(30usize),
201            )
202        }
203    }
204
205    #[doc = "DCDC Test Register"]
206    #[inline(always)]
207    pub const fn dcdc_test_1_reg(
208        &self,
209    ) -> &'static crate::common::Reg<self::DcdcTest1Reg_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::DcdcTest1Reg_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(32usize),
213            )
214        }
215    }
216
217    #[doc = "DCDC V14 Comparator Trim Register"]
218    #[inline(always)]
219    pub const fn dcdc_trim_0_reg(
220        &self,
221    ) -> &'static crate::common::Reg<self::DcdcTrim0Reg_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::DcdcTrim0Reg_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(44usize),
225            )
226        }
227    }
228
229    #[doc = "DCDC V18 Comparator Trim Register"]
230    #[inline(always)]
231    pub const fn dcdc_trim_1_reg(
232        &self,
233    ) -> &'static crate::common::Reg<self::DcdcTrim1Reg_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::DcdcTrim1Reg_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(46usize),
237            )
238        }
239    }
240
241    #[doc = "DCDC VDD Comparator Trim Register"]
242    #[inline(always)]
243    pub const fn dcdc_trim_2_reg(
244        &self,
245    ) -> &'static crate::common::Reg<self::DcdcTrim2Reg_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::DcdcTrim2Reg_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(48usize),
249            )
250        }
251    }
252
253    #[doc = "DCDC VPA Comparator Trim Register"]
254    #[inline(always)]
255    pub const fn dcdc_trim_3_reg(
256        &self,
257    ) -> &'static crate::common::Reg<self::DcdcTrim3Reg_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::DcdcTrim3Reg_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(50usize),
261            )
262        }
263    }
264
265    #[doc = "DCDC Comparator Trim Register"]
266    #[inline(always)]
267    pub const fn dcdc_trim_reg(
268        &self,
269    ) -> &'static crate::common::Reg<self::DcdcTrimReg_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::DcdcTrimReg_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(28usize),
273            )
274        }
275    }
276
277    #[doc = "DCDC V14 First Control Register"]
278    #[inline(always)]
279    pub const fn dcdc_v14_0_reg(
280        &self,
281    ) -> &'static crate::common::Reg<self::DcdcV140Reg_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::DcdcV140Reg_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(8usize),
285            )
286        }
287    }
288
289    #[doc = "DCDC V14 Second Control Register"]
290    #[inline(always)]
291    pub const fn dcdc_v14_1_reg(
292        &self,
293    ) -> &'static crate::common::Reg<self::DcdcV141Reg_SPEC, crate::common::RW> {
294        unsafe {
295            crate::common::Reg::<self::DcdcV141Reg_SPEC, crate::common::RW>::from_ptr(
296                self._svd2pac_as_ptr().add(10usize),
297            )
298        }
299    }
300
301    #[doc = "DCDC VPA First Control Register"]
302    #[inline(always)]
303    pub const fn dcdc_v18p_0_reg(
304        &self,
305    ) -> &'static crate::common::Reg<self::DcdcV18P0Reg_SPEC, crate::common::RW> {
306        unsafe {
307            crate::common::Reg::<self::DcdcV18P0Reg_SPEC, crate::common::RW>::from_ptr(
308                self._svd2pac_as_ptr().add(20usize),
309            )
310        }
311    }
312
313    #[doc = "DCDC VPA Second Control Register"]
314    #[inline(always)]
315    pub const fn dcdc_v18p_1_reg(
316        &self,
317    ) -> &'static crate::common::Reg<self::DcdcV18P1Reg_SPEC, crate::common::RW> {
318        unsafe {
319            crate::common::Reg::<self::DcdcV18P1Reg_SPEC, crate::common::RW>::from_ptr(
320                self._svd2pac_as_ptr().add(22usize),
321            )
322        }
323    }
324
325    #[doc = "DCDC V18 First Control Register"]
326    #[inline(always)]
327    pub const fn dcdc_v18_0_reg(
328        &self,
329    ) -> &'static crate::common::Reg<self::DcdcV180Reg_SPEC, crate::common::RW> {
330        unsafe {
331            crate::common::Reg::<self::DcdcV180Reg_SPEC, crate::common::RW>::from_ptr(
332                self._svd2pac_as_ptr().add(12usize),
333            )
334        }
335    }
336
337    #[doc = "DCDC V18 Second Control Register"]
338    #[inline(always)]
339    pub const fn dcdc_v18_1_reg(
340        &self,
341    ) -> &'static crate::common::Reg<self::DcdcV181Reg_SPEC, crate::common::RW> {
342        unsafe {
343            crate::common::Reg::<self::DcdcV181Reg_SPEC, crate::common::RW>::from_ptr(
344                self._svd2pac_as_ptr().add(14usize),
345            )
346        }
347    }
348
349    #[doc = "DCDC VDD First Control Register"]
350    #[inline(always)]
351    pub const fn dcdc_vdd_0_reg(
352        &self,
353    ) -> &'static crate::common::Reg<self::DcdcVdd0Reg_SPEC, crate::common::RW> {
354        unsafe {
355            crate::common::Reg::<self::DcdcVdd0Reg_SPEC, crate::common::RW>::from_ptr(
356                self._svd2pac_as_ptr().add(16usize),
357            )
358        }
359    }
360
361    #[doc = "DCDC VDD Second Control Register"]
362    #[inline(always)]
363    pub const fn dcdc_vdd_1_reg(
364        &self,
365    ) -> &'static crate::common::Reg<self::DcdcVdd1Reg_SPEC, crate::common::RW> {
366        unsafe {
367            crate::common::Reg::<self::DcdcVdd1Reg_SPEC, crate::common::RW>::from_ptr(
368                self._svd2pac_as_ptr().add(18usize),
369            )
370        }
371    }
372}
373#[doc(hidden)]
374#[derive(Copy, Clone, Eq, PartialEq)]
375pub struct DcdcCtrl0Reg_SPEC;
376impl crate::sealed::RegSpec for DcdcCtrl0Reg_SPEC {
377    type DataType = u16;
378}
379
380#[doc = "DCDC First Control Register"]
381pub type DcdcCtrl0Reg = crate::RegValueT<DcdcCtrl0Reg_SPEC>;
382
383impl DcdcCtrl0Reg {
384    #[doc = "Set current limit to maximum during initial startup"]
385    #[inline(always)]
386    pub fn dcdc_fast_startup(
387        self,
388    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcCtrl0Reg_SPEC, crate::common::RW> {
389        crate::common::RegisterFieldBool::<14,1,0,DcdcCtrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
390    }
391
392    #[doc = "Switches to low voltage settings when battery voltage drops below 2.5 V"]
393    #[inline(always)]
394    pub fn dcdc_brownout_lv_mode(
395        self,
396    ) -> crate::common::RegisterFieldBool<13, 1, 0, DcdcCtrl0Reg_SPEC, crate::common::RW> {
397        crate::common::RegisterFieldBool::<13,1,0,DcdcCtrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
398    }
399
400    #[doc = "Idle Clock Divider\n00 = 2\n01 = 4\n10 = 8\n11 = 16"]
401    #[inline(always)]
402    pub fn dcdc_idle_clk_div(
403        self,
404    ) -> crate::common::RegisterField<11, 0x3, 1, 0, u8, u8, DcdcCtrl0Reg_SPEC, crate::common::RW>
405    {
406        crate::common::RegisterField::<11,0x3,1,0,u8,u8,DcdcCtrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
407    }
408
409    #[doc = "Charge priority register (4x 2 bit ID)\nCharge sequence is \\[1:0\\] > \\[3:2\\] > \\[5:4\\] > \\[7:6\\]\nID\\[V14\\] = 00\nID\\[V18\\] = 01\nID\\[VDD\\] = 10\nID\\[V18P\\] = 11"]
410    #[inline(always)]
411    pub fn dcdc_priority(
412        self,
413    ) -> crate::common::RegisterField<3, 0xff, 1, 0, u8, u8, DcdcCtrl0Reg_SPEC, crate::common::RW>
414    {
415        crate::common::RegisterField::<3,0xff,1,0,u8,u8,DcdcCtrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
416    }
417
418    #[doc = "Freewheel switch enable"]
419    #[inline(always)]
420    pub fn dcdc_fw_enable(
421        self,
422    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcCtrl0Reg_SPEC, crate::common::RW> {
423        crate::common::RegisterFieldBool::<2,1,0,DcdcCtrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
424    }
425
426    #[doc = "DCDC converter mode\n00 = Disabled\n01 = Active\n10 = Sleep mode\n11 = Disabled"]
427    #[inline(always)]
428    pub fn dcdc_mode(
429        self,
430    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, DcdcCtrl0Reg_SPEC, crate::common::RW>
431    {
432        crate::common::RegisterField::<0,0x3,1,0,u8,u8,DcdcCtrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
433    }
434}
435impl ::core::default::Default for DcdcCtrl0Reg {
436    #[inline(always)]
437    fn default() -> DcdcCtrl0Reg {
438        <crate::RegValueT<DcdcCtrl0Reg_SPEC> as RegisterValue<_>>::new(12068)
439    }
440}
441
442#[doc(hidden)]
443#[derive(Copy, Clone, Eq, PartialEq)]
444pub struct DcdcCtrl1Reg_SPEC;
445impl crate::sealed::RegSpec for DcdcCtrl1Reg_SPEC {
446    type DataType = u16;
447}
448
449#[doc = "DCDC Second Control Register"]
450pub type DcdcCtrl1Reg = crate::RegValueT<DcdcCtrl1Reg_SPEC>;
451
452impl DcdcCtrl1Reg {
453    #[doc = "Delay between turning bias on and converter becoming active\n0 - 31 us, 1 us step size"]
454    #[inline(always)]
455    pub fn dcdc_startup_delay(
456        self,
457    ) -> crate::common::RegisterField<11, 0x1f, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
458    {
459        crate::common::RegisterField::<11,0x1f,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
460    }
461
462    #[doc = "Global maximum idle time\nThe current limit of any output that is idle for this long will be downramped faster than normal\n0 - 7875 ns, 125 ns step size"]
463    #[inline(always)]
464    pub fn dcdc_global_max_idle_time(
465        self,
466    ) -> crate::common::RegisterField<5, 0x3f, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
467    {
468        crate::common::RegisterField::<5,0x3f,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
469    }
470
471    #[doc = "P and N switch timeout, if switch is closed longer than this a timeout is generated and the FSM is forced to the next state\nWriting 0 disables timeout functionality\n62.5 - 1937.5 ns, 62.5 ns step size"]
472    #[inline(always)]
473    pub fn dcdc_timeout(
474        self,
475    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
476    {
477        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
478    }
479}
480impl ::core::default::Default for DcdcCtrl1Reg {
481    #[inline(always)]
482    fn default() -> DcdcCtrl1Reg {
483        <crate::RegValueT<DcdcCtrl1Reg_SPEC> as RegisterValue<_>>::new(21520)
484    }
485}
486
487#[doc(hidden)]
488#[derive(Copy, Clone, Eq, PartialEq)]
489pub struct DcdcCtrl2Reg_SPEC;
490impl crate::sealed::RegSpec for DcdcCtrl2Reg_SPEC {
491    type DataType = u16;
492}
493
494#[doc = "DCDC Third Control Register"]
495pub type DcdcCtrl2Reg = crate::RegValueT<DcdcCtrl2Reg_SPEC>;
496
497impl DcdcCtrl2Reg {
498    #[doc = "Number of timeout events before timeout interrupt is generated"]
499    #[inline(always)]
500    pub fn dcdc_timeout_irq_trig(
501        self,
502    ) -> crate::common::RegisterField<12, 0xf, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
503    {
504        crate::common::RegisterField::<12,0xf,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
505    }
506
507    #[doc = "Number of successive non-timed out charge events required to clear timeout event counter"]
508    #[inline(always)]
509    pub fn dcdc_timeout_irq_res(
510        self,
511    ) -> crate::common::RegisterField<8, 0xf, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
512    {
513        crate::common::RegisterField::<8,0xf,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
514    }
515
516    #[doc = "Trim current sensing circuitry\n00 = +0  percent\n01 = +4  percent\n10 = +8  percent\n11 = +12  percent"]
517    #[inline(always)]
518    pub fn dcdc_tune(
519        self,
520    ) -> crate::common::RegisterField<6, 0x3, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
521    {
522        crate::common::RegisterField::<6,0x3,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
523    }
524
525    #[doc = "Trim low side supply voltage\nV = 2 V + 100 mV * N"]
526    #[inline(always)]
527    pub fn dcdc_lssup_trim(
528        self,
529    ) -> crate::common::RegisterField<3, 0x7, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
530    {
531        crate::common::RegisterField::<3,0x7,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
532    }
533
534    #[doc = "Trim high side ground\nV = VBAT - (2.2 V + 200 mV * N)"]
535    #[inline(always)]
536    pub fn dcdc_hsgnd_trim(
537        self,
538    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
539    {
540        crate::common::RegisterField::<0,0x7,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
541    }
542}
543impl ::core::default::Default for DcdcCtrl2Reg {
544    #[inline(always)]
545    fn default() -> DcdcCtrl2Reg {
546        <crate::RegValueT<DcdcCtrl2Reg_SPEC> as RegisterValue<_>>::new(34861)
547    }
548}
549
550#[doc(hidden)]
551#[derive(Copy, Clone, Eq, PartialEq)]
552pub struct DcdcIrqClearReg_SPEC;
553impl crate::sealed::RegSpec for DcdcIrqClearReg_SPEC {
554    type DataType = u16;
555}
556
557#[doc = "DCDC Interrupt Clear Register"]
558pub type DcdcIrqClearReg = crate::RegValueT<DcdcIrqClearReg_SPEC>;
559
560impl DcdcIrqClearReg {
561    #[doc = "Clear brown out interrupt"]
562    #[inline(always)]
563    pub fn dcdc_brown_out_irq_clear(
564        self,
565    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
566        crate::common::RegisterFieldBool::<4,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
567    }
568
569    #[doc = "Clear V18P timeout interrupt"]
570    #[inline(always)]
571    pub fn dcdc_v18p_timeout_irq_clear(
572        self,
573    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
574        crate::common::RegisterFieldBool::<3,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
575    }
576
577    #[doc = "Clear VDD timeout interrupt"]
578    #[inline(always)]
579    pub fn dcdc_vdd_timeout_irq_clear(
580        self,
581    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
582        crate::common::RegisterFieldBool::<2,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
583    }
584
585    #[doc = "Clear V18 timeout interrupt"]
586    #[inline(always)]
587    pub fn dcdc_v18_timeout_irq_clear(
588        self,
589    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
590        crate::common::RegisterFieldBool::<1,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
591    }
592
593    #[doc = "Clear V14 timeout interrupt"]
594    #[inline(always)]
595    pub fn dcdc_v14_timeout_irq_clear(
596        self,
597    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
598        crate::common::RegisterFieldBool::<0,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
599    }
600}
601impl ::core::default::Default for DcdcIrqClearReg {
602    #[inline(always)]
603    fn default() -> DcdcIrqClearReg {
604        <crate::RegValueT<DcdcIrqClearReg_SPEC> as RegisterValue<_>>::new(0)
605    }
606}
607
608#[doc(hidden)]
609#[derive(Copy, Clone, Eq, PartialEq)]
610pub struct DcdcIrqMaskReg_SPEC;
611impl crate::sealed::RegSpec for DcdcIrqMaskReg_SPEC {
612    type DataType = u16;
613}
614
615#[doc = "DCDC Interrupt Clear Register"]
616pub type DcdcIrqMaskReg = crate::RegValueT<DcdcIrqMaskReg_SPEC>;
617
618impl DcdcIrqMaskReg {
619    #[doc = "Mask brown out interrupt"]
620    #[inline(always)]
621    pub fn dcdc_brown_out_irq_mask(
622        self,
623    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
624        crate::common::RegisterFieldBool::<4,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
625    }
626
627    #[doc = "Mask V18P timeout interrupt"]
628    #[inline(always)]
629    pub fn dcdc_v18p_timeout_irq_mask(
630        self,
631    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
632        crate::common::RegisterFieldBool::<3,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
633    }
634
635    #[doc = "Mask VDD timeout interrupt"]
636    #[inline(always)]
637    pub fn dcdc_vdd_timeout_irq_mask(
638        self,
639    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
640        crate::common::RegisterFieldBool::<2,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
641    }
642
643    #[doc = "Mask V18 timeout interrupt"]
644    #[inline(always)]
645    pub fn dcdc_v18_timeout_irq_mask(
646        self,
647    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
648        crate::common::RegisterFieldBool::<1,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
649    }
650
651    #[doc = "Mask V14 timeout interrupt"]
652    #[inline(always)]
653    pub fn dcdc_v14_timeout_irq_mask(
654        self,
655    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
656        crate::common::RegisterFieldBool::<0,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
657    }
658}
659impl ::core::default::Default for DcdcIrqMaskReg {
660    #[inline(always)]
661    fn default() -> DcdcIrqMaskReg {
662        <crate::RegValueT<DcdcIrqMaskReg_SPEC> as RegisterValue<_>>::new(0)
663    }
664}
665
666#[doc(hidden)]
667#[derive(Copy, Clone, Eq, PartialEq)]
668pub struct DcdcIrqStatusReg_SPEC;
669impl crate::sealed::RegSpec for DcdcIrqStatusReg_SPEC {
670    type DataType = u16;
671}
672
673#[doc = "DCDC Interrupt Status Register"]
674pub type DcdcIrqStatusReg = crate::RegValueT<DcdcIrqStatusReg_SPEC>;
675
676impl DcdcIrqStatusReg {
677    #[doc = "Brown out detector triggered (battery voltage below 2.5 V)"]
678    #[inline(always)]
679    pub fn dcdc_brown_out_irq_status(
680        self,
681    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
682        crate::common::RegisterFieldBool::<4,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
683    }
684
685    #[doc = "Timeout occured on V18P output"]
686    #[inline(always)]
687    pub fn dcdc_v18p_timeout_irq_status(
688        self,
689    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
690        crate::common::RegisterFieldBool::<3,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
691    }
692
693    #[doc = "Timeout occured on VDD output"]
694    #[inline(always)]
695    pub fn dcdc_vdd_timeout_irq_status(
696        self,
697    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
698        crate::common::RegisterFieldBool::<2,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
699    }
700
701    #[doc = "Timeout occured on V18 output"]
702    #[inline(always)]
703    pub fn dcdc_v18_timeout_irq_status(
704        self,
705    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
706        crate::common::RegisterFieldBool::<1,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
707    }
708
709    #[doc = "Timeout occured on V14 output"]
710    #[inline(always)]
711    pub fn dcdc_v14_timeout_irq_status(
712        self,
713    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
714        crate::common::RegisterFieldBool::<0,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
715    }
716}
717impl ::core::default::Default for DcdcIrqStatusReg {
718    #[inline(always)]
719    fn default() -> DcdcIrqStatusReg {
720        <crate::RegValueT<DcdcIrqStatusReg_SPEC> as RegisterValue<_>>::new(0)
721    }
722}
723
724#[doc(hidden)]
725#[derive(Copy, Clone, Eq, PartialEq)]
726pub struct DcdcRet0Reg_SPEC;
727impl crate::sealed::RegSpec for DcdcRet0Reg_SPEC {
728    type DataType = u16;
729}
730
731#[doc = "DCDC First Retention Mode Register"]
732pub type DcdcRet0Reg = crate::RegValueT<DcdcRet0Reg_SPEC>;
733
734impl DcdcRet0Reg {
735    #[doc = "Charge cycles for V18P output in sleep mode\nCycles = 1 + 2 * N"]
736    #[inline(always)]
737    pub fn dcdc_v18p_ret_cycles(
738        self,
739    ) -> crate::common::RegisterField<13, 0x7, 1, 0, u8, u8, DcdcRet0Reg_SPEC, crate::common::RW>
740    {
741        crate::common::RegisterField::<13,0x7,1,0,u8,u8,DcdcRet0Reg_SPEC,crate::common::RW>::from_register(self,0)
742    }
743
744    #[doc = "V18P output sleep mode current limit\nI = 30 mA * (1 + N)"]
745    #[inline(always)]
746    pub fn dcdc_v18p_cur_lim_ret(
747        self,
748    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, DcdcRet0Reg_SPEC, crate::common::RW>
749    {
750        crate::common::RegisterField::<8,0x1f,1,0,u8,u8,DcdcRet0Reg_SPEC,crate::common::RW>::from_register(self,0)
751    }
752
753    #[doc = "Charge cycles for VDD output in sleep mode\nCycles = 1 + 2 * N"]
754    #[inline(always)]
755    pub fn dcdc_vdd_ret_cycles(
756        self,
757    ) -> crate::common::RegisterField<5, 0x7, 1, 0, u8, u8, DcdcRet0Reg_SPEC, crate::common::RW>
758    {
759        crate::common::RegisterField::<5,0x7,1,0,u8,u8,DcdcRet0Reg_SPEC,crate::common::RW>::from_register(self,0)
760    }
761
762    #[doc = "VDD output sleep mode current limit\nI = 30 mA * (1 + N)"]
763    #[inline(always)]
764    pub fn dcdc_vdd_cur_lim_ret(
765        self,
766    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcRet0Reg_SPEC, crate::common::RW>
767    {
768        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcRet0Reg_SPEC,crate::common::RW>::from_register(self,0)
769    }
770}
771impl ::core::default::Default for DcdcRet0Reg {
772    #[inline(always)]
773    fn default() -> DcdcRet0Reg {
774        <crate::RegValueT<DcdcRet0Reg_SPEC> as RegisterValue<_>>::new(43686)
775    }
776}
777
778#[doc(hidden)]
779#[derive(Copy, Clone, Eq, PartialEq)]
780pub struct DcdcRet1Reg_SPEC;
781impl crate::sealed::RegSpec for DcdcRet1Reg_SPEC {
782    type DataType = u16;
783}
784
785#[doc = "DCDC Second Retention Mode Register"]
786pub type DcdcRet1Reg = crate::RegValueT<DcdcRet1Reg_SPEC>;
787
788impl DcdcRet1Reg {
789    #[doc = "Charge cycles for V18 output in sleep mode\nCycles = 1 + 2 * N"]
790    #[inline(always)]
791    pub fn dcdc_v18_ret_cycles(
792        self,
793    ) -> crate::common::RegisterField<13, 0x7, 1, 0, u8, u8, DcdcRet1Reg_SPEC, crate::common::RW>
794    {
795        crate::common::RegisterField::<13,0x7,1,0,u8,u8,DcdcRet1Reg_SPEC,crate::common::RW>::from_register(self,0)
796    }
797
798    #[doc = "V18 output sleep mode current limit\nI = 30 mA * (1 + N)"]
799    #[inline(always)]
800    pub fn dcdc_v18_cur_lim_ret(
801        self,
802    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, DcdcRet1Reg_SPEC, crate::common::RW>
803    {
804        crate::common::RegisterField::<8,0x1f,1,0,u8,u8,DcdcRet1Reg_SPEC,crate::common::RW>::from_register(self,0)
805    }
806
807    #[doc = "Charge cycles for V14 output in sleep mode\nCycles = 1 + 2 * N"]
808    #[inline(always)]
809    pub fn dcdc_v14_ret_cycles(
810        self,
811    ) -> crate::common::RegisterField<5, 0x7, 1, 0, u8, u8, DcdcRet1Reg_SPEC, crate::common::RW>
812    {
813        crate::common::RegisterField::<5,0x7,1,0,u8,u8,DcdcRet1Reg_SPEC,crate::common::RW>::from_register(self,0)
814    }
815
816    #[doc = "V14 output sleep mode current limit\nI = 30 mA * (1 + N)"]
817    #[inline(always)]
818    pub fn dcdc_v14_cur_lim_ret(
819        self,
820    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcRet1Reg_SPEC, crate::common::RW>
821    {
822        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcRet1Reg_SPEC,crate::common::RW>::from_register(self,0)
823    }
824}
825impl ::core::default::Default for DcdcRet1Reg {
826    #[inline(always)]
827    fn default() -> DcdcRet1Reg {
828        <crate::RegValueT<DcdcRet1Reg_SPEC> as RegisterValue<_>>::new(43590)
829    }
830}
831
832#[doc(hidden)]
833#[derive(Copy, Clone, Eq, PartialEq)]
834pub struct DcdcStatus0Reg_SPEC;
835impl crate::sealed::RegSpec for DcdcStatus0Reg_SPEC {
836    type DataType = u16;
837}
838
839#[doc = "DCDC First Status Register"]
840pub type DcdcStatus0Reg = crate::RegValueT<DcdcStatus0Reg_SPEC>;
841
842impl DcdcStatus0Reg {
843    #[doc = "Charge register position 3"]
844    #[inline(always)]
845    pub fn dcdc_charge_reg_3(
846        self,
847    ) -> crate::common::RegisterField<9, 0x7, 1, 0, u8, u8, DcdcStatus0Reg_SPEC, crate::common::R>
848    {
849        crate::common::RegisterField::<9,0x7,1,0,u8,u8,DcdcStatus0Reg_SPEC,crate::common::R>::from_register(self,0)
850    }
851
852    #[doc = "Charge register position 2"]
853    #[inline(always)]
854    pub fn dcdc_charge_reg_2(
855        self,
856    ) -> crate::common::RegisterField<6, 0x7, 1, 0, u8, u8, DcdcStatus0Reg_SPEC, crate::common::R>
857    {
858        crate::common::RegisterField::<6,0x7,1,0,u8,u8,DcdcStatus0Reg_SPEC,crate::common::R>::from_register(self,0)
859    }
860
861    #[doc = "Charge register position 1"]
862    #[inline(always)]
863    pub fn dcdc_charge_reg_1(
864        self,
865    ) -> crate::common::RegisterField<3, 0x7, 1, 0, u8, u8, DcdcStatus0Reg_SPEC, crate::common::R>
866    {
867        crate::common::RegisterField::<3,0x7,1,0,u8,u8,DcdcStatus0Reg_SPEC,crate::common::R>::from_register(self,0)
868    }
869
870    #[doc = "Charge register position 0"]
871    #[inline(always)]
872    pub fn dcdc_charge_reg_0(
873        self,
874    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, DcdcStatus0Reg_SPEC, crate::common::R>
875    {
876        crate::common::RegisterField::<0,0x7,1,0,u8,u8,DcdcStatus0Reg_SPEC,crate::common::R>::from_register(self,0)
877    }
878}
879impl ::core::default::Default for DcdcStatus0Reg {
880    #[inline(always)]
881    fn default() -> DcdcStatus0Reg {
882        <crate::RegValueT<DcdcStatus0Reg_SPEC> as RegisterValue<_>>::new(0)
883    }
884}
885
886#[doc(hidden)]
887#[derive(Copy, Clone, Eq, PartialEq)]
888pub struct DcdcStatus1Reg_SPEC;
889impl crate::sealed::RegSpec for DcdcStatus1Reg_SPEC {
890    type DataType = u16;
891}
892
893#[doc = "DCDC Second Status Register"]
894pub type DcdcStatus1Reg = crate::RegValueT<DcdcStatus1Reg_SPEC>;
895
896impl DcdcStatus1Reg {
897    #[doc = "Indicates whether V18P is available\nRequires that converter is enabled, output is enabled and V_OK and V_NOK have both occured"]
898    #[inline(always)]
899    pub fn dcdc_v18p_available(
900        self,
901    ) -> crate::common::RegisterFieldBool<11, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
902        crate::common::RegisterFieldBool::<11,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
903    }
904
905    #[doc = "Indicates whether VDD is available\nRequires that converter is enabled, output is enabled and V_OK and V_NOK have both occured"]
906    #[inline(always)]
907    pub fn dcdc_vdd_available(
908        self,
909    ) -> crate::common::RegisterFieldBool<10, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
910        crate::common::RegisterFieldBool::<10,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
911    }
912
913    #[doc = "Indicates whether V18 is available\nRequires that converter is enabled, output is enabled and V_OK and V_NOK have both occured"]
914    #[inline(always)]
915    pub fn dcdc_v18_available(
916        self,
917    ) -> crate::common::RegisterFieldBool<9, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
918        crate::common::RegisterFieldBool::<9,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
919    }
920
921    #[doc = "Indicates whether V14 is available\nRequires that converter is enabled, output is enabled and V_OK and V_NOK have both occured"]
922    #[inline(always)]
923    pub fn dcdc_v14_available(
924        self,
925    ) -> crate::common::RegisterFieldBool<8, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
926        crate::common::RegisterFieldBool::<8,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
927    }
928
929    #[doc = "OK output of V18P comparator"]
930    #[inline(always)]
931    pub fn dcdc_v18p_ok(
932        self,
933    ) -> crate::common::RegisterFieldBool<7, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
934        crate::common::RegisterFieldBool::<7,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
935    }
936
937    #[doc = "OK output of VDD comparator"]
938    #[inline(always)]
939    pub fn dcdc_vdd_ok(
940        self,
941    ) -> crate::common::RegisterFieldBool<6, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
942        crate::common::RegisterFieldBool::<6,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
943    }
944
945    #[doc = "OK output of V18 comparator"]
946    #[inline(always)]
947    pub fn dcdc_v18_ok(
948        self,
949    ) -> crate::common::RegisterFieldBool<5, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
950        crate::common::RegisterFieldBool::<5,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
951    }
952
953    #[doc = "OK output of V14 comparator"]
954    #[inline(always)]
955    pub fn dcdc_v14_ok(
956        self,
957    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
958        crate::common::RegisterFieldBool::<4,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
959    }
960
961    #[doc = "NOK output of V18P comparator"]
962    #[inline(always)]
963    pub fn dcdc_v18p_nok(
964        self,
965    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
966        crate::common::RegisterFieldBool::<3,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
967    }
968
969    #[doc = "NOK output of VDD comparator"]
970    #[inline(always)]
971    pub fn dcdc_vdd_nok(
972        self,
973    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
974        crate::common::RegisterFieldBool::<2,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
975    }
976
977    #[doc = "NOK output of V18 comparator"]
978    #[inline(always)]
979    pub fn dcdc_v18_nok(
980        self,
981    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
982        crate::common::RegisterFieldBool::<1,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
983    }
984
985    #[doc = "NOK output of V14 comparator"]
986    #[inline(always)]
987    pub fn dcdc_v14_nok(
988        self,
989    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
990        crate::common::RegisterFieldBool::<0,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
991    }
992}
993impl ::core::default::Default for DcdcStatus1Reg {
994    #[inline(always)]
995    fn default() -> DcdcStatus1Reg {
996        <crate::RegValueT<DcdcStatus1Reg_SPEC> as RegisterValue<_>>::new(0)
997    }
998}
999
1000#[doc(hidden)]
1001#[derive(Copy, Clone, Eq, PartialEq)]
1002pub struct DcdcStatus2Reg_SPEC;
1003impl crate::sealed::RegSpec for DcdcStatus2Reg_SPEC {
1004    type DataType = u16;
1005}
1006
1007#[doc = "DCDC Third Status Register"]
1008pub type DcdcStatus2Reg = crate::RegValueT<DcdcStatus2Reg_SPEC>;
1009
1010impl DcdcStatus2Reg {
1011    #[doc = "DCDC state machine V18P output"]
1012    #[inline(always)]
1013    pub fn dcdc_v18p_sw_state(
1014        self,
1015    ) -> crate::common::RegisterFieldBool<11, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1016        crate::common::RegisterFieldBool::<11,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1017    }
1018
1019    #[doc = "DCDC state machine VDD output"]
1020    #[inline(always)]
1021    pub fn dcdc_vdd_sw_state(
1022        self,
1023    ) -> crate::common::RegisterFieldBool<10, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1024        crate::common::RegisterFieldBool::<10,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1025    }
1026
1027    #[doc = "DCDC state machine V18 output"]
1028    #[inline(always)]
1029    pub fn dcdc_v18_sw_state(
1030        self,
1031    ) -> crate::common::RegisterFieldBool<9, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1032        crate::common::RegisterFieldBool::<9,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1033    }
1034
1035    #[doc = "DCDC state machine V14 output"]
1036    #[inline(always)]
1037    pub fn dcdc_v14_sw_state(
1038        self,
1039    ) -> crate::common::RegisterFieldBool<8, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1040        crate::common::RegisterFieldBool::<8,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1041    }
1042
1043    #[doc = "DCDC state machine NSW output"]
1044    #[inline(always)]
1045    pub fn dcdc_nsw_state(
1046        self,
1047    ) -> crate::common::RegisterFieldBool<7, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1048        crate::common::RegisterFieldBool::<7,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1049    }
1050
1051    #[doc = "DCDC state machine PSW output"]
1052    #[inline(always)]
1053    pub fn dcdc_psw_state(
1054        self,
1055    ) -> crate::common::RegisterFieldBool<6, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1056        crate::common::RegisterFieldBool::<6,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1057    }
1058
1059    #[doc = "DCDC P side dynamic comparator P output"]
1060    #[inline(always)]
1061    pub fn dcdc_p_comp_p(
1062        self,
1063    ) -> crate::common::RegisterFieldBool<5, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1064        crate::common::RegisterFieldBool::<5,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1065    }
1066
1067    #[doc = "DCDC P side dynamic comparator N output"]
1068    #[inline(always)]
1069    pub fn dcdc_p_comp_n(
1070        self,
1071    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1072        crate::common::RegisterFieldBool::<4,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1073    }
1074
1075    #[doc = "DCDC N side dynamic comparator P output"]
1076    #[inline(always)]
1077    pub fn dcdc_n_comp_p(
1078        self,
1079    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1080        crate::common::RegisterFieldBool::<3,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1081    }
1082
1083    #[doc = "DCDC N side dynamic comparator N output"]
1084    #[inline(always)]
1085    pub fn dcdc_n_comp_n(
1086        self,
1087    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1088        crate::common::RegisterFieldBool::<2,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1089    }
1090
1091    #[doc = "DCDC P side continuous time comparator output"]
1092    #[inline(always)]
1093    pub fn dcdc_p_comp(
1094        self,
1095    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1096        crate::common::RegisterFieldBool::<1,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1097    }
1098
1099    #[doc = "DCDC N side continuous time comparator output"]
1100    #[inline(always)]
1101    pub fn dcdc_n_comp(
1102        self,
1103    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcStatus2Reg_SPEC, crate::common::R> {
1104        crate::common::RegisterFieldBool::<0,1,0,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
1105    }
1106}
1107impl ::core::default::Default for DcdcStatus2Reg {
1108    #[inline(always)]
1109    fn default() -> DcdcStatus2Reg {
1110        <crate::RegValueT<DcdcStatus2Reg_SPEC> as RegisterValue<_>>::new(0)
1111    }
1112}
1113
1114#[doc(hidden)]
1115#[derive(Copy, Clone, Eq, PartialEq)]
1116pub struct DcdcStatus3Reg_SPEC;
1117impl crate::sealed::RegSpec for DcdcStatus3Reg_SPEC {
1118    type DataType = u16;
1119}
1120
1121#[doc = "DCDC Fourth Status Register"]
1122pub type DcdcStatus3Reg = crate::RegValueT<DcdcStatus3Reg_SPEC>;
1123
1124impl DcdcStatus3Reg {
1125    #[doc = "Indicates if the converter is enabled and the startup counter has expired (internal biasing settled)"]
1126    #[inline(always)]
1127    pub fn dcdc_startup_complete(
1128        self,
1129    ) -> crate::common::RegisterFieldBool<11, 1, 0, DcdcStatus3Reg_SPEC, crate::common::R> {
1130        crate::common::RegisterFieldBool::<11,1,0,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
1131    }
1132
1133    #[doc = "Indicates if the converter is in low battery voltage mode"]
1134    #[inline(always)]
1135    pub fn dcdc_lv_mode(
1136        self,
1137    ) -> crate::common::RegisterFieldBool<10, 1, 0, DcdcStatus3Reg_SPEC, crate::common::R> {
1138        crate::common::RegisterFieldBool::<10,1,0,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
1139    }
1140
1141    #[doc = "Actual V18P current limit"]
1142    #[inline(always)]
1143    pub fn dcdc_i_lim_v18p(
1144        self,
1145    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcStatus3Reg_SPEC, crate::common::R>
1146    {
1147        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
1148    }
1149
1150    #[doc = "Actual VDD current limit"]
1151    #[inline(always)]
1152    pub fn dcdc_i_lim_vdd(
1153        self,
1154    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcStatus3Reg_SPEC, crate::common::R>
1155    {
1156        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
1157    }
1158}
1159impl ::core::default::Default for DcdcStatus3Reg {
1160    #[inline(always)]
1161    fn default() -> DcdcStatus3Reg {
1162        <crate::RegValueT<DcdcStatus3Reg_SPEC> as RegisterValue<_>>::new(132)
1163    }
1164}
1165
1166#[doc(hidden)]
1167#[derive(Copy, Clone, Eq, PartialEq)]
1168pub struct DcdcStatus4Reg_SPEC;
1169impl crate::sealed::RegSpec for DcdcStatus4Reg_SPEC {
1170    type DataType = u16;
1171}
1172
1173#[doc = "DCDC Fifth Status Register"]
1174pub type DcdcStatus4Reg = crate::RegValueT<DcdcStatus4Reg_SPEC>;
1175
1176impl DcdcStatus4Reg {
1177    #[doc = "Actual V18 current limit"]
1178    #[inline(always)]
1179    pub fn dcdc_i_lim_v18(
1180        self,
1181    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcStatus4Reg_SPEC, crate::common::R>
1182    {
1183        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcStatus4Reg_SPEC,crate::common::R>::from_register(self,0)
1184    }
1185
1186    #[doc = "Actual V14 current limit"]
1187    #[inline(always)]
1188    pub fn dcdc_i_lim_v14(
1189        self,
1190    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcStatus4Reg_SPEC, crate::common::R>
1191    {
1192        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcStatus4Reg_SPEC,crate::common::R>::from_register(self,0)
1193    }
1194}
1195impl ::core::default::Default for DcdcStatus4Reg {
1196    #[inline(always)]
1197    fn default() -> DcdcStatus4Reg {
1198        <crate::RegValueT<DcdcStatus4Reg_SPEC> as RegisterValue<_>>::new(132)
1199    }
1200}
1201
1202#[doc(hidden)]
1203#[derive(Copy, Clone, Eq, PartialEq)]
1204pub struct DcdcTest0Reg_SPEC;
1205impl crate::sealed::RegSpec for DcdcTest0Reg_SPEC {
1206    type DataType = u16;
1207}
1208
1209#[doc = "DCDC Test Register"]
1210pub type DcdcTest0Reg = crate::RegValueT<DcdcTest0Reg_SPEC>;
1211
1212impl DcdcTest0Reg {
1213    #[doc = "Disables automatic comparator clock, clock lines values based on DCDC_COMP_CLK"]
1214    #[inline(always)]
1215    pub fn dcdc_force_comp_clk(
1216        self,
1217    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1218        crate::common::RegisterFieldBool::<15,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1219    }
1220
1221    #[doc = "Force output current setting"]
1222    #[inline(always)]
1223    pub fn dcdc_force_current(
1224        self,
1225    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1226        crate::common::RegisterFieldBool::<14,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1227    }
1228
1229    #[doc = "Output monitor switch (connect to ADC)\n000 = None\n001 = V14\n010 = V18\n011 = VDD\n100 = VPA\n101 = None\n110 = None\n111 = None"]
1230    #[inline(always)]
1231    pub fn dcdc_output_monitor(
1232        self,
1233    ) -> crate::common::RegisterField<11, 0x7, 1, 0, u8, u8, DcdcTest0Reg_SPEC, crate::common::RW>
1234    {
1235        crate::common::RegisterField::<11,0x7,1,0,u8,u8,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1236    }
1237
1238    #[doc = "Analog test bus\n000 = None\n001 = High side ground\n010 = Low side supply\n011 = 1.2 V buffer output\n100 = None\n101 = None\n110 = None\n111 = None"]
1239    #[inline(always)]
1240    pub fn dcdc_ana_test(
1241        self,
1242    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, DcdcTest0Reg_SPEC, crate::common::RW>
1243    {
1244        crate::common::RegisterField::<8,0x7,1,0,u8,u8,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1245    }
1246
1247    #[doc = "Force idle mode"]
1248    #[inline(always)]
1249    pub fn dcdc_force_idle(
1250        self,
1251    ) -> crate::common::RegisterFieldBool<7, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1252        crate::common::RegisterFieldBool::<7,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1253    }
1254
1255    #[doc = "Force V18P switch on"]
1256    #[inline(always)]
1257    pub fn dcdc_force_v18p(
1258        self,
1259    ) -> crate::common::RegisterFieldBool<6, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1260        crate::common::RegisterFieldBool::<6,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1261    }
1262
1263    #[doc = "Force VDD switch on"]
1264    #[inline(always)]
1265    pub fn dcdc_force_vdd(
1266        self,
1267    ) -> crate::common::RegisterFieldBool<5, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1268        crate::common::RegisterFieldBool::<5,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1269    }
1270
1271    #[doc = "Force V18 switch on"]
1272    #[inline(always)]
1273    pub fn dcdc_force_v18(
1274        self,
1275    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1276        crate::common::RegisterFieldBool::<4,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1277    }
1278
1279    #[doc = "Force V14 switch on"]
1280    #[inline(always)]
1281    pub fn dcdc_force_v14(
1282        self,
1283    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1284        crate::common::RegisterFieldBool::<3,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1285    }
1286
1287    #[doc = "Force FW switch on"]
1288    #[inline(always)]
1289    pub fn dcdc_force_fw(
1290        self,
1291    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1292        crate::common::RegisterFieldBool::<2,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1293    }
1294
1295    #[doc = "Force N switch on"]
1296    #[inline(always)]
1297    pub fn dcdc_force_nsw(
1298        self,
1299    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1300        crate::common::RegisterFieldBool::<1,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1301    }
1302
1303    #[doc = "Force P switch on"]
1304    #[inline(always)]
1305    pub fn dcdc_force_psw(
1306        self,
1307    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcTest0Reg_SPEC, crate::common::RW> {
1308        crate::common::RegisterFieldBool::<0,1,0,DcdcTest0Reg_SPEC,crate::common::RW>::from_register(self,0)
1309    }
1310}
1311impl ::core::default::Default for DcdcTest0Reg {
1312    #[inline(always)]
1313    fn default() -> DcdcTest0Reg {
1314        <crate::RegValueT<DcdcTest0Reg_SPEC> as RegisterValue<_>>::new(0)
1315    }
1316}
1317
1318#[doc(hidden)]
1319#[derive(Copy, Clone, Eq, PartialEq)]
1320pub struct DcdcTest1Reg_SPEC;
1321impl crate::sealed::RegSpec for DcdcTest1Reg_SPEC {
1322    type DataType = u16;
1323}
1324
1325#[doc = "DCDC Test Register"]
1326pub type DcdcTest1Reg = crate::RegValueT<DcdcTest1Reg_SPEC>;
1327
1328impl DcdcTest1Reg {
1329    #[doc = "Forced clock values for \\[COMP_VPA, COMP_VDD, COMP_V18, COMP_V14\\] (requires DCDC_FORCE_COMP_CLK = 1)"]
1330    #[inline(always)]
1331    pub fn dcdc_comp_clk(
1332        self,
1333    ) -> crate::common::RegisterField<9, 0xf, 1, 0, u8, u8, DcdcTest1Reg_SPEC, crate::common::RW>
1334    {
1335        crate::common::RegisterField::<9,0xf,1,0,u8,u8,DcdcTest1Reg_SPEC,crate::common::RW>::from_register(self,0)
1336    }
1337
1338    #[doc = "Current limit setting when current limit is forced"]
1339    #[inline(always)]
1340    pub fn dcdc_test_current(
1341        self,
1342    ) -> crate::common::RegisterField<4, 0x1f, 1, 0, u8, u8, DcdcTest1Reg_SPEC, crate::common::RW>
1343    {
1344        crate::common::RegisterField::<4,0x1f,1,0,u8,u8,DcdcTest1Reg_SPEC,crate::common::RW>::from_register(self,0)
1345    }
1346
1347    #[doc = "Determines which register appears on the testbus\n0x0 = DCDC_NONE\n0x1 = DCDC_STATUS_0\n0x2 = DCDC_STATUS_1\n0x3 = DCDC_STATUS_2\n0x4 = DCDC_STATUS_3\n0x5 = DCDC_STATUS_4\n0x6 = DCDC_TRIM_0\n0x7 = DCDC_TRIM_1\n0x8 = DCDC_TRIM_2\n0x9 = DCDC_TRIM_3\n0xA-0xF = DCDC_NONE"]
1348    #[inline(always)]
1349    pub fn dcdc_test_reg(
1350        self,
1351    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, DcdcTest1Reg_SPEC, crate::common::RW>
1352    {
1353        crate::common::RegisterField::<0,0xf,1,0,u8,u8,DcdcTest1Reg_SPEC,crate::common::RW>::from_register(self,0)
1354    }
1355}
1356impl ::core::default::Default for DcdcTest1Reg {
1357    #[inline(always)]
1358    fn default() -> DcdcTest1Reg {
1359        <crate::RegValueT<DcdcTest1Reg_SPEC> as RegisterValue<_>>::new(0)
1360    }
1361}
1362
1363#[doc(hidden)]
1364#[derive(Copy, Clone, Eq, PartialEq)]
1365pub struct DcdcTrim0Reg_SPEC;
1366impl crate::sealed::RegSpec for DcdcTrim0Reg_SPEC {
1367    type DataType = u16;
1368}
1369
1370#[doc = "DCDC V14 Comparator Trim Register"]
1371pub type DcdcTrim0Reg = crate::RegValueT<DcdcTrim0Reg_SPEC>;
1372
1373impl DcdcTrim0Reg {
1374    #[doc = "P comparator trim value when V14 is active\nSigned magnitude representation\n011111 = +47 mV\n000000 = 100000 = +16 mV\n111111 = -15 mV"]
1375    #[inline(always)]
1376    pub fn dcdc_v14_trim_p(
1377        self,
1378    ) -> crate::common::RegisterField<6, 0x3f, 1, 0, u8, u8, DcdcTrim0Reg_SPEC, crate::common::R>
1379    {
1380        crate::common::RegisterField::<6,0x3f,1,0,u8,u8,DcdcTrim0Reg_SPEC,crate::common::R>::from_register(self,0)
1381    }
1382
1383    #[doc = "N comparator trim value when V14 is active\nSigned magnitude representation\n011111 = +13 mV\n000000 = 100000 = -22 mV\n111111 = -56 mV"]
1384    #[inline(always)]
1385    pub fn dcdc_v14_trim_n(
1386        self,
1387    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, DcdcTrim0Reg_SPEC, crate::common::R>
1388    {
1389        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,DcdcTrim0Reg_SPEC,crate::common::R>::from_register(self,0)
1390    }
1391}
1392impl ::core::default::Default for DcdcTrim0Reg {
1393    #[inline(always)]
1394    fn default() -> DcdcTrim0Reg {
1395        <crate::RegValueT<DcdcTrim0Reg_SPEC> as RegisterValue<_>>::new(0)
1396    }
1397}
1398
1399#[doc(hidden)]
1400#[derive(Copy, Clone, Eq, PartialEq)]
1401pub struct DcdcTrim1Reg_SPEC;
1402impl crate::sealed::RegSpec for DcdcTrim1Reg_SPEC {
1403    type DataType = u16;
1404}
1405
1406#[doc = "DCDC V18 Comparator Trim Register"]
1407pub type DcdcTrim1Reg = crate::RegValueT<DcdcTrim1Reg_SPEC>;
1408
1409impl DcdcTrim1Reg {
1410    #[doc = "P comparator trim value when V18 is active\nSigned magnitude representation\n011111 = +47 mV\n000000 = 100000 = +16 mV\n111111 = -15 mV"]
1411    #[inline(always)]
1412    pub fn dcdc_v18_trim_p(
1413        self,
1414    ) -> crate::common::RegisterField<6, 0x3f, 1, 0, u8, u8, DcdcTrim1Reg_SPEC, crate::common::R>
1415    {
1416        crate::common::RegisterField::<6,0x3f,1,0,u8,u8,DcdcTrim1Reg_SPEC,crate::common::R>::from_register(self,0)
1417    }
1418
1419    #[doc = "N comparator trim value when V18 is active\nSigned magnitude representation\n011111 = +13 mV\n000000 = 100000 = -22 mV\n111111 = -56 mV"]
1420    #[inline(always)]
1421    pub fn dcdc_v18_trim_n(
1422        self,
1423    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, DcdcTrim1Reg_SPEC, crate::common::R>
1424    {
1425        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,DcdcTrim1Reg_SPEC,crate::common::R>::from_register(self,0)
1426    }
1427}
1428impl ::core::default::Default for DcdcTrim1Reg {
1429    #[inline(always)]
1430    fn default() -> DcdcTrim1Reg {
1431        <crate::RegValueT<DcdcTrim1Reg_SPEC> as RegisterValue<_>>::new(0)
1432    }
1433}
1434
1435#[doc(hidden)]
1436#[derive(Copy, Clone, Eq, PartialEq)]
1437pub struct DcdcTrim2Reg_SPEC;
1438impl crate::sealed::RegSpec for DcdcTrim2Reg_SPEC {
1439    type DataType = u16;
1440}
1441
1442#[doc = "DCDC VDD Comparator Trim Register"]
1443pub type DcdcTrim2Reg = crate::RegValueT<DcdcTrim2Reg_SPEC>;
1444
1445impl DcdcTrim2Reg {
1446    #[doc = "P comparator trim value when VDD is active\nSigned magnitude representation\n011111 = +47 mV\n000000 = 100000 = +16 mV\n111111 = -15 mV"]
1447    #[inline(always)]
1448    pub fn dcdc_vdd_trim_p(
1449        self,
1450    ) -> crate::common::RegisterField<6, 0x3f, 1, 0, u8, u8, DcdcTrim2Reg_SPEC, crate::common::R>
1451    {
1452        crate::common::RegisterField::<6,0x3f,1,0,u8,u8,DcdcTrim2Reg_SPEC,crate::common::R>::from_register(self,0)
1453    }
1454
1455    #[doc = "N comparator trim value when VDD is active\nSigned magnitude representation\n011111 = +13 mV\n000000 = 100000 = -22 mV\n111111 = -56 mV"]
1456    #[inline(always)]
1457    pub fn dcdc_vdd_trim_n(
1458        self,
1459    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, DcdcTrim2Reg_SPEC, crate::common::R>
1460    {
1461        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,DcdcTrim2Reg_SPEC,crate::common::R>::from_register(self,0)
1462    }
1463}
1464impl ::core::default::Default for DcdcTrim2Reg {
1465    #[inline(always)]
1466    fn default() -> DcdcTrim2Reg {
1467        <crate::RegValueT<DcdcTrim2Reg_SPEC> as RegisterValue<_>>::new(0)
1468    }
1469}
1470
1471#[doc(hidden)]
1472#[derive(Copy, Clone, Eq, PartialEq)]
1473pub struct DcdcTrim3Reg_SPEC;
1474impl crate::sealed::RegSpec for DcdcTrim3Reg_SPEC {
1475    type DataType = u16;
1476}
1477
1478#[doc = "DCDC VPA Comparator Trim Register"]
1479pub type DcdcTrim3Reg = crate::RegValueT<DcdcTrim3Reg_SPEC>;
1480
1481impl DcdcTrim3Reg {
1482    #[doc = "P comparator trim value when V18P is active\nSigned magnitude representation\n011111 = +47 mV\n000000 = 100000 = +16 mV\n111111 = -15 mV"]
1483    #[inline(always)]
1484    pub fn dcdc_v18p_trim_p(
1485        self,
1486    ) -> crate::common::RegisterField<6, 0x3f, 1, 0, u8, u8, DcdcTrim3Reg_SPEC, crate::common::R>
1487    {
1488        crate::common::RegisterField::<6,0x3f,1,0,u8,u8,DcdcTrim3Reg_SPEC,crate::common::R>::from_register(self,0)
1489    }
1490
1491    #[doc = "N comparator trim value when V18P is active\nSigned magnitude representation\n011111 = +13 mV\n000000 = 100000 = -22 mV\n111111 = -56 mV"]
1492    #[inline(always)]
1493    pub fn dcdc_v18p_trim_n(
1494        self,
1495    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, DcdcTrim3Reg_SPEC, crate::common::R>
1496    {
1497        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,DcdcTrim3Reg_SPEC,crate::common::R>::from_register(self,0)
1498    }
1499}
1500impl ::core::default::Default for DcdcTrim3Reg {
1501    #[inline(always)]
1502    fn default() -> DcdcTrim3Reg {
1503        <crate::RegValueT<DcdcTrim3Reg_SPEC> as RegisterValue<_>>::new(0)
1504    }
1505}
1506
1507#[doc(hidden)]
1508#[derive(Copy, Clone, Eq, PartialEq)]
1509pub struct DcdcTrimReg_SPEC;
1510impl crate::sealed::RegSpec for DcdcTrimReg_SPEC {
1511    type DataType = u16;
1512}
1513
1514#[doc = "DCDC Comparator Trim Register"]
1515pub type DcdcTrimReg = crate::RegValueT<DcdcTrimReg_SPEC>;
1516
1517impl DcdcTrimReg {
1518    #[doc = "Trim mode for P side comparator\n0 = Automatic\n1 = Manual"]
1519    #[inline(always)]
1520    pub fn dcdc_p_comp_man_trim(
1521        self,
1522    ) -> crate::common::RegisterFieldBool<13, 1, 0, DcdcTrimReg_SPEC, crate::common::RW> {
1523        crate::common::RegisterFieldBool::<13,1,0,DcdcTrimReg_SPEC,crate::common::RW>::from_register(self,0)
1524    }
1525
1526    #[doc = "Manual trim value for P side comparator\nSigned magnitude representation\n011111 = +47 mV\n000000 = 100000 = +16 mV\n111111 = -15 mV"]
1527    #[inline(always)]
1528    pub fn dcdc_p_comp_trim(
1529        self,
1530    ) -> crate::common::RegisterField<7, 0x3f, 1, 0, u8, u8, DcdcTrimReg_SPEC, crate::common::RW>
1531    {
1532        crate::common::RegisterField::<7,0x3f,1,0,u8,u8,DcdcTrimReg_SPEC,crate::common::RW>::from_register(self,0)
1533    }
1534
1535    #[doc = "Trim mode for N side comparator\n0 = Automatic\n1 = Manual"]
1536    #[inline(always)]
1537    pub fn dcdc_n_comp_man_trim(
1538        self,
1539    ) -> crate::common::RegisterFieldBool<6, 1, 0, DcdcTrimReg_SPEC, crate::common::RW> {
1540        crate::common::RegisterFieldBool::<6,1,0,DcdcTrimReg_SPEC,crate::common::RW>::from_register(self,0)
1541    }
1542
1543    #[doc = "Manual trim value for N side comparator\nSigned magnitude representation\n011111 = +13 mV\n000000 = 100000 = -22 mV\n111111 = -56 mV"]
1544    #[inline(always)]
1545    pub fn dcdc_n_comp_trim(
1546        self,
1547    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, DcdcTrimReg_SPEC, crate::common::RW>
1548    {
1549        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,DcdcTrimReg_SPEC,crate::common::RW>::from_register(self,0)
1550    }
1551}
1552impl ::core::default::Default for DcdcTrimReg {
1553    #[inline(always)]
1554    fn default() -> DcdcTrimReg {
1555        <crate::RegValueT<DcdcTrimReg_SPEC> as RegisterValue<_>>::new(0)
1556    }
1557}
1558
1559#[doc(hidden)]
1560#[derive(Copy, Clone, Eq, PartialEq)]
1561pub struct DcdcV140Reg_SPEC;
1562impl crate::sealed::RegSpec for DcdcV140Reg_SPEC {
1563    type DataType = u16;
1564}
1565
1566#[doc = "DCDC V14 First Control Register"]
1567pub type DcdcV140Reg = crate::RegValueT<DcdcV140Reg_SPEC>;
1568
1569impl DcdcV140Reg {
1570    #[doc = "V14 output fast current ramping (improves response time at the cost of more ripple)"]
1571    #[inline(always)]
1572    pub fn dcdc_v14_fast_ramping(
1573        self,
1574    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcV140Reg_SPEC, crate::common::RW> {
1575        crate::common::RegisterFieldBool::<15,1,0,DcdcV140Reg_SPEC,crate::common::RW>::from_register(self,0)
1576    }
1577
1578    #[doc = "V14 output voltage\nV = 1.2 V + 25 mV * N"]
1579    #[inline(always)]
1580    pub fn dcdc_v14_voltage(
1581        self,
1582    ) -> crate::common::RegisterField<10, 0x1f, 1, 0, u8, u8, DcdcV140Reg_SPEC, crate::common::RW>
1583    {
1584        crate::common::RegisterField::<10,0x1f,1,0,u8,u8,DcdcV140Reg_SPEC,crate::common::RW>::from_register(self,0)
1585    }
1586
1587    #[doc = "V14 output maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1588    #[inline(always)]
1589    pub fn dcdc_v14_cur_lim_max_hv(
1590        self,
1591    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcV140Reg_SPEC, crate::common::RW>
1592    {
1593        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcV140Reg_SPEC,crate::common::RW>::from_register(self,0)
1594    }
1595
1596    #[doc = "V14 output minimum current limit\nI = 30 mA * (1 + N)"]
1597    #[inline(always)]
1598    pub fn dcdc_v14_cur_lim_min(
1599        self,
1600    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcV140Reg_SPEC, crate::common::RW>
1601    {
1602        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcV140Reg_SPEC,crate::common::RW>::from_register(self,0)
1603    }
1604}
1605impl ::core::default::Default for DcdcV140Reg {
1606    #[inline(always)]
1607    fn default() -> DcdcV140Reg {
1608        <crate::RegValueT<DcdcV140Reg_SPEC> as RegisterValue<_>>::new(41380)
1609    }
1610}
1611
1612#[doc(hidden)]
1613#[derive(Copy, Clone, Eq, PartialEq)]
1614pub struct DcdcV141Reg_SPEC;
1615impl crate::sealed::RegSpec for DcdcV141Reg_SPEC {
1616    type DataType = u16;
1617}
1618
1619#[doc = "DCDC V14 Second Control Register"]
1620pub type DcdcV141Reg = crate::RegValueT<DcdcV141Reg_SPEC>;
1621
1622impl DcdcV141Reg {
1623    #[doc = "V14 output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1624    #[inline(always)]
1625    pub fn dcdc_v14_enable_hv(
1626        self,
1627    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcV141Reg_SPEC, crate::common::RW> {
1628        crate::common::RegisterFieldBool::<15,1,0,DcdcV141Reg_SPEC,crate::common::RW>::from_register(self,0)
1629    }
1630
1631    #[doc = "V14 output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1632    #[inline(always)]
1633    pub fn dcdc_v14_enable_lv(
1634        self,
1635    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcV141Reg_SPEC, crate::common::RW> {
1636        crate::common::RegisterFieldBool::<14,1,0,DcdcV141Reg_SPEC,crate::common::RW>::from_register(self,0)
1637    }
1638
1639    #[doc = "V14 output maximum current limit low battery voltage mode)\nI = 30 mA * (1 + N)"]
1640    #[inline(always)]
1641    pub fn dcdc_v14_cur_lim_max_lv(
1642        self,
1643    ) -> crate::common::RegisterField<10, 0xf, 1, 0, u8, u8, DcdcV141Reg_SPEC, crate::common::RW>
1644    {
1645        crate::common::RegisterField::<10,0xf,1,0,u8,u8,DcdcV141Reg_SPEC,crate::common::RW>::from_register(self,0)
1646    }
1647
1648    #[doc = "V14 output idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1649    #[inline(always)]
1650    pub fn dcdc_v14_idle_hyst(
1651        self,
1652    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcV141Reg_SPEC, crate::common::RW>
1653    {
1654        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcV141Reg_SPEC,crate::common::RW>::from_register(self,0)
1655    }
1656
1657    #[doc = "V14 output minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1658    #[inline(always)]
1659    pub fn dcdc_v14_idle_min(
1660        self,
1661    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcV141Reg_SPEC, crate::common::RW>
1662    {
1663        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcV141Reg_SPEC,crate::common::RW>::from_register(self,0)
1664    }
1665}
1666impl ::core::default::Default for DcdcV141Reg {
1667    #[inline(always)]
1668    fn default() -> DcdcV141Reg {
1669        <crate::RegValueT<DcdcV141Reg_SPEC> as RegisterValue<_>>::new(55440)
1670    }
1671}
1672
1673#[doc(hidden)]
1674#[derive(Copy, Clone, Eq, PartialEq)]
1675pub struct DcdcV18P0Reg_SPEC;
1676impl crate::sealed::RegSpec for DcdcV18P0Reg_SPEC {
1677    type DataType = u16;
1678}
1679
1680#[doc = "DCDC VPA First Control Register"]
1681pub type DcdcV18P0Reg = crate::RegValueT<DcdcV18P0Reg_SPEC>;
1682
1683impl DcdcV18P0Reg {
1684    #[doc = "V18P output fast current ramping (improves response time at the cost of more ripple)"]
1685    #[inline(always)]
1686    pub fn dcdc_v18p_fast_ramping(
1687        self,
1688    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcV18P0Reg_SPEC, crate::common::RW> {
1689        crate::common::RegisterFieldBool::<15,1,0,DcdcV18P0Reg_SPEC,crate::common::RW>::from_register(self,0)
1690    }
1691
1692    #[doc = "V18P output voltage\nV = 1.2 V + 25 mV * N"]
1693    #[inline(always)]
1694    pub fn dcdc_v18p_voltage(
1695        self,
1696    ) -> crate::common::RegisterField<10, 0x1f, 1, 0, u8, u8, DcdcV18P0Reg_SPEC, crate::common::RW>
1697    {
1698        crate::common::RegisterField::<10,0x1f,1,0,u8,u8,DcdcV18P0Reg_SPEC,crate::common::RW>::from_register(self,0)
1699    }
1700
1701    #[doc = "V18P output maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1702    #[inline(always)]
1703    pub fn dcdc_v18p_cur_lim_max_hv(
1704        self,
1705    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcV18P0Reg_SPEC, crate::common::RW>
1706    {
1707        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcV18P0Reg_SPEC,crate::common::RW>::from_register(self,0)
1708    }
1709
1710    #[doc = "V18P output minimum current limit\nI = 30 mA * (1 + N)"]
1711    #[inline(always)]
1712    pub fn dcdc_v18p_cur_lim_min(
1713        self,
1714    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcV18P0Reg_SPEC, crate::common::RW>
1715    {
1716        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcV18P0Reg_SPEC,crate::common::RW>::from_register(self,0)
1717    }
1718}
1719impl ::core::default::Default for DcdcV18P0Reg {
1720    #[inline(always)]
1721    fn default() -> DcdcV18P0Reg {
1722        <crate::RegValueT<DcdcV18P0Reg_SPEC> as RegisterValue<_>>::new(58340)
1723    }
1724}
1725
1726#[doc(hidden)]
1727#[derive(Copy, Clone, Eq, PartialEq)]
1728pub struct DcdcV18P1Reg_SPEC;
1729impl crate::sealed::RegSpec for DcdcV18P1Reg_SPEC {
1730    type DataType = u16;
1731}
1732
1733#[doc = "DCDC VPA Second Control Register"]
1734pub type DcdcV18P1Reg = crate::RegValueT<DcdcV18P1Reg_SPEC>;
1735
1736impl DcdcV18P1Reg {
1737    #[doc = "V18P output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1738    #[inline(always)]
1739    pub fn dcdc_v18p_enable_hv(
1740        self,
1741    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcV18P1Reg_SPEC, crate::common::RW> {
1742        crate::common::RegisterFieldBool::<15,1,0,DcdcV18P1Reg_SPEC,crate::common::RW>::from_register(self,0)
1743    }
1744
1745    #[doc = "V18P output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1746    #[inline(always)]
1747    pub fn dcdc_v18p_enable_lv(
1748        self,
1749    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcV18P1Reg_SPEC, crate::common::RW> {
1750        crate::common::RegisterFieldBool::<14,1,0,DcdcV18P1Reg_SPEC,crate::common::RW>::from_register(self,0)
1751    }
1752
1753    #[doc = "V18P output maximum current limit low battery voltage mode)\nI = 30 mA * (1 + N)"]
1754    #[inline(always)]
1755    pub fn dcdc_v18p_cur_lim_max_lv(
1756        self,
1757    ) -> crate::common::RegisterField<10, 0xf, 1, 0, u8, u8, DcdcV18P1Reg_SPEC, crate::common::RW>
1758    {
1759        crate::common::RegisterField::<10,0xf,1,0,u8,u8,DcdcV18P1Reg_SPEC,crate::common::RW>::from_register(self,0)
1760    }
1761
1762    #[doc = "V18P output idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1763    #[inline(always)]
1764    pub fn dcdc_v18p_idle_hyst(
1765        self,
1766    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcV18P1Reg_SPEC, crate::common::RW>
1767    {
1768        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcV18P1Reg_SPEC,crate::common::RW>::from_register(self,0)
1769    }
1770
1771    #[doc = "V18P output minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1772    #[inline(always)]
1773    pub fn dcdc_v18p_idle_min(
1774        self,
1775    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcV18P1Reg_SPEC, crate::common::RW>
1776    {
1777        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcV18P1Reg_SPEC,crate::common::RW>::from_register(self,0)
1778    }
1779}
1780impl ::core::default::Default for DcdcV18P1Reg {
1781    #[inline(always)]
1782    fn default() -> DcdcV18P1Reg {
1783        <crate::RegValueT<DcdcV18P1Reg_SPEC> as RegisterValue<_>>::new(48272)
1784    }
1785}
1786
1787#[doc(hidden)]
1788#[derive(Copy, Clone, Eq, PartialEq)]
1789pub struct DcdcV180Reg_SPEC;
1790impl crate::sealed::RegSpec for DcdcV180Reg_SPEC {
1791    type DataType = u16;
1792}
1793
1794#[doc = "DCDC V18 First Control Register"]
1795pub type DcdcV180Reg = crate::RegValueT<DcdcV180Reg_SPEC>;
1796
1797impl DcdcV180Reg {
1798    #[doc = "V18 output fast current ramping (improves response time at the cost of more ripple)"]
1799    #[inline(always)]
1800    pub fn dcdc_v18_fast_ramping(
1801        self,
1802    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcV180Reg_SPEC, crate::common::RW> {
1803        crate::common::RegisterFieldBool::<15,1,0,DcdcV180Reg_SPEC,crate::common::RW>::from_register(self,0)
1804    }
1805
1806    #[doc = "V18 output voltage\nV = 1.2 V + 25 mV * N"]
1807    #[inline(always)]
1808    pub fn dcdc_v18_voltage(
1809        self,
1810    ) -> crate::common::RegisterField<10, 0x1f, 1, 0, u8, u8, DcdcV180Reg_SPEC, crate::common::RW>
1811    {
1812        crate::common::RegisterField::<10,0x1f,1,0,u8,u8,DcdcV180Reg_SPEC,crate::common::RW>::from_register(self,0)
1813    }
1814
1815    #[doc = "V18 output maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1816    #[inline(always)]
1817    pub fn dcdc_v18_cur_lim_max_hv(
1818        self,
1819    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcV180Reg_SPEC, crate::common::RW>
1820    {
1821        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcV180Reg_SPEC,crate::common::RW>::from_register(self,0)
1822    }
1823
1824    #[doc = "V18 output minimum current limit\nI = 30 mA * (1 + N)"]
1825    #[inline(always)]
1826    pub fn dcdc_v18_cur_lim_min(
1827        self,
1828    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcV180Reg_SPEC, crate::common::RW>
1829    {
1830        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcV180Reg_SPEC,crate::common::RW>::from_register(self,0)
1831    }
1832}
1833impl ::core::default::Default for DcdcV180Reg {
1834    #[inline(always)]
1835    fn default() -> DcdcV180Reg {
1836        <crate::RegValueT<DcdcV180Reg_SPEC> as RegisterValue<_>>::new(58340)
1837    }
1838}
1839
1840#[doc(hidden)]
1841#[derive(Copy, Clone, Eq, PartialEq)]
1842pub struct DcdcV181Reg_SPEC;
1843impl crate::sealed::RegSpec for DcdcV181Reg_SPEC {
1844    type DataType = u16;
1845}
1846
1847#[doc = "DCDC V18 Second Control Register"]
1848pub type DcdcV181Reg = crate::RegValueT<DcdcV181Reg_SPEC>;
1849
1850impl DcdcV181Reg {
1851    #[doc = "V18 output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1852    #[inline(always)]
1853    pub fn dcdc_v18_enable_hv(
1854        self,
1855    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcV181Reg_SPEC, crate::common::RW> {
1856        crate::common::RegisterFieldBool::<15,1,0,DcdcV181Reg_SPEC,crate::common::RW>::from_register(self,0)
1857    }
1858
1859    #[doc = "V18 output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1860    #[inline(always)]
1861    pub fn dcdc_v18_enable_lv(
1862        self,
1863    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcV181Reg_SPEC, crate::common::RW> {
1864        crate::common::RegisterFieldBool::<14,1,0,DcdcV181Reg_SPEC,crate::common::RW>::from_register(self,0)
1865    }
1866
1867    #[doc = "V18 output maximum current limit low battery voltage mode)\nI = 30 mA * (1 + N)"]
1868    #[inline(always)]
1869    pub fn dcdc_v18_cur_lim_max_lv(
1870        self,
1871    ) -> crate::common::RegisterField<10, 0xf, 1, 0, u8, u8, DcdcV181Reg_SPEC, crate::common::RW>
1872    {
1873        crate::common::RegisterField::<10,0xf,1,0,u8,u8,DcdcV181Reg_SPEC,crate::common::RW>::from_register(self,0)
1874    }
1875
1876    #[doc = "V18 output idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1877    #[inline(always)]
1878    pub fn dcdc_v18_idle_hyst(
1879        self,
1880    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcV181Reg_SPEC, crate::common::RW>
1881    {
1882        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcV181Reg_SPEC,crate::common::RW>::from_register(self,0)
1883    }
1884
1885    #[doc = "V18 output minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1886    #[inline(always)]
1887    pub fn dcdc_v18_idle_min(
1888        self,
1889    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcV181Reg_SPEC, crate::common::RW>
1890    {
1891        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcV181Reg_SPEC,crate::common::RW>::from_register(self,0)
1892    }
1893}
1894impl ::core::default::Default for DcdcV181Reg {
1895    #[inline(always)]
1896    fn default() -> DcdcV181Reg {
1897        <crate::RegValueT<DcdcV181Reg_SPEC> as RegisterValue<_>>::new(48272)
1898    }
1899}
1900
1901#[doc(hidden)]
1902#[derive(Copy, Clone, Eq, PartialEq)]
1903pub struct DcdcVdd0Reg_SPEC;
1904impl crate::sealed::RegSpec for DcdcVdd0Reg_SPEC {
1905    type DataType = u16;
1906}
1907
1908#[doc = "DCDC VDD First Control Register"]
1909pub type DcdcVdd0Reg = crate::RegValueT<DcdcVdd0Reg_SPEC>;
1910
1911impl DcdcVdd0Reg {
1912    #[doc = "VDD output fast current ramping (improves response time at the cost of more ripple)"]
1913    #[inline(always)]
1914    pub fn dcdc_vdd_fast_ramping(
1915        self,
1916    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcVdd0Reg_SPEC, crate::common::RW> {
1917        crate::common::RegisterFieldBool::<15,1,0,DcdcVdd0Reg_SPEC,crate::common::RW>::from_register(self,0)
1918    }
1919
1920    #[doc = "VDD output voltage\nV = 0.8 V + 25 mV * N"]
1921    #[inline(always)]
1922    pub fn dcdc_vdd_voltage(
1923        self,
1924    ) -> crate::common::RegisterField<10, 0x1f, 1, 0, u8, u8, DcdcVdd0Reg_SPEC, crate::common::RW>
1925    {
1926        crate::common::RegisterField::<10,0x1f,1,0,u8,u8,DcdcVdd0Reg_SPEC,crate::common::RW>::from_register(self,0)
1927    }
1928
1929    #[doc = "VDD output maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1930    #[inline(always)]
1931    pub fn dcdc_vdd_cur_lim_max_hv(
1932        self,
1933    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcVdd0Reg_SPEC, crate::common::RW>
1934    {
1935        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcVdd0Reg_SPEC,crate::common::RW>::from_register(self,0)
1936    }
1937
1938    #[doc = "VDD output minimum current limit\nI = 30 mA * (1 + N)"]
1939    #[inline(always)]
1940    pub fn dcdc_vdd_cur_lim_min(
1941        self,
1942    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcVdd0Reg_SPEC, crate::common::RW>
1943    {
1944        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcVdd0Reg_SPEC,crate::common::RW>::from_register(self,0)
1945    }
1946}
1947impl ::core::default::Default for DcdcVdd0Reg {
1948    #[inline(always)]
1949    fn default() -> DcdcVdd0Reg {
1950        <crate::RegValueT<DcdcVdd0Reg_SPEC> as RegisterValue<_>>::new(49924)
1951    }
1952}
1953
1954#[doc(hidden)]
1955#[derive(Copy, Clone, Eq, PartialEq)]
1956pub struct DcdcVdd1Reg_SPEC;
1957impl crate::sealed::RegSpec for DcdcVdd1Reg_SPEC {
1958    type DataType = u16;
1959}
1960
1961#[doc = "DCDC VDD Second Control Register"]
1962pub type DcdcVdd1Reg = crate::RegValueT<DcdcVdd1Reg_SPEC>;
1963
1964impl DcdcVdd1Reg {
1965    #[doc = "VDD output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1966    #[inline(always)]
1967    pub fn dcdc_vdd_enable_hv(
1968        self,
1969    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcVdd1Reg_SPEC, crate::common::RW> {
1970        crate::common::RegisterFieldBool::<15,1,0,DcdcVdd1Reg_SPEC,crate::common::RW>::from_register(self,0)
1971    }
1972
1973    #[doc = "VDD output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1974    #[inline(always)]
1975    pub fn dcdc_vdd_enable_lv(
1976        self,
1977    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcVdd1Reg_SPEC, crate::common::RW> {
1978        crate::common::RegisterFieldBool::<14,1,0,DcdcVdd1Reg_SPEC,crate::common::RW>::from_register(self,0)
1979    }
1980
1981    #[doc = "VDD output maximum current limit low battery voltage mode)\nI = 30 mA * (1 + N)"]
1982    #[inline(always)]
1983    pub fn dcdc_vdd_cur_lim_max_lv(
1984        self,
1985    ) -> crate::common::RegisterField<10, 0xf, 1, 0, u8, u8, DcdcVdd1Reg_SPEC, crate::common::RW>
1986    {
1987        crate::common::RegisterField::<10,0xf,1,0,u8,u8,DcdcVdd1Reg_SPEC,crate::common::RW>::from_register(self,0)
1988    }
1989
1990    #[doc = "VDD output idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1991    #[inline(always)]
1992    pub fn dcdc_vdd_idle_hyst(
1993        self,
1994    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcVdd1Reg_SPEC, crate::common::RW>
1995    {
1996        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcVdd1Reg_SPEC,crate::common::RW>::from_register(self,0)
1997    }
1998
1999    #[doc = "VDD output minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
2000    #[inline(always)]
2001    pub fn dcdc_vdd_idle_min(
2002        self,
2003    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcVdd1Reg_SPEC, crate::common::RW>
2004    {
2005        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcVdd1Reg_SPEC,crate::common::RW>::from_register(self,0)
2006    }
2007}
2008impl ::core::default::Default for DcdcVdd1Reg {
2009    #[inline(always)]
2010    fn default() -> DcdcVdd1Reg {
2011        <crate::RegValueT<DcdcVdd1Reg_SPEC> as RegisterValue<_>>::new(60560)
2012    }
2013}
da14682_pac/dcdc.rs

da14682_pac/
dcdc.rs
