1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"COEX registers"]
28unsafe impl ::core::marker::Send for super::Coex {}
29unsafe impl ::core::marker::Sync for super::Coex {}
30impl super::Coex {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "COEX BLE PTI Control Register"]
38 #[inline(always)]
39 pub const fn coex_ble_pti_reg(
40 &self,
41 ) -> &'static crate::common::Reg<self::CoexBlePtiReg_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::CoexBlePtiReg_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(10usize),
45 )
46 }
47 }
48
49 #[doc = "COEX Control Register"]
50 #[inline(always)]
51 pub const fn coex_ctrl_reg(
52 &self,
53 ) -> &'static crate::common::Reg<self::CoexCtrlReg_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::CoexCtrlReg_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(0usize),
57 )
58 }
59 }
60
61 #[doc = "COEX FTDF PTI Control Register"]
62 #[inline(always)]
63 pub const fn coex_ftdf_pti_reg(
64 &self,
65 ) -> &'static crate::common::Reg<self::CoexFtdfPtiReg_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::CoexFtdfPtiReg_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(12usize),
69 )
70 }
71 }
72
73 #[doc = "COEX Interrupt Mask Register"]
74 #[inline(always)]
75 pub const fn coex_int_mask_reg(
76 &self,
77 ) -> &'static crate::common::Reg<self::CoexIntMaskReg_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::CoexIntMaskReg_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(6usize),
81 )
82 }
83 }
84
85 #[doc = "COEX Interrupt Status Register"]
86 #[inline(always)]
87 pub const fn coex_int_stat_reg(
88 &self,
89 ) -> &'static crate::common::Reg<self::CoexIntStatReg_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::CoexIntStatReg_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(8usize),
93 )
94 }
95 }
96
97 #[doc = "COEX Priority Register"]
98 #[inline(always)]
99 pub const fn coex_pri10_reg(
100 &self,
101 ) -> &'static crate::common::Reg<self::CoexPri10Reg_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::CoexPri10Reg_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(36usize),
105 )
106 }
107 }
108
109 #[doc = "COEX Priority Register"]
110 #[inline(always)]
111 pub const fn coex_pri11_reg(
112 &self,
113 ) -> &'static crate::common::Reg<self::CoexPri11Reg_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::CoexPri11Reg_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(38usize),
117 )
118 }
119 }
120
121 #[doc = "COEX Priority Register"]
122 #[inline(always)]
123 pub const fn coex_pri12_reg(
124 &self,
125 ) -> &'static crate::common::Reg<self::CoexPri12Reg_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::CoexPri12Reg_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(40usize),
129 )
130 }
131 }
132
133 #[doc = "COEX Priority Register"]
134 #[inline(always)]
135 pub const fn coex_pri13_reg(
136 &self,
137 ) -> &'static crate::common::Reg<self::CoexPri13Reg_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::CoexPri13Reg_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(42usize),
141 )
142 }
143 }
144
145 #[doc = "COEX Priority Register"]
146 #[inline(always)]
147 pub const fn coex_pri14_reg(
148 &self,
149 ) -> &'static crate::common::Reg<self::CoexPri14Reg_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::CoexPri14Reg_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(44usize),
153 )
154 }
155 }
156
157 #[doc = "COEX Priority Register"]
158 #[inline(always)]
159 pub const fn coex_pri15_reg(
160 &self,
161 ) -> &'static crate::common::Reg<self::CoexPri15Reg_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::CoexPri15Reg_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(46usize),
165 )
166 }
167 }
168
169 #[doc = "COEX Priority Register"]
170 #[inline(always)]
171 pub const fn coex_pri1_reg(
172 &self,
173 ) -> &'static crate::common::Reg<self::CoexPri1Reg_SPEC, crate::common::RW> {
174 unsafe {
175 crate::common::Reg::<self::CoexPri1Reg_SPEC, crate::common::RW>::from_ptr(
176 self._svd2pac_as_ptr().add(18usize),
177 )
178 }
179 }
180
181 #[doc = "COEX Priority Register"]
182 #[inline(always)]
183 pub const fn coex_pri2_reg(
184 &self,
185 ) -> &'static crate::common::Reg<self::CoexPri2Reg_SPEC, crate::common::RW> {
186 unsafe {
187 crate::common::Reg::<self::CoexPri2Reg_SPEC, crate::common::RW>::from_ptr(
188 self._svd2pac_as_ptr().add(20usize),
189 )
190 }
191 }
192
193 #[doc = "COEX Priority Register"]
194 #[inline(always)]
195 pub const fn coex_pri3_reg(
196 &self,
197 ) -> &'static crate::common::Reg<self::CoexPri3Reg_SPEC, crate::common::RW> {
198 unsafe {
199 crate::common::Reg::<self::CoexPri3Reg_SPEC, crate::common::RW>::from_ptr(
200 self._svd2pac_as_ptr().add(22usize),
201 )
202 }
203 }
204
205 #[doc = "COEX Priority Register"]
206 #[inline(always)]
207 pub const fn coex_pri4_reg(
208 &self,
209 ) -> &'static crate::common::Reg<self::CoexPri4Reg_SPEC, crate::common::RW> {
210 unsafe {
211 crate::common::Reg::<self::CoexPri4Reg_SPEC, crate::common::RW>::from_ptr(
212 self._svd2pac_as_ptr().add(24usize),
213 )
214 }
215 }
216
217 #[doc = "COEX Priority Register"]
218 #[inline(always)]
219 pub const fn coex_pri5_reg(
220 &self,
221 ) -> &'static crate::common::Reg<self::CoexPri5Reg_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::CoexPri5Reg_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(26usize),
225 )
226 }
227 }
228
229 #[doc = "COEX Priority Register"]
230 #[inline(always)]
231 pub const fn coex_pri6_reg(
232 &self,
233 ) -> &'static crate::common::Reg<self::CoexPri6Reg_SPEC, crate::common::RW> {
234 unsafe {
235 crate::common::Reg::<self::CoexPri6Reg_SPEC, crate::common::RW>::from_ptr(
236 self._svd2pac_as_ptr().add(28usize),
237 )
238 }
239 }
240
241 #[doc = "COEX Priority Register"]
242 #[inline(always)]
243 pub const fn coex_pri7_reg(
244 &self,
245 ) -> &'static crate::common::Reg<self::CoexPri7Reg_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::CoexPri7Reg_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(30usize),
249 )
250 }
251 }
252
253 #[doc = "COEX Priority Register"]
254 #[inline(always)]
255 pub const fn coex_pri8_reg(
256 &self,
257 ) -> &'static crate::common::Reg<self::CoexPri8Reg_SPEC, crate::common::RW> {
258 unsafe {
259 crate::common::Reg::<self::CoexPri8Reg_SPEC, crate::common::RW>::from_ptr(
260 self._svd2pac_as_ptr().add(32usize),
261 )
262 }
263 }
264
265 #[doc = "COEX Priority Register"]
266 #[inline(always)]
267 pub const fn coex_pri9_reg(
268 &self,
269 ) -> &'static crate::common::Reg<self::CoexPri9Reg_SPEC, crate::common::RW> {
270 unsafe {
271 crate::common::Reg::<self::CoexPri9Reg_SPEC, crate::common::RW>::from_ptr(
272 self._svd2pac_as_ptr().add(34usize),
273 )
274 }
275 }
276
277 #[doc = "COEX Status 2 Register"]
278 #[inline(always)]
279 pub const fn coex_stat2_reg(
280 &self,
281 ) -> &'static crate::common::Reg<self::CoexStat2Reg_SPEC, crate::common::RW> {
282 unsafe {
283 crate::common::Reg::<self::CoexStat2Reg_SPEC, crate::common::RW>::from_ptr(
284 self._svd2pac_as_ptr().add(4usize),
285 )
286 }
287 }
288
289 #[doc = "COEX Status Register"]
290 #[inline(always)]
291 pub const fn coex_stat_reg(
292 &self,
293 ) -> &'static crate::common::Reg<self::CoexStatReg_SPEC, crate::common::RW> {
294 unsafe {
295 crate::common::Reg::<self::CoexStatReg_SPEC, crate::common::RW>::from_ptr(
296 self._svd2pac_as_ptr().add(2usize),
297 )
298 }
299 }
300}
301#[doc(hidden)]
302#[derive(Copy, Clone, Eq, PartialEq)]
303pub struct CoexBlePtiReg_SPEC;
304impl crate::sealed::RegSpec for CoexBlePtiReg_SPEC {
305 type DataType = u16;
306}
307
308#[doc = "COEX BLE PTI Control Register"]
309pub type CoexBlePtiReg = crate::RegValueT<CoexBlePtiReg_SPEC>;
310
311impl CoexBlePtiReg {
312 #[doc = "This value specifies the PTI value that characterizes the next BLE transaction that will be initiated on the following \"ble_active\" positive edge. The value should remain constant during the high period of the \"ble_active\" signal."]
313 #[inline(always)]
314 pub fn coex_ble_pti(
315 self,
316 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexBlePtiReg_SPEC, crate::common::RW>
317 {
318 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexBlePtiReg_SPEC,crate::common::RW>::from_register(self,0)
319 }
320}
321impl ::core::default::Default for CoexBlePtiReg {
322 #[inline(always)]
323 fn default() -> CoexBlePtiReg {
324 <crate::RegValueT<CoexBlePtiReg_SPEC> as RegisterValue<_>>::new(0)
325 }
326}
327
328#[doc(hidden)]
329#[derive(Copy, Clone, Eq, PartialEq)]
330pub struct CoexCtrlReg_SPEC;
331impl crate::sealed::RegSpec for CoexCtrlReg_SPEC {
332 type DataType = u16;
333}
334
335#[doc = "COEX Control Register"]
336pub type CoexCtrlReg = crate::RegValueT<CoexCtrlReg_SPEC>;
337
338impl CoexCtrlReg {
339 #[doc = "If set to \"1\" then all BLE requests are ignored by masking the internal \"ble_active\" signal. Refer also to IGNORE_BLE_STAT."]
340 #[inline(always)]
341 pub fn ignore_ble(
342 self,
343 ) -> crate::common::RegisterFieldBool<15, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
344 crate::common::RegisterFieldBool::<15,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
345 }
346
347 #[doc = "If set to \"1\" then all FTDF requests are ignored by masking the internal \"ftdf_active\" signal. Refer also to IGNORE_FTDF_STAT."]
348 #[inline(always)]
349 pub fn ignore_ftdf(
350 self,
351 ) -> crate::common::RegisterFieldBool<14, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
352 crate::common::RegisterFieldBool::<14,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
353 }
354
355 #[doc = "If set to \"1\" then all EXT requests are ignored by masking the internal \"ext_act\" signal (\"ext_act\" is the logical OR of \"ext_act0\" and \"ext_act1\"). Refer also to IGNORE_EXT_STAT."]
356 #[inline(always)]
357 pub fn ignore_ext(
358 self,
359 ) -> crate::common::RegisterFieldBool<13, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
360 crate::common::RegisterFieldBool::<13,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
361 }
362
363 #[doc = "Select the logic driving the BLE core input \"ble.radio_busy\":\n0: (decision==BLE) AND rfcu.radio_busy.\n1: Hold to \"0\".\n2: (decision==FTDF) OR (decision==EXT) OR rfcu.radio_busy.\n3: (decision==FTDF) OR (decision==EXT).\nSelection \"0\" is the default, while selection \"2\" is the recommended value if the BLE SW supports it."]
364 #[inline(always)]
365 pub fn sel_ble_radio_busy(
366 self,
367 ) -> crate::common::RegisterField<11, 0x3, 1, 0, u8, u8, CoexCtrlReg_SPEC, crate::common::RW>
368 {
369 crate::common::RegisterField::<11,0x3,1,0,u8,u8,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
370 }
371
372 #[doc = "If set to \"1\" then the COEX block will drive the WLAN_TX and WLAN_RX inputs of the BLE core. Otherwise both BLE inputs will be forced to \"0\"."]
373 #[inline(always)]
374 pub fn sel_ble_wlan_tx_rx(
375 self,
376 ) -> crate::common::RegisterFieldBool<10, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
377 crate::common::RegisterFieldBool::<10,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
378 }
379
380 #[doc = "It controls the source of the BLE PTI value that the COEX Arbiter will use.\nIf \"0\" then use the COEX_BLE_PTI_REG.\nIf \"1\" then use the PTI value provided by the BLE core."]
381 #[inline(always)]
382 pub fn sel_ble_pti(
383 self,
384 ) -> crate::common::RegisterFieldBool<9, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
385 crate::common::RegisterFieldBool::<9,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
386 }
387
388 #[doc = "It controls the source of the FTDF PTI value that the COEX Arbiter will use.\nIf \"0\" then use the COEX_FTDF_PTI_REG.\nIf \"1\" then use the PTI value provided by the FTDF core."]
389 #[inline(always)]
390 pub fn sel_ftdf_pti(
391 self,
392 ) -> crate::common::RegisterFieldBool<8, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
393 crate::common::RegisterFieldBool::<8,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
394 }
395
396 #[doc = "If set to \"1\" and the COEX decision is different than \"FTDF\", then the CCA_STAT signal going to FTDF (generated from the radio) will be forced to \"1\"; otherwise the FTDF.CCA_STAT will be driven with the signal generated from the radio.\nRecommended value for SEL_FTDF_CCA is \"1\"."]
397 #[inline(always)]
398 pub fn sel_ftdf_cca(
399 self,
400 ) -> crate::common::RegisterFieldBool<7, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
401 crate::common::RegisterFieldBool::<7,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
402 }
403
404 #[doc = "The COEX block can provide internal diagnostic signals by overwriting the BLE diagnostic bus, which is forwarded to GPIO multiplexing. There is no need to program the BLE registers, but only this field and the GPIO PID fields.\n0: No COEX diagnostics, only BLE.\n1: BLE_DIAG\\[4:3\\]=decision\\[1:0\\]; BLE_DIAG\\[5\\]=closing.\n2: BLE_DIAG\\[4:3\\]=decision\\[1:0\\]; BLE_DIAG\\[5\\]=closing; BLE_DIAG\\[6\\]=OR( ftdf/ble2coex_tx/rx_en )\n3: BLE_DIAG\\[2\\]=closing OR radio_busy; BLE_DIAG\\[6:3\\]=decision_ptr\\[3:0\\]; BLE_DIAG\\[7\\]=0."]
405 #[inline(always)]
406 pub fn sel_coex_diag(
407 self,
408 ) -> crate::common::RegisterField<5, 0x3, 1, 0, u8, u8, CoexCtrlReg_SPEC, crate::common::RW>
409 {
410 crate::common::RegisterField::<5,0x3,1,0,u8,u8,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
411 }
412
413 #[doc = "Controls the behavior of the SMART_ACT (and SMART_PRI as a consequence).\nIf SMART_ACT_IMPL=\"0\" then if any BLE or FTDF MAC request is active then SMART_ACT will be asserted. SMART_ACT will actually be the logical OR of \"ble_active\" and \"ftdf_active\" internal signals. SMART_ACT will be asserted regardless the decision of the Arbiter to allow or disallow the access to the on-chip radio from the active MAC(s).\nif SMART_ACT_IMPL=\"1\" then if the Arbiter\'s decision is to allow EXTernal MAC, then keep SMART_ACT to \"0\", otherwise follow the implementation of SMART_ACT_IMPL=\"0\"."]
414 #[inline(always)]
415 pub fn smart_act_impl(
416 self,
417 ) -> crate::common::RegisterFieldBool<4, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
418 crate::common::RegisterFieldBool::<4,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
419 }
420
421 #[doc = "It controls the behavior of the Monitoring bitfields COEX_INT_STAT_REG\\[ *TXRX_MON* \\]\nIf \"0\" then update the Monitoring bitfields with BLE Rx/Tx that has been masked.\nIf \"1\" then update for every BLE Rx/Tx, either masked or not."]
422 #[inline(always)]
423 pub fn txrx_mon_ble_all(
424 self,
425 ) -> crate::common::RegisterFieldBool<3, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
426 crate::common::RegisterFieldBool::<3,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
427 }
428
429 #[doc = "It controls the behavior of the Monitoring bitfields COEX_INT_STAT_REG\\[ *TXRX_MON* \\]\nIf \"0\" then update the Monitoring bitfields with FTDF Rx/Tx that has been masked.\nIf \"1\" then update for every FTDF Rx/Tx, either masked or not."]
430 #[inline(always)]
431 pub fn txrx_mon_ftdf_all(
432 self,
433 ) -> crate::common::RegisterFieldBool<2, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
434 crate::common::RegisterFieldBool::<2,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
435 }
436
437 #[doc = "Refer to COEX_INT_STAT_REG\\[ IRQ_DECISION_SW \\] bitfield description."]
438 #[inline(always)]
439 pub fn decision_sw_all(
440 self,
441 ) -> crate::common::RegisterFieldBool<1, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
442 crate::common::RegisterFieldBool::<1,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
443 }
444
445 #[doc = "If set to \"1\" then the current transaction (Tx or Rx) will complete normally and after that no further decision will be taken by the arbiter. Will be set to \"1\" automatically by the HW as soon as a write operation will be detected to the COEX_PRIx_REG registers. As soon as the update on the priorities will be completed, the SW should clear this bit. The SW can set or clear this bit.\nNote: Depending on the relationship between the PCLK and COEX_CLK periods a write operation to this bitfield may be effective in more than one PCLK clock cycles."]
446 #[inline(always)]
447 pub fn prging_arbiter(
448 self,
449 ) -> crate::common::RegisterFieldBool<0, 1, 0, CoexCtrlReg_SPEC, crate::common::RW> {
450 crate::common::RegisterFieldBool::<0,1,0,CoexCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
451 }
452}
453impl ::core::default::Default for CoexCtrlReg {
454 #[inline(always)]
455 fn default() -> CoexCtrlReg {
456 <crate::RegValueT<CoexCtrlReg_SPEC> as RegisterValue<_>>::new(0)
457 }
458}
459
460#[doc(hidden)]
461#[derive(Copy, Clone, Eq, PartialEq)]
462pub struct CoexFtdfPtiReg_SPEC;
463impl crate::sealed::RegSpec for CoexFtdfPtiReg_SPEC {
464 type DataType = u16;
465}
466
467#[doc = "COEX FTDF PTI Control Register"]
468pub type CoexFtdfPtiReg = crate::RegValueT<CoexFtdfPtiReg_SPEC>;
469
470impl CoexFtdfPtiReg {
471 #[doc = "This value specifies the PTI value that characterizes the next FTDF transaction that will be initiated on the following \"ftdf_active\" positive edge. The value should remain constant during the high period of the \"ftdf_active\" signal. Refer also to bitfield COEX_CTRL_REG.SEL_FTDF_PTI."]
472 #[inline(always)]
473 pub fn coex_ftdf_pti(
474 self,
475 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexFtdfPtiReg_SPEC, crate::common::RW>
476 {
477 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexFtdfPtiReg_SPEC,crate::common::RW>::from_register(self,0)
478 }
479}
480impl ::core::default::Default for CoexFtdfPtiReg {
481 #[inline(always)]
482 fn default() -> CoexFtdfPtiReg {
483 <crate::RegValueT<CoexFtdfPtiReg_SPEC> as RegisterValue<_>>::new(0)
484 }
485}
486
487#[doc(hidden)]
488#[derive(Copy, Clone, Eq, PartialEq)]
489pub struct CoexIntMaskReg_SPEC;
490impl crate::sealed::RegSpec for CoexIntMaskReg_SPEC {
491 type DataType = u16;
492}
493
494#[doc = "COEX Interrupt Mask Register"]
495pub type CoexIntMaskReg = crate::RegValueT<CoexIntMaskReg_SPEC>;
496
497impl CoexIntMaskReg {
498 #[doc = "If \"1\" then a \"1\" on COEX_INT_STAT_REG\\[IRQ_DECISION_SW\\] will generate an IRQ to CPU."]
499 #[inline(always)]
500 pub fn irq_decision_sw(
501 self,
502 ) -> crate::common::RegisterFieldBool<9, 1, 0, CoexIntMaskReg_SPEC, crate::common::RW> {
503 crate::common::RegisterFieldBool::<9,1,0,CoexIntMaskReg_SPEC,crate::common::RW>::from_register(self,0)
504 }
505
506 #[doc = "If \"1\" then a \"1\" on COEX_INT_STAT_REG\\[IRQ_TXRX_MON\\] will generate an IRQ to CPU."]
507 #[inline(always)]
508 pub fn irq_txrx_mon(
509 self,
510 ) -> crate::common::RegisterFieldBool<8, 1, 0, CoexIntMaskReg_SPEC, crate::common::RW> {
511 crate::common::RegisterFieldBool::<8,1,0,CoexIntMaskReg_SPEC,crate::common::RW>::from_register(self,0)
512 }
513}
514impl ::core::default::Default for CoexIntMaskReg {
515 #[inline(always)]
516 fn default() -> CoexIntMaskReg {
517 <crate::RegValueT<CoexIntMaskReg_SPEC> as RegisterValue<_>>::new(0)
518 }
519}
520
521#[doc(hidden)]
522#[derive(Copy, Clone, Eq, PartialEq)]
523pub struct CoexIntStatReg_SPEC;
524impl crate::sealed::RegSpec for CoexIntStatReg_SPEC {
525 type DataType = u16;
526}
527
528#[doc = "COEX Interrupt Status Register"]
529pub type CoexIntStatReg = crate::RegValueT<CoexIntStatReg_SPEC>;
530
531impl CoexIntStatReg {
532 #[doc = "IRQ event when the DECISION switches to another value.\nIf DECISION_SW_ALL=1, then it reports any change of DECISION value.\nIf DECISION_SW_ALL=0, then it reports only the switches to another MAC, ignoring also the intermediate transitions to DECISION==NONE.\nFor example the sequence FTDF-NONE-FTDF-NONE-BLE-NONE-BLE will report only the first switch from NONE to BLE.\nNote that after a Radio Power domain reset, the first transition of the DECISION to any non-NONE value will also trigger this event."]
533 #[inline(always)]
534 pub fn irq_decision_sw(
535 self,
536 ) -> crate::common::RegisterFieldBool<9, 1, 0, CoexIntStatReg_SPEC, crate::common::R> {
537 crate::common::RegisterFieldBool::<9,1,0,CoexIntStatReg_SPEC,crate::common::R>::from_register(self,0)
538 }
539
540 #[doc = "Tx/Rx Monitor event pending. When this bitfield is set, then there is a valid entry at the bitfields TXRX_MON_PTR, TXRX_MON_TX, TXRX_MON_PASSED and TXRX_MON_OVWR."]
541 #[inline(always)]
542 pub fn irq_txrx_mon(
543 self,
544 ) -> crate::common::RegisterFieldBool<8, 1, 0, CoexIntStatReg_SPEC, crate::common::R> {
545 crate::common::RegisterFieldBool::<8,1,0,CoexIntStatReg_SPEC,crate::common::R>::from_register(self,0)
546 }
547
548 #[doc = "Tx/Rx Monitor entry Overwritten.\nif \"1\" then TXRX_MON_PTR loaded a new value without being cleared first by the software. Provides an indication that the software does not fetch the TXRX_MON_PTR fast enough."]
549 #[inline(always)]
550 pub fn txrx_mon_ovwr(
551 self,
552 ) -> crate::common::RegisterFieldBool<7, 1, 0, CoexIntStatReg_SPEC, crate::common::R> {
553 crate::common::RegisterFieldBool::<7,1,0,CoexIntStatReg_SPEC,crate::common::R>::from_register(self,0)
554 }
555
556 #[doc = "This bit indicates if the corresponding TXRX_MON_PTR pointer indicates a Tx/Rx that has been masked or not by the COEX block.\nIf \"0\" then the Tx/Rx has been masked.\nIf \"1\" then the Tx/Rx has not been masked.\nThe bitfield is valid only when TXRX_MON_PTR is not zero."]
557 #[inline(always)]
558 pub fn txrx_mon_passed(
559 self,
560 ) -> crate::common::RegisterFieldBool<6, 1, 0, CoexIntStatReg_SPEC, crate::common::R> {
561 crate::common::RegisterFieldBool::<6,1,0,CoexIntStatReg_SPEC,crate::common::R>::from_register(self,0)
562 }
563
564 #[doc = "If \"0\" then the corresponding TXRX_MON_PTR corresponds to an Rx.\nIf \"1\" then the corresponding TXRX_MON_PTR corresponds to an Tx.\nThe bitfield is valid only when TXRX_MON_PTR is not zero."]
565 #[inline(always)]
566 pub fn txrx_mon_tx(
567 self,
568 ) -> crate::common::RegisterFieldBool<5, 1, 0, CoexIntStatReg_SPEC, crate::common::R> {
569 crate::common::RegisterFieldBool::<5,1,0,CoexIntStatReg_SPEC,crate::common::R>::from_register(self,0)
570 }
571
572 #[doc = "Tx/Rx Monitor Pointer.\nIf not zero then it provides a pointer to the Priority registers indicating the completion of an Tx or Rx (deassertion of TX_EN or RX_EN) that corresponds to this Priority register. Refer also to the COEX_CTRL_REG\\[ TXRX_MON_ALL \\] control bit.\nIf the PTI that corresponds to the deasserted TX_EN/RX_EN is not in the Priority Register list, then this event will be ignored and will not be reported by the TXRX Monitoring bitfields.\nReading the register will clear the bitfield."]
573 #[inline(always)]
574 pub fn txrx_mon_ptr(
575 self,
576 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, CoexIntStatReg_SPEC, crate::common::R>
577 {
578 crate::common::RegisterField::<0,0xf,1,0,u8,u8,CoexIntStatReg_SPEC,crate::common::R>::from_register(self,0)
579 }
580}
581impl ::core::default::Default for CoexIntStatReg {
582 #[inline(always)]
583 fn default() -> CoexIntStatReg {
584 <crate::RegValueT<CoexIntStatReg_SPEC> as RegisterValue<_>>::new(0)
585 }
586}
587
588#[doc(hidden)]
589#[derive(Copy, Clone, Eq, PartialEq)]
590pub struct CoexPri10Reg_SPEC;
591impl crate::sealed::RegSpec for CoexPri10Reg_SPEC {
592 type DataType = u16;
593}
594
595#[doc = "COEX Priority Register"]
596pub type CoexPri10Reg = crate::RegValueT<CoexPri10Reg_SPEC>;
597
598impl CoexPri10Reg {
599 #[doc = "Refer to COEX_PRI1_REG."]
600 #[inline(always)]
601 pub fn coex_pri_mac(
602 self,
603 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri10Reg_SPEC, crate::common::RW>
604 {
605 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri10Reg_SPEC,crate::common::RW>::from_register(self,0)
606 }
607
608 #[doc = "Refer to COEX_PRI1_REG."]
609 #[inline(always)]
610 pub fn coex_pri_pti(
611 self,
612 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri10Reg_SPEC, crate::common::RW>
613 {
614 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri10Reg_SPEC,crate::common::RW>::from_register(self,0)
615 }
616}
617impl ::core::default::Default for CoexPri10Reg {
618 #[inline(always)]
619 fn default() -> CoexPri10Reg {
620 <crate::RegValueT<CoexPri10Reg_SPEC> as RegisterValue<_>>::new(0)
621 }
622}
623
624#[doc(hidden)]
625#[derive(Copy, Clone, Eq, PartialEq)]
626pub struct CoexPri11Reg_SPEC;
627impl crate::sealed::RegSpec for CoexPri11Reg_SPEC {
628 type DataType = u16;
629}
630
631#[doc = "COEX Priority Register"]
632pub type CoexPri11Reg = crate::RegValueT<CoexPri11Reg_SPEC>;
633
634impl CoexPri11Reg {
635 #[doc = "Refer to COEX_PRI1_REG."]
636 #[inline(always)]
637 pub fn coex_pri_mac(
638 self,
639 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri11Reg_SPEC, crate::common::RW>
640 {
641 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri11Reg_SPEC,crate::common::RW>::from_register(self,0)
642 }
643
644 #[doc = "Refer to COEX_PRI1_REG."]
645 #[inline(always)]
646 pub fn coex_pri_pti(
647 self,
648 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri11Reg_SPEC, crate::common::RW>
649 {
650 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri11Reg_SPEC,crate::common::RW>::from_register(self,0)
651 }
652}
653impl ::core::default::Default for CoexPri11Reg {
654 #[inline(always)]
655 fn default() -> CoexPri11Reg {
656 <crate::RegValueT<CoexPri11Reg_SPEC> as RegisterValue<_>>::new(0)
657 }
658}
659
660#[doc(hidden)]
661#[derive(Copy, Clone, Eq, PartialEq)]
662pub struct CoexPri12Reg_SPEC;
663impl crate::sealed::RegSpec for CoexPri12Reg_SPEC {
664 type DataType = u16;
665}
666
667#[doc = "COEX Priority Register"]
668pub type CoexPri12Reg = crate::RegValueT<CoexPri12Reg_SPEC>;
669
670impl CoexPri12Reg {
671 #[doc = "Refer to COEX_PRI1_REG."]
672 #[inline(always)]
673 pub fn coex_pri_mac(
674 self,
675 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri12Reg_SPEC, crate::common::RW>
676 {
677 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri12Reg_SPEC,crate::common::RW>::from_register(self,0)
678 }
679
680 #[doc = "Refer to COEX_PRI1_REG."]
681 #[inline(always)]
682 pub fn coex_pri_pti(
683 self,
684 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri12Reg_SPEC, crate::common::RW>
685 {
686 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri12Reg_SPEC,crate::common::RW>::from_register(self,0)
687 }
688}
689impl ::core::default::Default for CoexPri12Reg {
690 #[inline(always)]
691 fn default() -> CoexPri12Reg {
692 <crate::RegValueT<CoexPri12Reg_SPEC> as RegisterValue<_>>::new(0)
693 }
694}
695
696#[doc(hidden)]
697#[derive(Copy, Clone, Eq, PartialEq)]
698pub struct CoexPri13Reg_SPEC;
699impl crate::sealed::RegSpec for CoexPri13Reg_SPEC {
700 type DataType = u16;
701}
702
703#[doc = "COEX Priority Register"]
704pub type CoexPri13Reg = crate::RegValueT<CoexPri13Reg_SPEC>;
705
706impl CoexPri13Reg {
707 #[doc = "Refer to COEX_PRI1_REG."]
708 #[inline(always)]
709 pub fn coex_pri_mac(
710 self,
711 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri13Reg_SPEC, crate::common::RW>
712 {
713 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri13Reg_SPEC,crate::common::RW>::from_register(self,0)
714 }
715
716 #[doc = "Refer to COEX_PRI1_REG."]
717 #[inline(always)]
718 pub fn coex_pri_pti(
719 self,
720 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri13Reg_SPEC, crate::common::RW>
721 {
722 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri13Reg_SPEC,crate::common::RW>::from_register(self,0)
723 }
724}
725impl ::core::default::Default for CoexPri13Reg {
726 #[inline(always)]
727 fn default() -> CoexPri13Reg {
728 <crate::RegValueT<CoexPri13Reg_SPEC> as RegisterValue<_>>::new(0)
729 }
730}
731
732#[doc(hidden)]
733#[derive(Copy, Clone, Eq, PartialEq)]
734pub struct CoexPri14Reg_SPEC;
735impl crate::sealed::RegSpec for CoexPri14Reg_SPEC {
736 type DataType = u16;
737}
738
739#[doc = "COEX Priority Register"]
740pub type CoexPri14Reg = crate::RegValueT<CoexPri14Reg_SPEC>;
741
742impl CoexPri14Reg {
743 #[doc = "Refer to COEX_PRI1_REG."]
744 #[inline(always)]
745 pub fn coex_pri_mac(
746 self,
747 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri14Reg_SPEC, crate::common::RW>
748 {
749 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri14Reg_SPEC,crate::common::RW>::from_register(self,0)
750 }
751
752 #[doc = "Refer to COEX_PRI1_REG."]
753 #[inline(always)]
754 pub fn coex_pri_pti(
755 self,
756 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri14Reg_SPEC, crate::common::RW>
757 {
758 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri14Reg_SPEC,crate::common::RW>::from_register(self,0)
759 }
760}
761impl ::core::default::Default for CoexPri14Reg {
762 #[inline(always)]
763 fn default() -> CoexPri14Reg {
764 <crate::RegValueT<CoexPri14Reg_SPEC> as RegisterValue<_>>::new(0)
765 }
766}
767
768#[doc(hidden)]
769#[derive(Copy, Clone, Eq, PartialEq)]
770pub struct CoexPri15Reg_SPEC;
771impl crate::sealed::RegSpec for CoexPri15Reg_SPEC {
772 type DataType = u16;
773}
774
775#[doc = "COEX Priority Register"]
776pub type CoexPri15Reg = crate::RegValueT<CoexPri15Reg_SPEC>;
777
778impl CoexPri15Reg {
779 #[doc = "Refer to COEX_PRI1_REG."]
780 #[inline(always)]
781 pub fn coex_pri_mac(
782 self,
783 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri15Reg_SPEC, crate::common::RW>
784 {
785 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri15Reg_SPEC,crate::common::RW>::from_register(self,0)
786 }
787
788 #[doc = "Refer to COEX_PRI1_REG."]
789 #[inline(always)]
790 pub fn coex_pri_pti(
791 self,
792 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri15Reg_SPEC, crate::common::RW>
793 {
794 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri15Reg_SPEC,crate::common::RW>::from_register(self,0)
795 }
796}
797impl ::core::default::Default for CoexPri15Reg {
798 #[inline(always)]
799 fn default() -> CoexPri15Reg {
800 <crate::RegValueT<CoexPri15Reg_SPEC> as RegisterValue<_>>::new(0)
801 }
802}
803
804#[doc(hidden)]
805#[derive(Copy, Clone, Eq, PartialEq)]
806pub struct CoexPri1Reg_SPEC;
807impl crate::sealed::RegSpec for CoexPri1Reg_SPEC {
808 type DataType = u16;
809}
810
811#[doc = "COEX Priority Register"]
812pub type CoexPri1Reg = crate::RegValueT<CoexPri1Reg_SPEC>;
813
814impl CoexPri1Reg {
815 #[doc = "Specifies the MAC that has been assigned with the specific priority level. The MAC encoding follows the COEX_DECISION bitfield encoding."]
816 #[inline(always)]
817 pub fn coex_pri_mac(
818 self,
819 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri1Reg_SPEC, crate::common::RW>
820 {
821 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri1Reg_SPEC,crate::common::RW>::from_register(self,0)
822 }
823
824 #[doc = "The priority level specified by the name of this register will be applied to the packets coming from the MAC specified by the COEX_PRI_MAC bitfield and characterized with the PTI value specified by the COEX_PRI_PTI bitfield.\nThe effective PTI value of the packets coming from BLE and FTDF is controlled by the register bitfields SEL_BLE_PTI and SEL_FTDF_PTI, while for the External MAC (EXT) the PTI is considered always as \"0\"."]
825 #[inline(always)]
826 pub fn coex_pri_pti(
827 self,
828 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri1Reg_SPEC, crate::common::RW>
829 {
830 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri1Reg_SPEC,crate::common::RW>::from_register(self,0)
831 }
832}
833impl ::core::default::Default for CoexPri1Reg {
834 #[inline(always)]
835 fn default() -> CoexPri1Reg {
836 <crate::RegValueT<CoexPri1Reg_SPEC> as RegisterValue<_>>::new(24)
837 }
838}
839
840#[doc(hidden)]
841#[derive(Copy, Clone, Eq, PartialEq)]
842pub struct CoexPri2Reg_SPEC;
843impl crate::sealed::RegSpec for CoexPri2Reg_SPEC {
844 type DataType = u16;
845}
846
847#[doc = "COEX Priority Register"]
848pub type CoexPri2Reg = crate::RegValueT<CoexPri2Reg_SPEC>;
849
850impl CoexPri2Reg {
851 #[doc = "Refer to COEX_PRI1_REG."]
852 #[inline(always)]
853 pub fn coex_pri_mac(
854 self,
855 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri2Reg_SPEC, crate::common::RW>
856 {
857 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri2Reg_SPEC,crate::common::RW>::from_register(self,0)
858 }
859
860 #[doc = "Refer to COEX_PRI1_REG."]
861 #[inline(always)]
862 pub fn coex_pri_pti(
863 self,
864 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri2Reg_SPEC, crate::common::RW>
865 {
866 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri2Reg_SPEC,crate::common::RW>::from_register(self,0)
867 }
868}
869impl ::core::default::Default for CoexPri2Reg {
870 #[inline(always)]
871 fn default() -> CoexPri2Reg {
872 <crate::RegValueT<CoexPri2Reg_SPEC> as RegisterValue<_>>::new(8)
873 }
874}
875
876#[doc(hidden)]
877#[derive(Copy, Clone, Eq, PartialEq)]
878pub struct CoexPri3Reg_SPEC;
879impl crate::sealed::RegSpec for CoexPri3Reg_SPEC {
880 type DataType = u16;
881}
882
883#[doc = "COEX Priority Register"]
884pub type CoexPri3Reg = crate::RegValueT<CoexPri3Reg_SPEC>;
885
886impl CoexPri3Reg {
887 #[doc = "Refer to COEX_PRI1_REG."]
888 #[inline(always)]
889 pub fn coex_pri_mac(
890 self,
891 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri3Reg_SPEC, crate::common::RW>
892 {
893 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri3Reg_SPEC,crate::common::RW>::from_register(self,0)
894 }
895
896 #[doc = "Refer to COEX_PRI1_REG."]
897 #[inline(always)]
898 pub fn coex_pri_pti(
899 self,
900 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri3Reg_SPEC, crate::common::RW>
901 {
902 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri3Reg_SPEC,crate::common::RW>::from_register(self,0)
903 }
904}
905impl ::core::default::Default for CoexPri3Reg {
906 #[inline(always)]
907 fn default() -> CoexPri3Reg {
908 <crate::RegValueT<CoexPri3Reg_SPEC> as RegisterValue<_>>::new(16)
909 }
910}
911
912#[doc(hidden)]
913#[derive(Copy, Clone, Eq, PartialEq)]
914pub struct CoexPri4Reg_SPEC;
915impl crate::sealed::RegSpec for CoexPri4Reg_SPEC {
916 type DataType = u16;
917}
918
919#[doc = "COEX Priority Register"]
920pub type CoexPri4Reg = crate::RegValueT<CoexPri4Reg_SPEC>;
921
922impl CoexPri4Reg {
923 #[doc = "Refer to COEX_PRI1_REG."]
924 #[inline(always)]
925 pub fn coex_pri_mac(
926 self,
927 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri4Reg_SPEC, crate::common::RW>
928 {
929 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri4Reg_SPEC,crate::common::RW>::from_register(self,0)
930 }
931
932 #[doc = "Refer to COEX_PRI1_REG."]
933 #[inline(always)]
934 pub fn coex_pri_pti(
935 self,
936 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri4Reg_SPEC, crate::common::RW>
937 {
938 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri4Reg_SPEC,crate::common::RW>::from_register(self,0)
939 }
940}
941impl ::core::default::Default for CoexPri4Reg {
942 #[inline(always)]
943 fn default() -> CoexPri4Reg {
944 <crate::RegValueT<CoexPri4Reg_SPEC> as RegisterValue<_>>::new(0)
945 }
946}
947
948#[doc(hidden)]
949#[derive(Copy, Clone, Eq, PartialEq)]
950pub struct CoexPri5Reg_SPEC;
951impl crate::sealed::RegSpec for CoexPri5Reg_SPEC {
952 type DataType = u16;
953}
954
955#[doc = "COEX Priority Register"]
956pub type CoexPri5Reg = crate::RegValueT<CoexPri5Reg_SPEC>;
957
958impl CoexPri5Reg {
959 #[doc = "Refer to COEX_PRI1_REG."]
960 #[inline(always)]
961 pub fn coex_pri_mac(
962 self,
963 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri5Reg_SPEC, crate::common::RW>
964 {
965 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri5Reg_SPEC,crate::common::RW>::from_register(self,0)
966 }
967
968 #[doc = "Refer to COEX_PRI1_REG."]
969 #[inline(always)]
970 pub fn coex_pri_pti(
971 self,
972 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri5Reg_SPEC, crate::common::RW>
973 {
974 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri5Reg_SPEC,crate::common::RW>::from_register(self,0)
975 }
976}
977impl ::core::default::Default for CoexPri5Reg {
978 #[inline(always)]
979 fn default() -> CoexPri5Reg {
980 <crate::RegValueT<CoexPri5Reg_SPEC> as RegisterValue<_>>::new(0)
981 }
982}
983
984#[doc(hidden)]
985#[derive(Copy, Clone, Eq, PartialEq)]
986pub struct CoexPri6Reg_SPEC;
987impl crate::sealed::RegSpec for CoexPri6Reg_SPEC {
988 type DataType = u16;
989}
990
991#[doc = "COEX Priority Register"]
992pub type CoexPri6Reg = crate::RegValueT<CoexPri6Reg_SPEC>;
993
994impl CoexPri6Reg {
995 #[doc = "Refer to COEX_PRI1_REG."]
996 #[inline(always)]
997 pub fn coex_pri_mac(
998 self,
999 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri6Reg_SPEC, crate::common::RW>
1000 {
1001 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri6Reg_SPEC,crate::common::RW>::from_register(self,0)
1002 }
1003
1004 #[doc = "Refer to COEX_PRI1_REG."]
1005 #[inline(always)]
1006 pub fn coex_pri_pti(
1007 self,
1008 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri6Reg_SPEC, crate::common::RW>
1009 {
1010 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri6Reg_SPEC,crate::common::RW>::from_register(self,0)
1011 }
1012}
1013impl ::core::default::Default for CoexPri6Reg {
1014 #[inline(always)]
1015 fn default() -> CoexPri6Reg {
1016 <crate::RegValueT<CoexPri6Reg_SPEC> as RegisterValue<_>>::new(0)
1017 }
1018}
1019
1020#[doc(hidden)]
1021#[derive(Copy, Clone, Eq, PartialEq)]
1022pub struct CoexPri7Reg_SPEC;
1023impl crate::sealed::RegSpec for CoexPri7Reg_SPEC {
1024 type DataType = u16;
1025}
1026
1027#[doc = "COEX Priority Register"]
1028pub type CoexPri7Reg = crate::RegValueT<CoexPri7Reg_SPEC>;
1029
1030impl CoexPri7Reg {
1031 #[doc = "Refer to COEX_PRI1_REG."]
1032 #[inline(always)]
1033 pub fn coex_pri_mac(
1034 self,
1035 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri7Reg_SPEC, crate::common::RW>
1036 {
1037 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri7Reg_SPEC,crate::common::RW>::from_register(self,0)
1038 }
1039
1040 #[doc = "Refer to COEX_PRI1_REG."]
1041 #[inline(always)]
1042 pub fn coex_pri_pti(
1043 self,
1044 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri7Reg_SPEC, crate::common::RW>
1045 {
1046 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri7Reg_SPEC,crate::common::RW>::from_register(self,0)
1047 }
1048}
1049impl ::core::default::Default for CoexPri7Reg {
1050 #[inline(always)]
1051 fn default() -> CoexPri7Reg {
1052 <crate::RegValueT<CoexPri7Reg_SPEC> as RegisterValue<_>>::new(0)
1053 }
1054}
1055
1056#[doc(hidden)]
1057#[derive(Copy, Clone, Eq, PartialEq)]
1058pub struct CoexPri8Reg_SPEC;
1059impl crate::sealed::RegSpec for CoexPri8Reg_SPEC {
1060 type DataType = u16;
1061}
1062
1063#[doc = "COEX Priority Register"]
1064pub type CoexPri8Reg = crate::RegValueT<CoexPri8Reg_SPEC>;
1065
1066impl CoexPri8Reg {
1067 #[doc = "Refer to COEX_PRI1_REG."]
1068 #[inline(always)]
1069 pub fn coex_pri_mac(
1070 self,
1071 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri8Reg_SPEC, crate::common::RW>
1072 {
1073 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri8Reg_SPEC,crate::common::RW>::from_register(self,0)
1074 }
1075
1076 #[doc = "Refer to COEX_PRI1_REG."]
1077 #[inline(always)]
1078 pub fn coex_pri_pti(
1079 self,
1080 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri8Reg_SPEC, crate::common::RW>
1081 {
1082 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri8Reg_SPEC,crate::common::RW>::from_register(self,0)
1083 }
1084}
1085impl ::core::default::Default for CoexPri8Reg {
1086 #[inline(always)]
1087 fn default() -> CoexPri8Reg {
1088 <crate::RegValueT<CoexPri8Reg_SPEC> as RegisterValue<_>>::new(0)
1089 }
1090}
1091
1092#[doc(hidden)]
1093#[derive(Copy, Clone, Eq, PartialEq)]
1094pub struct CoexPri9Reg_SPEC;
1095impl crate::sealed::RegSpec for CoexPri9Reg_SPEC {
1096 type DataType = u16;
1097}
1098
1099#[doc = "COEX Priority Register"]
1100pub type CoexPri9Reg = crate::RegValueT<CoexPri9Reg_SPEC>;
1101
1102impl CoexPri9Reg {
1103 #[doc = "Refer to COEX_PRI1_REG."]
1104 #[inline(always)]
1105 pub fn coex_pri_mac(
1106 self,
1107 ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, CoexPri9Reg_SPEC, crate::common::RW>
1108 {
1109 crate::common::RegisterField::<3,0x3,1,0,u8,u8,CoexPri9Reg_SPEC,crate::common::RW>::from_register(self,0)
1110 }
1111
1112 #[doc = "Refer to COEX_PRI1_REG."]
1113 #[inline(always)]
1114 pub fn coex_pri_pti(
1115 self,
1116 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexPri9Reg_SPEC, crate::common::RW>
1117 {
1118 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexPri9Reg_SPEC,crate::common::RW>::from_register(self,0)
1119 }
1120}
1121impl ::core::default::Default for CoexPri9Reg {
1122 #[inline(always)]
1123 fn default() -> CoexPri9Reg {
1124 <crate::RegValueT<CoexPri9Reg_SPEC> as RegisterValue<_>>::new(0)
1125 }
1126}
1127
1128#[doc(hidden)]
1129#[derive(Copy, Clone, Eq, PartialEq)]
1130pub struct CoexStat2Reg_SPEC;
1131impl crate::sealed::RegSpec for CoexStat2Reg_SPEC {
1132 type DataType = u16;
1133}
1134
1135#[doc = "COEX Status 2 Register"]
1136pub type CoexStat2Reg = crate::RegValueT<CoexStat2Reg_SPEC>;
1137
1138impl CoexStat2Reg {
1139 #[doc = "The internal EXT_ACT used for the decision taking."]
1140 #[inline(always)]
1141 pub fn coex_ext_act(
1142 self,
1143 ) -> crate::common::RegisterFieldBool<15, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1144 crate::common::RegisterFieldBool::<15,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1145 }
1146
1147 #[doc = "The BLE PTI value that is used for decision taking."]
1148 #[inline(always)]
1149 pub fn coex_ble_pti_int(
1150 self,
1151 ) -> crate::common::RegisterField<12, 0x7, 1, 0, u8, u8, CoexStat2Reg_SPEC, crate::common::R>
1152 {
1153 crate::common::RegisterField::<12,0x7,1,0,u8,u8,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1154 }
1155
1156 #[doc = "The current value of BLE TX_EN."]
1157 #[inline(always)]
1158 pub fn coex_ble_tx_en(
1159 self,
1160 ) -> crate::common::RegisterFieldBool<11, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1161 crate::common::RegisterFieldBool::<11,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1162 }
1163
1164 #[doc = "The current value of BLE RX_EN."]
1165 #[inline(always)]
1166 pub fn coex_ble_rx_en(
1167 self,
1168 ) -> crate::common::RegisterFieldBool<10, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1169 crate::common::RegisterFieldBool::<10,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1170 }
1171
1172 #[doc = "The internal BLE_ACTIVE signal used for decision taking."]
1173 #[inline(always)]
1174 pub fn coex_ble_active(
1175 self,
1176 ) -> crate::common::RegisterFieldBool<9, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1177 crate::common::RegisterFieldBool::<9,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1178 }
1179
1180 #[doc = "The FTDF PTI value that is used for decision taking.\nValue depends on COEX_CTRL_REG.SEL_FTDF_PTI."]
1181 #[inline(always)]
1182 pub fn coex_ftdf_pti_int(
1183 self,
1184 ) -> crate::common::RegisterField<6, 0x7, 1, 0, u8, u8, CoexStat2Reg_SPEC, crate::common::R>
1185 {
1186 crate::common::RegisterField::<6,0x7,1,0,u8,u8,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1187 }
1188
1189 #[doc = "The current value of FTDF TX_EN."]
1190 #[inline(always)]
1191 pub fn coex_ftdf_tx_en(
1192 self,
1193 ) -> crate::common::RegisterFieldBool<5, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1194 crate::common::RegisterFieldBool::<5,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1195 }
1196
1197 #[doc = "The current value of FTDF RX_EN."]
1198 #[inline(always)]
1199 pub fn coex_ftdf_rx_en(
1200 self,
1201 ) -> crate::common::RegisterFieldBool<4, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1202 crate::common::RegisterFieldBool::<4,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1203 }
1204
1205 #[doc = "The internal FTDF_ACTIVE signal used for the decision taking."]
1206 #[inline(always)]
1207 pub fn coex_ftdf_active(
1208 self,
1209 ) -> crate::common::RegisterFieldBool<3, 1, 0, CoexStat2Reg_SPEC, crate::common::R> {
1210 crate::common::RegisterFieldBool::<3,1,0,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1211 }
1212
1213 #[doc = "DECISION (bits \\[1:0\\]) appended the CLOSING (bit \\[2\\]) state."]
1214 #[inline(always)]
1215 pub fn coex_decision_with_closing(
1216 self,
1217 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, CoexStat2Reg_SPEC, crate::common::R>
1218 {
1219 crate::common::RegisterField::<0,0x7,1,0,u8,u8,CoexStat2Reg_SPEC,crate::common::R>::from_register(self,0)
1220 }
1221}
1222impl ::core::default::Default for CoexStat2Reg {
1223 #[inline(always)]
1224 fn default() -> CoexStat2Reg {
1225 <crate::RegValueT<CoexStat2Reg_SPEC> as RegisterValue<_>>::new(0)
1226 }
1227}
1228
1229#[doc(hidden)]
1230#[derive(Copy, Clone, Eq, PartialEq)]
1231pub struct CoexStatReg_SPEC;
1232impl crate::sealed::RegSpec for CoexStatReg_SPEC {
1233 type DataType = u16;
1234}
1235
1236#[doc = "COEX Status Register"]
1237pub type CoexStatReg = crate::RegValueT<CoexStatReg_SPEC>;
1238
1239impl CoexStatReg {
1240 #[doc = "This signal is constantly \"1\" on FTDF-only chips.\nIf set to \"1\" then all BLE requests are ignored by masking immediately the request signal from the BLE.\nIn more detail, the internal signal \"ble_active\" is the logical AND of this bitfield and the \"ble.event_in_process\"."]
1241 #[inline(always)]
1242 pub fn ignore_ble_stat(
1243 self,
1244 ) -> crate::common::RegisterFieldBool<15, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1245 crate::common::RegisterFieldBool::<15,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1246 }
1247
1248 #[doc = "This signal is constantly \"1\" on BLE-only chips.\nIf set to \"1\" then all FTDF requests are ignored by masking immediately the request signal from the FTDF.\nIn more detail, the internal signal \"ftdf_active\" is the logical AND of this bitfield and the \"ftdf.phy_en\"."]
1249 #[inline(always)]
1250 pub fn ignore_ftdf_stat(
1251 self,
1252 ) -> crate::common::RegisterFieldBool<14, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1253 crate::common::RegisterFieldBool::<14,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1254 }
1255
1256 #[doc = "If set to \"1\" then all EXT requests are ignored by masking immediately the request signal from the external MAC.\nIn more detail, the internal signal \"ext_active\" is the logical AND of this bitfield and the \"ext_act\"."]
1257 #[inline(always)]
1258 pub fn ignore_ext_stat(
1259 self,
1260 ) -> crate::common::RegisterFieldBool<13, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1261 crate::common::RegisterFieldBool::<13,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1262 }
1263
1264 #[doc = "Current state of RADIO_BUSY signal generated from RFCU, which is the logical OR among all Radio DCFs.\nNote that the arbiter will process this value with one COEX clock cycle delay."]
1265 #[inline(always)]
1266 pub fn coex_radio_busy(
1267 self,
1268 ) -> crate::common::RegisterFieldBool<12, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1269 crate::common::RegisterFieldBool::<12,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1270 }
1271
1272 #[doc = "Current state of the pin."]
1273 #[inline(always)]
1274 pub fn ext_act1(
1275 self,
1276 ) -> crate::common::RegisterFieldBool<11, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1277 crate::common::RegisterFieldBool::<11,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1278 }
1279
1280 #[doc = "Current state of the pin."]
1281 #[inline(always)]
1282 pub fn ext_act0(
1283 self,
1284 ) -> crate::common::RegisterFieldBool<10, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1285 crate::common::RegisterFieldBool::<10,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1286 }
1287
1288 #[doc = "Current state of the pin."]
1289 #[inline(always)]
1290 pub fn smart_pri(
1291 self,
1292 ) -> crate::common::RegisterFieldBool<9, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1293 crate::common::RegisterFieldBool::<9,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1294 }
1295
1296 #[doc = "Current state of the pin."]
1297 #[inline(always)]
1298 pub fn smart_act(
1299 self,
1300 ) -> crate::common::RegisterFieldBool<8, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1301 crate::common::RegisterFieldBool::<8,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1302 }
1303
1304 #[doc = "Provides the value of the \"CLOSING\" substate."]
1305 #[inline(always)]
1306 pub fn coex_closing(
1307 self,
1308 ) -> crate::common::RegisterFieldBool<7, 1, 0, CoexStatReg_SPEC, crate::common::R> {
1309 crate::common::RegisterFieldBool::<7,1,0,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1310 }
1311
1312 #[doc = "Decision values:\n0: Decision is NONE.\n1: Decision is BLE.\n2: Decision is FTDF.\n3: Decision is EXT.\nNote: If \"0\" (i.e. decision is NONE) then no MAC will have access to the on-chip radio. As a consequence, the SMART_PRI signal will stay low, since no on-chip (SMART) MAC will have priority.\nNote: While in programming mode, the COEX_PRIx_REGs are considered as invalid, which means that no new decision can be taken.\nNote: The decision NONE will be held as long as there is no \"*_active\" internal signal from BLE, FTDF or EXT. Also, if in programming state and the last transaction has been finished, then the decision will be held also to NONE."]
1313 #[inline(always)]
1314 pub fn coex_decision(
1315 self,
1316 ) -> crate::common::RegisterField<5, 0x3, 1, 0, u8, u8, CoexStatReg_SPEC, crate::common::R>
1317 {
1318 crate::common::RegisterField::<5,0x3,1,0,u8,u8,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1319 }
1320
1321 #[doc = "Provides the number \"x\" of the COEX_PRIx_REG that win the last arbitration cycle. If \"0\" then it is a null pointer, pointing to no COEX_PRIx_REG."]
1322 #[inline(always)]
1323 pub fn coex_decision_ptr(
1324 self,
1325 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, CoexStatReg_SPEC, crate::common::R>
1326 {
1327 crate::common::RegisterField::<0,0xf,1,0,u8,u8,CoexStatReg_SPEC,crate::common::R>::from_register(self,0)
1328 }
1329}
1330impl ::core::default::Default for CoexStatReg {
1331 #[inline(always)]
1332 fn default() -> CoexStatReg {
1333 <crate::RegValueT<CoexStatReg_SPEC> as RegisterValue<_>>::new(0)
1334 }
1335}