da14682_pac/
scb.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:10 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Cortex M0 SCB registers"]
28unsafe impl ::core::marker::Send for super::Scb {}
29unsafe impl ::core::marker::Sync for super::Scb {}
30impl super::Scb {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CPUID base register"]
38    #[inline(always)]
39    pub const fn cpuid(&self) -> &'static crate::common::Reg<self::Cpuid_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Cpuid_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Interrupt control and state register"]
48    #[inline(always)]
49    pub const fn icsr(&self) -> &'static crate::common::Reg<self::Icsr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Icsr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "Application interrupt and reset control register"]
58    #[inline(always)]
59    pub const fn aircr(&self) -> &'static crate::common::Reg<self::Aircr_SPEC, crate::common::R> {
60        unsafe {
61            crate::common::Reg::<self::Aircr_SPEC, crate::common::R>::from_ptr(
62                self._svd2pac_as_ptr().add(12usize),
63            )
64        }
65    }
66
67    #[doc = "System control register"]
68    #[inline(always)]
69    pub const fn scr(&self) -> &'static crate::common::Reg<self::Scr_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Scr_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(16usize),
73            )
74        }
75    }
76
77    #[doc = "Configuration and control register"]
78    #[inline(always)]
79    pub const fn ccr(&self) -> &'static crate::common::Reg<self::Ccr_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Ccr_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(20usize),
83            )
84        }
85    }
86
87    #[doc = "System handler priority register 2"]
88    #[inline(always)]
89    pub const fn shpr2(&self) -> &'static crate::common::Reg<self::Shpr2_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Shpr2_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(28usize),
93            )
94        }
95    }
96
97    #[doc = "System handler priority register 3"]
98    #[inline(always)]
99    pub const fn shpr3(&self) -> &'static crate::common::Reg<self::Shpr3_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Shpr3_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(32usize),
103            )
104        }
105    }
106}
107#[doc(hidden)]
108#[derive(Copy, Clone, Eq, PartialEq)]
109pub struct Cpuid_SPEC;
110impl crate::sealed::RegSpec for Cpuid_SPEC {
111    type DataType = u32;
112}
113
114#[doc = "CPUID base register"]
115pub type Cpuid = crate::RegValueT<Cpuid_SPEC>;
116
117impl Cpuid {
118    #[doc = "REVISION\\[3:0\\] bits (Revision number)"]
119    #[inline(always)]
120    pub fn revision(
121        self,
122    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Cpuid_SPEC, crate::common::R> {
123        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Cpuid_SPEC,crate::common::R>::from_register(self,0)
124    }
125
126    #[doc = "PARTNO\\[11:0\\] bits (Part number of the processor core)"]
127    #[inline(always)]
128    pub fn partno(
129        self,
130    ) -> crate::common::RegisterField<4, 0xfff, 1, 0, u16, u16, Cpuid_SPEC, crate::common::R> {
131        crate::common::RegisterField::<4,0xfff,1,0,u16,u16,Cpuid_SPEC,crate::common::R>::from_register(self,0)
132    }
133
134    #[doc = "CONSTANT\\[3:0\\] bits (Reads as 0xF)"]
135    #[inline(always)]
136    pub fn constant(
137        self,
138    ) -> crate::common::RegisterField<16, 0xf, 1, 0, u8, u8, Cpuid_SPEC, crate::common::R> {
139        crate::common::RegisterField::<16,0xf,1,0,u8,u8,Cpuid_SPEC,crate::common::R>::from_register(self,0)
140    }
141
142    #[doc = "VARIANT\\[3:0\\] bits (Variant number)"]
143    #[inline(always)]
144    pub fn variant(
145        self,
146    ) -> crate::common::RegisterField<20, 0xf, 1, 0, u8, u8, Cpuid_SPEC, crate::common::R> {
147        crate::common::RegisterField::<20,0xf,1,0,u8,u8,Cpuid_SPEC,crate::common::R>::from_register(self,0)
148    }
149
150    #[doc = "IMPLEMENTER\\[7:0\\] bits (Implementer code)"]
151    #[inline(always)]
152    pub fn implementer(
153        self,
154    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Cpuid_SPEC, crate::common::R> {
155        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Cpuid_SPEC,crate::common::R>::from_register(self,0)
156    }
157}
158impl ::core::default::Default for Cpuid {
159    #[inline(always)]
160    fn default() -> Cpuid {
161        <crate::RegValueT<Cpuid_SPEC> as RegisterValue<_>>::new(1091355136)
162    }
163}
164
165#[doc(hidden)]
166#[derive(Copy, Clone, Eq, PartialEq)]
167pub struct Icsr_SPEC;
168impl crate::sealed::RegSpec for Icsr_SPEC {
169    type DataType = u32;
170}
171
172#[doc = "Interrupt control and state register"]
173pub type Icsr = crate::RegValueT<Icsr_SPEC>;
174
175impl Icsr {
176    #[doc = "VECTACTIVE\\[5:0\\] bits (Active vector)"]
177    #[inline(always)]
178    pub fn vectactive(
179        self,
180    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Icsr_SPEC, crate::common::RW> {
181        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Icsr_SPEC,crate::common::RW>::from_register(self,0)
182    }
183
184    #[doc = "VECTPENDING\\[5:0\\] bits (Pending vector)"]
185    #[inline(always)]
186    pub fn vectpending(
187        self,
188    ) -> crate::common::RegisterField<12, 0x3f, 1, 0, u8, u8, Icsr_SPEC, crate::common::RW> {
189        crate::common::RegisterField::<12,0x3f,1,0,u8,u8,Icsr_SPEC,crate::common::RW>::from_register(self,0)
190    }
191
192    #[doc = "Interrupt pending flag, excluding NMI and Faults"]
193    #[inline(always)]
194    pub fn isrpending(
195        self,
196    ) -> crate::common::RegisterFieldBool<22, 1, 0, Icsr_SPEC, crate::common::RW> {
197        crate::common::RegisterFieldBool::<22, 1, 0, Icsr_SPEC, crate::common::RW>::from_register(
198            self, 0,
199        )
200    }
201
202    #[doc = "SysTick exception clear-pending bit"]
203    #[inline(always)]
204    pub fn pendstclr(
205        self,
206    ) -> crate::common::RegisterFieldBool<25, 1, 0, Icsr_SPEC, crate::common::RW> {
207        crate::common::RegisterFieldBool::<25, 1, 0, Icsr_SPEC, crate::common::RW>::from_register(
208            self, 0,
209        )
210    }
211
212    #[doc = "SysTick exception set-pending bit"]
213    #[inline(always)]
214    pub fn pendstset(
215        self,
216    ) -> crate::common::RegisterFieldBool<26, 1, 0, Icsr_SPEC, crate::common::RW> {
217        crate::common::RegisterFieldBool::<26, 1, 0, Icsr_SPEC, crate::common::RW>::from_register(
218            self, 0,
219        )
220    }
221
222    #[doc = "PendSV clear-pending bit"]
223    #[inline(always)]
224    pub fn pendsvclr(
225        self,
226    ) -> crate::common::RegisterFieldBool<27, 1, 0, Icsr_SPEC, crate::common::RW> {
227        crate::common::RegisterFieldBool::<27, 1, 0, Icsr_SPEC, crate::common::RW>::from_register(
228            self, 0,
229        )
230    }
231
232    #[doc = "PendSV set-pending bit"]
233    #[inline(always)]
234    pub fn pendsvset(
235        self,
236    ) -> crate::common::RegisterFieldBool<28, 1, 0, Icsr_SPEC, crate::common::RW> {
237        crate::common::RegisterFieldBool::<28, 1, 0, Icsr_SPEC, crate::common::RW>::from_register(
238            self, 0,
239        )
240    }
241
242    #[doc = "NMI set-pending bit"]
243    #[inline(always)]
244    pub fn nmipendset(
245        self,
246    ) -> crate::common::RegisterFieldBool<31, 1, 0, Icsr_SPEC, crate::common::RW> {
247        crate::common::RegisterFieldBool::<31, 1, 0, Icsr_SPEC, crate::common::RW>::from_register(
248            self, 0,
249        )
250    }
251}
252impl ::core::default::Default for Icsr {
253    #[inline(always)]
254    fn default() -> Icsr {
255        <crate::RegValueT<Icsr_SPEC> as RegisterValue<_>>::new(0)
256    }
257}
258
259#[doc(hidden)]
260#[derive(Copy, Clone, Eq, PartialEq)]
261pub struct Aircr_SPEC;
262impl crate::sealed::RegSpec for Aircr_SPEC {
263    type DataType = u32;
264}
265
266#[doc = "Application interrupt and reset control register"]
267pub type Aircr = crate::RegValueT<Aircr_SPEC>;
268
269impl Aircr {
270    #[doc = "Reserved for Debug use"]
271    #[inline(always)]
272    pub fn vectreset(
273        self,
274    ) -> crate::common::RegisterFieldBool<0, 1, 0, Aircr_SPEC, crate::common::R> {
275        crate::common::RegisterFieldBool::<0, 1, 0, Aircr_SPEC, crate::common::R>::from_register(
276            self, 0,
277        )
278    }
279
280    #[doc = "Reserved for Debug use"]
281    #[inline(always)]
282    pub fn vectclractive(
283        self,
284    ) -> crate::common::RegisterFieldBool<1, 1, 0, Aircr_SPEC, crate::common::R> {
285        crate::common::RegisterFieldBool::<1, 1, 0, Aircr_SPEC, crate::common::R>::from_register(
286            self, 0,
287        )
288    }
289
290    #[doc = "System reset request"]
291    #[inline(always)]
292    pub fn sysresetreq(
293        self,
294    ) -> crate::common::RegisterFieldBool<2, 1, 0, Aircr_SPEC, crate::common::R> {
295        crate::common::RegisterFieldBool::<2, 1, 0, Aircr_SPEC, crate::common::R>::from_register(
296            self, 0,
297        )
298    }
299
300    #[doc = "Data endianness bit"]
301    #[inline(always)]
302    pub fn endianess(
303        self,
304    ) -> crate::common::RegisterFieldBool<15, 1, 0, Aircr_SPEC, crate::common::R> {
305        crate::common::RegisterFieldBool::<15, 1, 0, Aircr_SPEC, crate::common::R>::from_register(
306            self, 0,
307        )
308    }
309
310    #[doc = "VECTKEY\\[15:0\\] bits (Register key)"]
311    #[inline(always)]
312    pub fn vectkey(
313        self,
314    ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Aircr_SPEC, crate::common::R>
315    {
316        crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Aircr_SPEC,crate::common::R>::from_register(self,0)
317    }
318}
319impl ::core::default::Default for Aircr {
320    #[inline(always)]
321    fn default() -> Aircr {
322        <crate::RegValueT<Aircr_SPEC> as RegisterValue<_>>::new(4194631680)
323    }
324}
325
326#[doc(hidden)]
327#[derive(Copy, Clone, Eq, PartialEq)]
328pub struct Scr_SPEC;
329impl crate::sealed::RegSpec for Scr_SPEC {
330    type DataType = u32;
331}
332
333#[doc = "System control register"]
334pub type Scr = crate::RegValueT<Scr_SPEC>;
335
336impl Scr {
337    #[doc = "Configures sleep-on-exit when returning from Handler mode to Thread mode"]
338    #[inline(always)]
339    pub fn sleeponexit(
340        self,
341    ) -> crate::common::RegisterFieldBool<1, 1, 0, Scr_SPEC, crate::common::RW> {
342        crate::common::RegisterFieldBool::<1, 1, 0, Scr_SPEC, crate::common::RW>::from_register(
343            self, 0,
344        )
345    }
346
347    #[doc = "Controls whether the processor uses sleep or deep sleep"]
348    #[inline(always)]
349    pub fn sleepdeep(
350        self,
351    ) -> crate::common::RegisterFieldBool<2, 1, 0, Scr_SPEC, crate::common::RW> {
352        crate::common::RegisterFieldBool::<2, 1, 0, Scr_SPEC, crate::common::RW>::from_register(
353            self, 0,
354        )
355    }
356
357    #[doc = "Send event on pending bit"]
358    #[inline(always)]
359    pub fn seveonpend(
360        self,
361    ) -> crate::common::RegisterFieldBool<4, 1, 0, Scr_SPEC, crate::common::RW> {
362        crate::common::RegisterFieldBool::<4, 1, 0, Scr_SPEC, crate::common::RW>::from_register(
363            self, 0,
364        )
365    }
366}
367impl ::core::default::Default for Scr {
368    #[inline(always)]
369    fn default() -> Scr {
370        <crate::RegValueT<Scr_SPEC> as RegisterValue<_>>::new(0)
371    }
372}
373
374#[doc(hidden)]
375#[derive(Copy, Clone, Eq, PartialEq)]
376pub struct Ccr_SPEC;
377impl crate::sealed::RegSpec for Ccr_SPEC {
378    type DataType = u32;
379}
380
381#[doc = "Configuration and control register"]
382pub type Ccr = crate::RegValueT<Ccr_SPEC>;
383
384impl Ccr {
385    #[doc = "Enables unaligned access traps"]
386    #[inline(always)]
387    pub fn unalign_trp(
388        self,
389    ) -> crate::common::RegisterFieldBool<3, 1, 0, Ccr_SPEC, crate::common::RW> {
390        crate::common::RegisterFieldBool::<3, 1, 0, Ccr_SPEC, crate::common::RW>::from_register(
391            self, 0,
392        )
393    }
394
395    #[doc = "Configures stack alignment on exception entry"]
396    #[inline(always)]
397    pub fn stkalign(
398        self,
399    ) -> crate::common::RegisterFieldBool<9, 1, 0, Ccr_SPEC, crate::common::RW> {
400        crate::common::RegisterFieldBool::<9, 1, 0, Ccr_SPEC, crate::common::RW>::from_register(
401            self, 0,
402        )
403    }
404}
405impl ::core::default::Default for Ccr {
406    #[inline(always)]
407    fn default() -> Ccr {
408        <crate::RegValueT<Ccr_SPEC> as RegisterValue<_>>::new(516)
409    }
410}
411
412#[doc(hidden)]
413#[derive(Copy, Clone, Eq, PartialEq)]
414pub struct Shpr2_SPEC;
415impl crate::sealed::RegSpec for Shpr2_SPEC {
416    type DataType = u32;
417}
418
419#[doc = "System handler priority register 2"]
420pub type Shpr2 = crate::RegValueT<Shpr2_SPEC>;
421
422impl Shpr2 {
423    #[doc = "PRI_11\\[7:0\\] bits (Priority of system handler 11, SVCall)"]
424    #[inline(always)]
425    pub fn pri_11(
426        self,
427    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Shpr2_SPEC, crate::common::RW> {
428        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Shpr2_SPEC,crate::common::RW>::from_register(self,0)
429    }
430}
431impl ::core::default::Default for Shpr2 {
432    #[inline(always)]
433    fn default() -> Shpr2 {
434        <crate::RegValueT<Shpr2_SPEC> as RegisterValue<_>>::new(0)
435    }
436}
437
438#[doc(hidden)]
439#[derive(Copy, Clone, Eq, PartialEq)]
440pub struct Shpr3_SPEC;
441impl crate::sealed::RegSpec for Shpr3_SPEC {
442    type DataType = u32;
443}
444
445#[doc = "System handler priority register 3"]
446pub type Shpr3 = crate::RegValueT<Shpr3_SPEC>;
447
448impl Shpr3 {
449    #[doc = "PRI_14\\[7:0\\] bits (Priority of system handler 14, PendSV)"]
450    #[inline(always)]
451    pub fn pri_14(
452        self,
453    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Shpr3_SPEC, crate::common::RW> {
454        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Shpr3_SPEC,crate::common::RW>::from_register(self,0)
455    }
456
457    #[doc = "PRI_15\\[7:0\\] bits (Priority of system handler 15, SysTick exception)"]
458    #[inline(always)]
459    pub fn pri_15(
460        self,
461    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Shpr3_SPEC, crate::common::RW> {
462        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Shpr3_SPEC,crate::common::RW>::from_register(self,0)
463    }
464}
465impl ::core::default::Default for Shpr3 {
466    #[inline(always)]
467    fn default() -> Shpr3 {
468        <crate::RegValueT<Shpr3_SPEC> as RegisterValue<_>>::new(0)
469    }
470}
da14682_pac/scb.rs

da14682_pac/
scb.rs
