da14680_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:44:57 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = ""]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "aes_hash")]
31pub mod aes_hash;
32#[cfg(feature = "anamisc")]
33pub mod anamisc;
34#[cfg(feature = "apu")]
35pub mod apu;
36#[cfg(feature = "ble")]
37pub mod ble;
38#[cfg(feature = "cache")]
39pub mod cache;
40#[cfg(feature = "chip_version")]
41pub mod chip_version;
42#[cfg(feature = "coex")]
43pub mod coex;
44#[cfg(feature = "crg_per")]
45pub mod crg_per;
46#[cfg(feature = "crg_top")]
47pub mod crg_top;
48#[cfg(feature = "dcdc")]
49pub mod dcdc;
50#[cfg(feature = "dma")]
51pub mod dma;
52#[cfg(feature = "ecc")]
53pub mod ecc;
54#[cfg(feature = "ftdf")]
55pub mod ftdf;
56#[cfg(feature = "gp_timers")]
57pub mod gp_timers;
58#[cfg(feature = "gpadc")]
59pub mod gpadc;
60#[cfg(feature = "gpio")]
61pub mod gpio;
62#[cfg(feature = "gpreg")]
63pub mod gpreg;
64#[cfg(feature = "i2c")]
65pub mod i2c;
66#[cfg(feature = "i2c2")]
67pub mod i2c2;
68#[cfg(feature = "ir")]
69pub mod ir;
70#[cfg(feature = "kbscan")]
71pub mod kbscan;
72#[cfg(feature = "nvic")]
73pub mod nvic;
74#[cfg(feature = "otpc")]
75pub mod otpc;
76#[cfg(feature = "qspic")]
77pub mod qspic;
78#[cfg(feature = "quad")]
79pub mod quad;
80#[cfg(feature = "scb")]
81pub mod scb;
82#[cfg(feature = "spi")]
83pub mod spi;
84#[cfg(feature = "spi2")]
85pub mod spi2;
86#[cfg(feature = "systick")]
87pub mod systick;
88#[cfg(feature = "timer1")]
89pub mod timer1;
90#[cfg(feature = "trng")]
91pub mod trng;
92#[cfg(feature = "uart")]
93pub mod uart;
94#[cfg(feature = "uart2")]
95pub mod uart2;
96#[cfg(feature = "usb")]
97pub mod usb;
98#[cfg(feature = "wakeup")]
99pub mod wakeup;
100#[cfg(feature = "wdog")]
101pub mod wdog;
102
103#[cfg(feature = "nvic")]
104#[derive(Copy, Clone, Eq, PartialEq)]
105pub struct Nvic {
106    ptr: *mut u8,
107}
108#[cfg(feature = "nvic")]
109pub const NVIC: self::Nvic = self::Nvic {
110    ptr: 0xe000e100u32 as _,
111};
112#[cfg(feature = "scb")]
113#[derive(Copy, Clone, Eq, PartialEq)]
114pub struct Scb {
115    ptr: *mut u8,
116}
117#[cfg(feature = "scb")]
118pub const SCB: self::Scb = self::Scb {
119    ptr: 0xe000ed00u32 as _,
120};
121#[cfg(feature = "systick")]
122#[derive(Copy, Clone, Eq, PartialEq)]
123pub struct SysTick {
124    ptr: *mut u8,
125}
126#[cfg(feature = "systick")]
127pub const SYSTICK: self::SysTick = self::SysTick {
128    ptr: 0xe000e010u32 as _,
129};
130#[cfg(feature = "aes_hash")]
131#[derive(Copy, Clone, Eq, PartialEq)]
132pub struct AesHash {
133    ptr: *mut u8,
134}
135#[cfg(feature = "aes_hash")]
136pub const AES_HASH: self::AesHash = self::AesHash {
137    ptr: 0x40020000u32 as _,
138};
139#[cfg(feature = "anamisc")]
140#[derive(Copy, Clone, Eq, PartialEq)]
141pub struct Anamisc {
142    ptr: *mut u8,
143}
144#[cfg(feature = "anamisc")]
145pub const ANAMISC: self::Anamisc = self::Anamisc {
146    ptr: 0x50001b00u32 as _,
147};
148#[cfg(feature = "apu")]
149#[derive(Copy, Clone, Eq, PartialEq)]
150pub struct Apu {
151    ptr: *mut u8,
152}
153#[cfg(feature = "apu")]
154pub const APU: self::Apu = self::Apu {
155    ptr: 0x50004000u32 as _,
156};
157#[cfg(feature = "ble")]
158#[derive(Copy, Clone, Eq, PartialEq)]
159pub struct Ble {
160    ptr: *mut u8,
161}
162#[cfg(feature = "ble")]
163pub const BLE: self::Ble = self::Ble {
164    ptr: 0x40000000u32 as _,
165};
166#[cfg(feature = "cache")]
167#[derive(Copy, Clone, Eq, PartialEq)]
168pub struct Cache {
169    ptr: *mut u8,
170}
171#[cfg(feature = "cache")]
172pub const CACHE: self::Cache = self::Cache {
173    ptr: 0x400c3000u32 as _,
174};
175#[cfg(feature = "chip_version")]
176#[derive(Copy, Clone, Eq, PartialEq)]
177pub struct ChipVersion {
178    ptr: *mut u8,
179}
180#[cfg(feature = "chip_version")]
181pub const CHIP_VERSION: self::ChipVersion = self::ChipVersion {
182    ptr: 0x50003200u32 as _,
183};
184#[cfg(feature = "coex")]
185#[derive(Copy, Clone, Eq, PartialEq)]
186pub struct Coex {
187    ptr: *mut u8,
188}
189#[cfg(feature = "coex")]
190pub const COEX: self::Coex = self::Coex {
191    ptr: 0x50002f00u32 as _,
192};
193#[cfg(feature = "crg_per")]
194#[derive(Copy, Clone, Eq, PartialEq)]
195pub struct CrgPer {
196    ptr: *mut u8,
197}
198#[cfg(feature = "crg_per")]
199pub const CRG_PER: self::CrgPer = self::CrgPer {
200    ptr: 0x50001c00u32 as _,
201};
202#[cfg(feature = "crg_top")]
203#[derive(Copy, Clone, Eq, PartialEq)]
204pub struct CrgTop {
205    ptr: *mut u8,
206}
207#[cfg(feature = "crg_top")]
208pub const CRG_TOP: self::CrgTop = self::CrgTop {
209    ptr: 0x50000000u32 as _,
210};
211#[cfg(feature = "dcdc")]
212#[derive(Copy, Clone, Eq, PartialEq)]
213pub struct Dcdc {
214    ptr: *mut u8,
215}
216#[cfg(feature = "dcdc")]
217pub const DCDC: self::Dcdc = self::Dcdc {
218    ptr: 0x50000080u32 as _,
219};
220#[cfg(feature = "dma")]
221#[derive(Copy, Clone, Eq, PartialEq)]
222pub struct Dma {
223    ptr: *mut u8,
224}
225#[cfg(feature = "dma")]
226pub const DMA: self::Dma = self::Dma {
227    ptr: 0x50003500u32 as _,
228};
229#[cfg(feature = "ecc")]
230#[derive(Copy, Clone, Eq, PartialEq)]
231pub struct Ecc {
232    ptr: *mut u8,
233}
234#[cfg(feature = "ecc")]
235pub const ECC: self::Ecc = self::Ecc {
236    ptr: 0x50006000u32 as _,
237};
238#[cfg(feature = "ftdf")]
239#[derive(Copy, Clone, Eq, PartialEq)]
240pub struct Ftdf {
241    ptr: *mut u8,
242}
243#[cfg(feature = "ftdf")]
244pub const FTDF: self::Ftdf = self::Ftdf {
245    ptr: 0x40080000u32 as _,
246};
247#[cfg(feature = "gp_timers")]
248#[derive(Copy, Clone, Eq, PartialEq)]
249pub struct GpTimers {
250    ptr: *mut u8,
251}
252#[cfg(feature = "gp_timers")]
253pub const GP_TIMERS: self::GpTimers = self::GpTimers {
254    ptr: 0x50003400u32 as _,
255};
256#[cfg(feature = "gpadc")]
257#[derive(Copy, Clone, Eq, PartialEq)]
258pub struct Gpadc {
259    ptr: *mut u8,
260}
261#[cfg(feature = "gpadc")]
262pub const GPADC: self::Gpadc = self::Gpadc {
263    ptr: 0x50001900u32 as _,
264};
265#[cfg(feature = "gpio")]
266#[derive(Copy, Clone, Eq, PartialEq)]
267pub struct Gpio {
268    ptr: *mut u8,
269}
270#[cfg(feature = "gpio")]
271pub const GPIO: self::Gpio = self::Gpio {
272    ptr: 0x50003000u32 as _,
273};
274#[cfg(feature = "gpreg")]
275#[derive(Copy, Clone, Eq, PartialEq)]
276pub struct Gpreg {
277    ptr: *mut u8,
278}
279#[cfg(feature = "gpreg")]
280pub const GPREG: self::Gpreg = self::Gpreg {
281    ptr: 0x50003300u32 as _,
282};
283#[cfg(feature = "i2c")]
284#[derive(Copy, Clone, Eq, PartialEq)]
285pub struct I2C {
286    ptr: *mut u8,
287}
288#[cfg(feature = "i2c")]
289pub const I2C: self::I2C = self::I2C {
290    ptr: 0x50001400u32 as _,
291};
292#[cfg(feature = "i2c2")]
293#[derive(Copy, Clone, Eq, PartialEq)]
294pub struct I2C2 {
295    ptr: *mut u8,
296}
297#[cfg(feature = "i2c2")]
298pub const I2C2: self::I2C2 = self::I2C2 {
299    ptr: 0x50001500u32 as _,
300};
301#[cfg(feature = "ir")]
302#[derive(Copy, Clone, Eq, PartialEq)]
303pub struct Ir {
304    ptr: *mut u8,
305}
306#[cfg(feature = "ir")]
307pub const IR: self::Ir = self::Ir {
308    ptr: 0x50001700u32 as _,
309};
310#[cfg(feature = "kbscan")]
311#[derive(Copy, Clone, Eq, PartialEq)]
312pub struct Kbscan {
313    ptr: *mut u8,
314}
315#[cfg(feature = "kbscan")]
316pub const KBSCAN: self::Kbscan = self::Kbscan {
317    ptr: 0x50001600u32 as _,
318};
319#[cfg(feature = "otpc")]
320#[derive(Copy, Clone, Eq, PartialEq)]
321pub struct Otpc {
322    ptr: *mut u8,
323}
324#[cfg(feature = "otpc")]
325pub const OTPC: self::Otpc = self::Otpc {
326    ptr: 0x7f40000u32 as _,
327};
328#[cfg(feature = "qspic")]
329#[derive(Copy, Clone, Eq, PartialEq)]
330pub struct Qspic {
331    ptr: *mut u8,
332}
333#[cfg(feature = "qspic")]
334pub const QSPIC: self::Qspic = self::Qspic {
335    ptr: 0xc000000u32 as _,
336};
337#[cfg(feature = "quad")]
338#[derive(Copy, Clone, Eq, PartialEq)]
339pub struct Quad {
340    ptr: *mut u8,
341}
342#[cfg(feature = "quad")]
343pub const QUAD: self::Quad = self::Quad {
344    ptr: 0x50001a00u32 as _,
345};
346#[cfg(feature = "spi")]
347#[derive(Copy, Clone, Eq, PartialEq)]
348pub struct Spi {
349    ptr: *mut u8,
350}
351#[cfg(feature = "spi")]
352pub const SPI: self::Spi = self::Spi {
353    ptr: 0x50001200u32 as _,
354};
355#[cfg(feature = "spi2")]
356#[derive(Copy, Clone, Eq, PartialEq)]
357pub struct Spi2 {
358    ptr: *mut u8,
359}
360#[cfg(feature = "spi2")]
361pub const SPI2: self::Spi2 = self::Spi2 {
362    ptr: 0x50001300u32 as _,
363};
364#[cfg(feature = "timer1")]
365#[derive(Copy, Clone, Eq, PartialEq)]
366pub struct Timer1 {
367    ptr: *mut u8,
368}
369#[cfg(feature = "timer1")]
370pub const TIMER1: self::Timer1 = self::Timer1 {
371    ptr: 0x50000200u32 as _,
372};
373#[cfg(feature = "trng")]
374#[derive(Copy, Clone, Eq, PartialEq)]
375pub struct Trng {
376    ptr: *mut u8,
377}
378#[cfg(feature = "trng")]
379pub const TRNG: self::Trng = self::Trng {
380    ptr: 0x50005000u32 as _,
381};
382#[cfg(feature = "uart")]
383#[derive(Copy, Clone, Eq, PartialEq)]
384pub struct Uart {
385    ptr: *mut u8,
386}
387#[cfg(feature = "uart")]
388pub const UART: self::Uart = self::Uart {
389    ptr: 0x50001000u32 as _,
390};
391#[cfg(feature = "uart2")]
392#[derive(Copy, Clone, Eq, PartialEq)]
393pub struct Uart2 {
394    ptr: *mut u8,
395}
396#[cfg(feature = "uart2")]
397pub const UART2: self::Uart2 = self::Uart2 {
398    ptr: 0x50001100u32 as _,
399};
400#[cfg(feature = "usb")]
401#[derive(Copy, Clone, Eq, PartialEq)]
402pub struct Usb {
403    ptr: *mut u8,
404}
405#[cfg(feature = "usb")]
406pub const USB: self::Usb = self::Usb {
407    ptr: 0x50001800u32 as _,
408};
409#[cfg(feature = "wakeup")]
410#[derive(Copy, Clone, Eq, PartialEq)]
411pub struct Wakeup {
412    ptr: *mut u8,
413}
414#[cfg(feature = "wakeup")]
415pub const WAKEUP: self::Wakeup = self::Wakeup {
416    ptr: 0x50000100u32 as _,
417};
418#[cfg(feature = "wdog")]
419#[derive(Copy, Clone, Eq, PartialEq)]
420pub struct Wdog {
421    ptr: *mut u8,
422}
423#[cfg(feature = "wdog")]
424pub const WDOG: self::Wdog = self::Wdog {
425    ptr: 0x50003100u32 as _,
426};
427
428pub use cortex_m::peripheral::Peripherals as CorePeripherals;
429pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
430#[doc = "Number available in the NVIC for configuring priority"]
431pub const NVIC_PRIO_BITS: u8 = 3;
432#[doc(hidden)]
433pub union Vector {
434    _handler: unsafe extern "C" fn(),
435    _reserved: u32,
436}
437#[cfg(feature = "rt")]
438pub use self::Interrupt as interrupt;
439#[cfg(feature = "rt")]
440pub use cortex_m_rt::interrupt;
441#[cfg(feature = "rt")]
442pub mod interrupt_handlers {
443    unsafe extern "C" {
444        pub fn BLE_WAKEUP_LP();
445        pub fn BLE_GEN();
446        pub fn FTDF_WAKEUP();
447        pub fn FTDF_GEN();
448        pub fn RFCAL();
449        pub fn COEX();
450        pub fn CRYPTO();
451        pub fn MRM();
452        pub fn UART();
453        pub fn UART2();
454        pub fn I2C();
455        pub fn I2C2();
456        pub fn SPI();
457        pub fn SPI2();
458        pub fn ADC();
459        pub fn KEYBRD();
460        pub fn IRGEN();
461        pub fn WKUP_GPIO();
462        pub fn SWTIM0();
463        pub fn SWTIM1();
464        pub fn QUADEC();
465        pub fn USB();
466        pub fn PCM();
467        pub fn SRC_IN();
468        pub fn SRC_OUT();
469        pub fn VBUS();
470        pub fn DMA();
471        pub fn RF_DIAG();
472        pub fn TRNG();
473        pub fn DCDC();
474        pub fn XTAL16RDY();
475        pub fn RESERVED31();
476    }
477}
478#[cfg(feature = "rt")]
479#[doc(hidden)]
480#[unsafe(link_section = ".vector_table.interrupts")]
481#[unsafe(no_mangle)]
482pub static __INTERRUPTS: [Vector; 32] = [
483    Vector {
484        _handler: interrupt_handlers::BLE_WAKEUP_LP,
485    },
486    Vector {
487        _handler: interrupt_handlers::BLE_GEN,
488    },
489    Vector {
490        _handler: interrupt_handlers::FTDF_WAKEUP,
491    },
492    Vector {
493        _handler: interrupt_handlers::FTDF_GEN,
494    },
495    Vector {
496        _handler: interrupt_handlers::RFCAL,
497    },
498    Vector {
499        _handler: interrupt_handlers::COEX,
500    },
501    Vector {
502        _handler: interrupt_handlers::CRYPTO,
503    },
504    Vector {
505        _handler: interrupt_handlers::MRM,
506    },
507    Vector {
508        _handler: interrupt_handlers::UART,
509    },
510    Vector {
511        _handler: interrupt_handlers::UART2,
512    },
513    Vector {
514        _handler: interrupt_handlers::I2C,
515    },
516    Vector {
517        _handler: interrupt_handlers::I2C2,
518    },
519    Vector {
520        _handler: interrupt_handlers::SPI,
521    },
522    Vector {
523        _handler: interrupt_handlers::SPI2,
524    },
525    Vector {
526        _handler: interrupt_handlers::ADC,
527    },
528    Vector {
529        _handler: interrupt_handlers::KEYBRD,
530    },
531    Vector {
532        _handler: interrupt_handlers::IRGEN,
533    },
534    Vector {
535        _handler: interrupt_handlers::WKUP_GPIO,
536    },
537    Vector {
538        _handler: interrupt_handlers::SWTIM0,
539    },
540    Vector {
541        _handler: interrupt_handlers::SWTIM1,
542    },
543    Vector {
544        _handler: interrupt_handlers::QUADEC,
545    },
546    Vector {
547        _handler: interrupt_handlers::USB,
548    },
549    Vector {
550        _handler: interrupt_handlers::PCM,
551    },
552    Vector {
553        _handler: interrupt_handlers::SRC_IN,
554    },
555    Vector {
556        _handler: interrupt_handlers::SRC_OUT,
557    },
558    Vector {
559        _handler: interrupt_handlers::VBUS,
560    },
561    Vector {
562        _handler: interrupt_handlers::DMA,
563    },
564    Vector {
565        _handler: interrupt_handlers::RF_DIAG,
566    },
567    Vector {
568        _handler: interrupt_handlers::TRNG,
569    },
570    Vector {
571        _handler: interrupt_handlers::DCDC,
572    },
573    Vector {
574        _handler: interrupt_handlers::XTAL16RDY,
575    },
576    Vector {
577        _handler: interrupt_handlers::RESERVED31,
578    },
579];
580#[doc = "Enumeration of all the interrupts."]
581#[derive(Copy, Clone, Debug, PartialEq, Eq)]
582#[repr(u16)]
583pub enum Interrupt {
584    BLE_WAKEUP_LP = 0,
585    BLE_GEN = 1,
586    FTDF_WAKEUP = 2,
587    FTDF_GEN = 3,
588    RFCAL = 4,
589    COEX = 5,
590    CRYPTO = 6,
591    MRM = 7,
592    UART = 8,
593    UART2 = 9,
594    I2C = 10,
595    I2C2 = 11,
596    SPI = 12,
597    SPI2 = 13,
598    ADC = 14,
599    KEYBRD = 15,
600    IRGEN = 16,
601    WKUP_GPIO = 17,
602    SWTIM0 = 18,
603    SWTIM1 = 19,
604    QUADEC = 20,
605    USB = 21,
606    PCM = 22,
607    SRC_IN = 23,
608    SRC_OUT = 24,
609    VBUS = 25,
610    DMA = 26,
611    RF_DIAG = 27,
612    TRNG = 28,
613    DCDC = 29,
614    XTAL16RDY = 30,
615    RESERVED31 = 31,
616}
617unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
618    #[inline(always)]
619    fn number(self) -> u16 {
620        self as u16
621    }
622}
623#[allow(non_snake_case)]
624/// Required for compatibility with RTIC and other frameworks
625pub struct Peripherals {
626    #[cfg(feature = "nvic")]
627    pub NVIC: self::Nvic,
628    #[cfg(feature = "scb")]
629    pub SCB: self::Scb,
630    #[cfg(feature = "systick")]
631    pub SYSTICK: self::SysTick,
632    #[cfg(feature = "aes_hash")]
633    pub AES_HASH: self::AesHash,
634    #[cfg(feature = "anamisc")]
635    pub ANAMISC: self::Anamisc,
636    #[cfg(feature = "apu")]
637    pub APU: self::Apu,
638    #[cfg(feature = "ble")]
639    pub BLE: self::Ble,
640    #[cfg(feature = "cache")]
641    pub CACHE: self::Cache,
642    #[cfg(feature = "chip_version")]
643    pub CHIP_VERSION: self::ChipVersion,
644    #[cfg(feature = "coex")]
645    pub COEX: self::Coex,
646    #[cfg(feature = "crg_per")]
647    pub CRG_PER: self::CrgPer,
648    #[cfg(feature = "crg_top")]
649    pub CRG_TOP: self::CrgTop,
650    #[cfg(feature = "dcdc")]
651    pub DCDC: self::Dcdc,
652    #[cfg(feature = "dma")]
653    pub DMA: self::Dma,
654    #[cfg(feature = "ecc")]
655    pub ECC: self::Ecc,
656    #[cfg(feature = "ftdf")]
657    pub FTDF: self::Ftdf,
658    #[cfg(feature = "gp_timers")]
659    pub GP_TIMERS: self::GpTimers,
660    #[cfg(feature = "gpadc")]
661    pub GPADC: self::Gpadc,
662    #[cfg(feature = "gpio")]
663    pub GPIO: self::Gpio,
664    #[cfg(feature = "gpreg")]
665    pub GPREG: self::Gpreg,
666    #[cfg(feature = "i2c")]
667    pub I2C: self::I2C,
668    #[cfg(feature = "i2c2")]
669    pub I2C2: self::I2C2,
670    #[cfg(feature = "ir")]
671    pub IR: self::Ir,
672    #[cfg(feature = "kbscan")]
673    pub KBSCAN: self::Kbscan,
674    #[cfg(feature = "otpc")]
675    pub OTPC: self::Otpc,
676    #[cfg(feature = "qspic")]
677    pub QSPIC: self::Qspic,
678    #[cfg(feature = "quad")]
679    pub QUAD: self::Quad,
680    #[cfg(feature = "spi")]
681    pub SPI: self::Spi,
682    #[cfg(feature = "spi2")]
683    pub SPI2: self::Spi2,
684    #[cfg(feature = "timer1")]
685    pub TIMER1: self::Timer1,
686    #[cfg(feature = "trng")]
687    pub TRNG: self::Trng,
688    #[cfg(feature = "uart")]
689    pub UART: self::Uart,
690    #[cfg(feature = "uart2")]
691    pub UART2: self::Uart2,
692    #[cfg(feature = "usb")]
693    pub USB: self::Usb,
694    #[cfg(feature = "wakeup")]
695    pub WAKEUP: self::Wakeup,
696    #[cfg(feature = "wdog")]
697    pub WDOG: self::Wdog,
698}
699
700impl Peripherals {
701    /// Returns Peripheral struct multiple times
702    /// Required for compatibility with RTIC and other frameworks
703    #[inline]
704    pub fn take() -> Option<Self> {
705        Some(Self::steal())
706    }
707
708    /// Returns Peripheral struct multiple times
709    /// Required for compatibility with RTIC and other frameworks
710    #[inline]
711    pub fn steal() -> Self {
712        Peripherals {
713            #[cfg(feature = "nvic")]
714            NVIC: crate::NVIC,
715            #[cfg(feature = "scb")]
716            SCB: crate::SCB,
717            #[cfg(feature = "systick")]
718            SYSTICK: crate::SYSTICK,
719            #[cfg(feature = "aes_hash")]
720            AES_HASH: crate::AES_HASH,
721            #[cfg(feature = "anamisc")]
722            ANAMISC: crate::ANAMISC,
723            #[cfg(feature = "apu")]
724            APU: crate::APU,
725            #[cfg(feature = "ble")]
726            BLE: crate::BLE,
727            #[cfg(feature = "cache")]
728            CACHE: crate::CACHE,
729            #[cfg(feature = "chip_version")]
730            CHIP_VERSION: crate::CHIP_VERSION,
731            #[cfg(feature = "coex")]
732            COEX: crate::COEX,
733            #[cfg(feature = "crg_per")]
734            CRG_PER: crate::CRG_PER,
735            #[cfg(feature = "crg_top")]
736            CRG_TOP: crate::CRG_TOP,
737            #[cfg(feature = "dcdc")]
738            DCDC: crate::DCDC,
739            #[cfg(feature = "dma")]
740            DMA: crate::DMA,
741            #[cfg(feature = "ecc")]
742            ECC: crate::ECC,
743            #[cfg(feature = "ftdf")]
744            FTDF: crate::FTDF,
745            #[cfg(feature = "gp_timers")]
746            GP_TIMERS: crate::GP_TIMERS,
747            #[cfg(feature = "gpadc")]
748            GPADC: crate::GPADC,
749            #[cfg(feature = "gpio")]
750            GPIO: crate::GPIO,
751            #[cfg(feature = "gpreg")]
752            GPREG: crate::GPREG,
753            #[cfg(feature = "i2c")]
754            I2C: crate::I2C,
755            #[cfg(feature = "i2c2")]
756            I2C2: crate::I2C2,
757            #[cfg(feature = "ir")]
758            IR: crate::IR,
759            #[cfg(feature = "kbscan")]
760            KBSCAN: crate::KBSCAN,
761            #[cfg(feature = "otpc")]
762            OTPC: crate::OTPC,
763            #[cfg(feature = "qspic")]
764            QSPIC: crate::QSPIC,
765            #[cfg(feature = "quad")]
766            QUAD: crate::QUAD,
767            #[cfg(feature = "spi")]
768            SPI: crate::SPI,
769            #[cfg(feature = "spi2")]
770            SPI2: crate::SPI2,
771            #[cfg(feature = "timer1")]
772            TIMER1: crate::TIMER1,
773            #[cfg(feature = "trng")]
774            TRNG: crate::TRNG,
775            #[cfg(feature = "uart")]
776            UART: crate::UART,
777            #[cfg(feature = "uart2")]
778            UART2: crate::UART2,
779            #[cfg(feature = "usb")]
780            USB: crate::USB,
781            #[cfg(feature = "wakeup")]
782            WAKEUP: crate::WAKEUP,
783            #[cfg(feature = "wdog")]
784            WDOG: crate::WDOG,
785        }
786    }
787}
da14680_pac/lib.rs

da14680_pac/
lib.rs
